JP2715877B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a semiconductor device having an improved contact hole.

[0002]

2. Description of the Related Art Since semiconductor integrated circuit devices and compound semiconductor devices typified by VLSIs are moving toward higher performance and higher integration, formation of fine patterns is becoming an increasingly important factor.

[0003] With the increase in performance and integration, integrated circuit elements and the like require electrode wiring. One of the indispensable methods for forming contact holes is RIE (Re-Reaction).
The active ion etching method has been put to practical use. However, the wall surface of the contact hole formed by the RIE method has an almost vertical shape, and the wiring metal layer deposited in the contact hole is likely to break down on the wall surface, so that the coverage of the wiring metal layer is improved. In addition, a contrivance has been made to make the wall surface of the contact hole into a tapered shape.

FIG. 3 shows a conventional technique for obtaining a tapered shape by isotropic etching and anisotropic etching (JP-A-63-258021).

As shown in FIG. 3A, a contact hole pattern 24 of a photoresist is provided at a position corresponding to a first conductive metal layer (hereinafter referred to as a wiring layer) 25,
Using this as a mask, wet etching is performed with an ammonium fluoride solution to about 1/3 of the thickness of the interlayer insulating film 23.

Next, as shown in FIG. 1B, anisotropic etching is performed by RIE using the photoresist 24 as a mask. In this RIE, an ordinary parallel plate electrode type apparatus is applied, and CF ₄ 20 SCCM, O ₂ 10 SC
CM, pressure 1.2 Pa, RF power 350 W are used.

After this opening, the photoresist 24 is ashed and removed as shown in FIG. As a result, the through hole 28 is formed in the concave portion 29 and the first wiring layer 25 near the opening surface.
And a vertical portion 30 smaller in diameter than the concave portion is obtained, and the depth of the bowl-shaped portion 29 is within about 1/3 of the whole. A corner 31 is formed at the boundary of the vertical portion 30 of the bowl-shaped portion 29, and a corner 32 is also formed at the opening surface of the concave portion 29. As shown in FIG. By etching back the entire surface of the interlayer insulating film 23, the corners 31 and 32 are removed and a taper 33 is obtained.

[0008]

In such a conventional method for forming a contact hole, corners 31 and 32, which are apt to be cut off, always occur, and it is necessary to etch back the entire surface in order to remove these corners. Since the amount of this etch back is anisotropic etching, the etching must be continued until the vertical portion 30 disappears. Therefore, as shown in FIG. 3D, the thickness of the interlayer insulating film is reduced to about 60% of the thickness at the time of formation. This greatly changes the wiring capacitance, and deteriorates the characteristics. further,
When the vertical portion 30 is eliminated, the opening diameter of the contact hole changes in a direction that becomes wider due to slight overetching of the etch back, and it becomes difficult to miniaturize the wiring pattern. For this purpose, it is necessary to increase the thickness of the interlayer insulating film and reduce the opening dimension of the contact hole photoresist, but this leads to a reduction in processing accuracy,
There is a problem that the wiring yield is deteriorated.

[0009]

According to the present invention, a step of forming an insulating film on a semiconductor substrate and performing anisotropic dry etching using a first resist as a mask to form a step in the insulating film; After removing the first resist, the first resist is
The insulation forming a sidewall forming film and said second resist having an opening in the opening of the first resist by anisotropic dry etching as a mask, the first sidewall forming film of Etch the film and cut the insulating film
Removing in a step of forming a second sidewall forming film on the removal after the entire surface of the second resist, the insulating film, the first sidewall forming film and a second sidewall forming film over the entire surface Etching the insulating film to form an opening, and leaving the first side wall forming film and the second side wall forming film in a step shape on the opening wall surface of the insulating film.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a process sectional view of a semiconductor device according to one embodiment of the present invention. First, as shown in FIG.
An SiO ₂ film 2 as an insulating film having a thickness of 7500 angstroms is formed by the D method, and RIE is performed using a first resist (not shown) as a contact hole pattern as a mask.
Anisotropic dry etching is performed by the method. Pressure CF ₄ or CHF ₃ gas as conditions at this time 1 Pa, the microwave power is appropriately 300～500W. After that, the first resist is removed, and the first side wall film is formed by a CVD method to form a 2500 angstrom thick SiO ₂ film 3.

Next, as shown in FIG. 1B, a pattern for a contact hole is formed on the second resist 4 using a stepper or an electron beam exposure machine, and further, RIE is performed using the second resist 4 as a mask. Anisotropic dry etching is performed by the method. The conditions at this time may be substantially the same as those in FIG. The amount of etching at this time stops when the first side wall film 3 is etched and the insulating film 2 is further etched by about 2500 Å. Thereafter, the second resist 4 is removed, and as shown in FIG. 1C, an SiO film 5 is formed on the second side wall film to a thickness of 2500 angstroms by the CVD method.

Thereafter, as shown in FIG. 1D, RIE or ECR (Electron Cyclotron) is performed.
(Resonance) The whole surface is etched back by anisotropic etching by a plasma method.

In this case, the gas is S in the case of the RIE method.
F ₆ gas pressure 1 Pa, microwave power 100-100
0W is appropriate. In the case of the ECR method, the gas is SF ₆
Gas pressure is 0.1 Pa, microwave power is 100 ~ 2
00W is appropriate. This condition is for reducing dry etching damage to the substrate 1 at the time of opening while maintaining anisotropic etching. At this time, the etching amount of the etch back is the second side wall film 5 (thickness 2500 Å).
A slight overetching (usually increased by about 20 to 50%) is performed on 5000 Å which is the sum of the thickness of the insulating film 2 and the remaining film thickness of 2500 Å.

As a result, the first side wall film 3 and the second side wall film 5 remain stepwise at the corners and wall surfaces of the opening of the insulating film 2. Further, as can be seen from FIGS. 1A to 1D, the shape of the SiO ₂ film formed by the CVD method at the stepped portion has a smooth arc shape, so that the SiO 2 film which is a sidewall film remaining on the stepped portion after the entire etch-back is performed. _{Since the two} films 3 and 5 also have a smooth arc shape, a smooth tapered opening shape can be obtained as shown in FIG.

Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a process sectional view of a semiconductor device of one embodiment. First, as shown in FIG.
The insulating film 2 to form a SiO ₂ film having a thickness of about 12500 Å by the CVD method above, the SiO ₂ film 2 by RIE with the first resist (not shown) as a mask
Is etched to 2500 angstroms. The conditions at this time are the same as those in FIG. Thereafter, the first resist is removed, and a thickness of 2500 is formed as a first sidewall film by a CVD method.
An Angstrom SiO ₂ film 3 is formed.

Next, as shown in FIG. 2B, the first side wall film 3 is etched by RIE using the second resist 4 as a mask, and the insulating film 2 is further etched at 2500 Å. After that, the second resist 4 is removed. Next, as shown in FIG. 2C, a 2500 angstrom thick SiO 2 film is formed as a second side wall film by a CVD method.
₂ film 5 is formed, the second side wall film 5 is etched by RIE using the third resist 14 on which a pattern for contact holes is formed as a mask using a stepper or an electron beam exposure machine. Is etched to 2500 angstroms. After that, the third resist 14
Is removed.

Next, as shown in FIG. 2D, a 1500 angstrom thick SiO ₂ film 6 is formed as a third side wall film by the CVD method, and is subjected to anisotropic etching conditions by the RIE method or the ECR method. Perform a full etch back. The conditions at this time are the same as those in FIG.

As a result, the first side wall film 3, the second side wall film 5, and the third side wall film 6 remain at the corners and the wall surfaces of the opening of the insulating film 2 in a stepwise manner. For the same reason as described above, the first to third side wall films have a smooth circular arc shape, so that the opening shape of the contact hole can also be a smooth tapered opening shape. In the case of the second embodiment, an opening shape having a large aspect ratio (thickness of the insulating film with respect to the diameter of the contact hole) can be formed without deteriorating the wiring coverage. There is an advantage that miniaturization can be achieved by reducing the size.

[0019]

As described above, according to the present invention, a step is formed in an insulating film by anisotropic etching, a side wall film is formed on the step, and the entire surface is etched back by anisotropic etching to obtain an aspect ratio (contact ratio). Even if the thickness of the insulating film with respect to the hole diameter is large, a smooth tapered opening shape can be obtained, so that there is an advantage that fine contact holes with good wiring coverage can be formed with high yield. Further, since all the dimensional variations use anisotropic etching, there is an advantage that the dimensional variations are small as compared with the conventional case using isotropic etching. Although the size varies depending on the thickness variation of the side wall film, the variation in the film thickness is usually ± 1.
The dimensional variation in this case is about 0.01 to 0.03 μm, which is smaller than the dimensional variation in other processes.

[Brief description of the drawings]

FIG. 1 is a process sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a process sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a process sectional view of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 1, 21 substrate 2, 22, 23 oxide film 3, 5, 6 sidewall oxide film 4, 14, 24 resist 25 first wiring layer 26 opening pattern 28 through hole 29 bowl-shaped portion 30 vertical portion 31, 32 acute angle portion 33 Tapered part

Claims (1)

(57) [Claims] A step of forming an insulating film on a semiconductor substrate, performing anisotropic dry etching using a first resist as a mask to form a step in the insulating film, and removing the first resist. Forming a first side wall forming film on the entire surface; and forming a second side wall having an opening in the opening of the first resist.
The resist by anisotropic dry etching as a mask, etching the first sidewall forming film and the insulating film
And, wherein the step of removing halfway insulating film, forming a second sidewall forming film on the removal after the entire surface of the second resist, the insulating film, the first sidewall forming film and a second Etching the entire surface of the side wall forming film to open the insulating film, and leaving the first side wall forming film and the second side wall forming film in a stepped shape on the opening wall surface of the insulating film. And a method for manufacturing a semiconductor device.