KR100411239B1 - Method for forming storage node of capacitor - Google Patents

Abstract

PURPOSE: A method for forming a storage node of a capacitor is provided to guarantee stability of a process by forming a polysilicon spacer in an undercut portion so that the polysilicon spacer can be protected from an etch process for forming the polysilicon spacer. CONSTITUTION: An interlayer dielectric(13) is formed on a semiconductor substrate(11) having a junction part(12). A part of the interlayer dielectric is etched to form a contact hole exposing the junction part. A doped polysilicon layer(14), the first oxide layer(15) and the second oxide layer(16) are sequentially formed on the interlayer dielectric including the contact hole. The second oxide layer, the first oxide layer and the doped polysilicon layer are patterned by an etch process using a storage node mask. The exposed portion of the first oxide layer is selectively etched by an isotropic etch process to form an undercut under the second oxide layer. After polysilicon is deposited on the entire region including the undercut, a polysilicon spacer(17) is formed in the undercut portion by an etch process using the second oxide layer as an etch mask. The patterned first and second oxide layers are eliminated.

Description

Method of forming charge storage electrode of capacitor

The present invention relates to a method of forming a charge storage electrode of a capacitor, and more particularly, to a method of forming a charge storage electrode of a capacitor capable of securing process stability by improving a method of forming a polysilicon spacer of a cylindrical capacitor.

As semiconductor devices become highly integrated and miniaturized, efforts have been made to increase the effective surface area under a limited area by forming charge storage electrodes in a three-dimensional structure to secure the minimum capacitance required for device operation.

1A to 1C are cross-sectional views of a device illustrated to explain a method of forming a charge storage electrode of a conventional cylindrical capacitor.

Referring to FIG. 1A, the interlayer insulating film 3 is formed of BPSG having excellent flatness on the semiconductor substrate 1 on which the junction portion 2 is formed. A portion of the interlayer insulating film 2 is etched by an etching process using a contact mask to form a contact hole through which the junction part 2 is exposed, and the doped polysilicon layer 4 on the interlayer insulating film 3 including the contact hole. And oxide film 5 are sequentially formed. The oxide film 5 and the doped polysilicon layer 4 are patterned by an etching process using a charge storage electrode mask.

The doped polysilicon layer 4 is formed to a thickness of 1000 kPa, and the oxide film 5 is formed thick to a thickness of 4000 to 6000 kPa.

1B or polysilicon spacers 6 are shown formed on the etched side walls of the patterned doped polysilicon layer 4 and the oxide film 5. The polysilicon spacer 6 is formed by depositing doped polysilicon on the interlayer insulating film 3 including the patterned oxide film 5 and then performing a boiling etching process. The boiling etching process is carried out by a transient etching method in order to completely separate the electrode of the adjacent capacitor, the height of the polysilicon spacer 6 is also lowered, resulting in a decrease in capacitance.

1C or the patterned oxide film 5 is removed to form a cylindrical charge storage electrode formed of the patterned doped polysilicon layer 4 and the polysilicon spacer 6.

As described above, when the cylindrical charge storage electrode is formed by the conventional method, the height of the polysilicon spacer cannot be effectively controlled, thereby not only securing the process stability but also causing a decrease in capacitance, thereby achieving high integration of semiconductor devices. Makes it difficult.

Accordingly, an object of the present invention is to provide a method for forming a charge storage electrode of a capacitor capable of securing process stability by improving a method of forming a polysilicon spacer of a cylindrical capacitor.

According to an aspect of the present invention, there is provided a method of forming a charge storage electrode, wherein an interlayer insulating film is formed on a semiconductor substrate on which a junction is formed, and a portion of the interlayer insulating layer is etched to form a contact hole through which the junction is exposed; Sequentially forming a doped polysilicon layer, a first oxide film and a second oxide film on the interlayer insulating film including the contact hole; Patterning the second oxide film, the first oxide film, and the doped polysilicon layer by an etching process using a charge storage electrode mask; Forming an undercut under the second oxide film by selectively etching the exposed portion of the first oxide film by an isotropic etching process; Forming a polysilicon spacer on the undercut portion; And removing the patterned first and second oxides.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D are cross-sectional views of devices for explaining the method of forming the charge storage electrode of the cylindrical capacitor according to the embodiment of the present invention.

Referring to FIG. 2A, an interlayer insulating film 13 is formed of BPSG having excellent flatness on the semiconductor substrate 11 on which the junction portion 12 is formed. A part of the interlayer insulating film 12 is etched by an etching process using a contact mask to form a contact hole through which the junction 12 is exposed, and the doped polysilicon layer 14 is formed on the interlayer insulating film 3 including the contact hole. Is formed. First and second oxide films 15 and 16 are sequentially formed on the doped polysilicon layer 14. The second oxide film 16, the first oxide film 15, and the doped polysilicon layer 14 are patterned by an anisotropic etching process using a charge storage electrode mask.

In the above, the doped polysilicon layer 14 is formed to a thickness of 1000 to 1500 kPa, the first oxide film 15 is formed thick to a thickness of 4000 to 6000 kPa, the second oxide film 16 is 400 to 500 kPa As thin as it is formed. That is, the thickness of the second oxide film 16 is formed to a thickness of 10 to 20% of the thickness of the first oxide film 15. Meanwhile, the first oxide film 15 should be formed of an oxide which is etched at a faster rate in the wet etching solution with respect to the second oxide film 16. For example, the first oxide layer 15 may be doped with an impurity, and the second oxide layer 16 may be formed without being doped with impurities to vary the etching selectivity.

FIG. 2B shows an undercut 20 formed under the second oxide film 16 by selectively etching the exposed portion of the first oxide film 15 by an isotropic etching process using an HF or BOE etching solution.

2C or polysilicon spacer 17 is shown formed in the undercut 20 portion. The polysilicon spacers 17 are formed by depositing doped polysilicon on the interlayer insulating film 13 including the patterned second oxide film 16 and the undercut 20, followed by a boiling etching process. The boiling etching process is performed by a transient etching method in order to completely separate the electrode of the adjacent capacitor, since the polysilicon spacer 17 is protected from etching by the second oxide film 16 in the undercut 20 portion. No etch loss

The cylindrical charge storage electrode formed of the patterned doped polysilicon layer 14 and the polysilicon spacer 17 is formed by removing the 2D or patterned second oxide film 16 and the first oxide film 15. Shown.

As described above, the present invention forms an oxide film having a different etching selectivity into a double structure, selectively etches the lower oxide film to form an undercut under the upper oxide film, and an undercut portion by a polysilicon etching process using the upper oxide film as an etch stop layer. Polysilicon spacers are formed on the cylindrical charge storage electrodes.

Therefore, in the present invention, since the polysilicon spacer is formed on the undercut portion, the polysilicon spacer is protected from the etching process for forming the polysilicon spacer, thereby facilitating process condition setting and process management, thereby ensuring stability of the process.

1A to 1C are cross-sectional views of a device for explaining a method of forming a charge storage electrode of a conventional cylindrical capacitor.

2A to 2D are cross-sectional views of a device for explaining a method of forming a charge storage electrode of a cylindrical capacitor according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

11 semiconductor substrate 12 junction

13 interlayer insulation film 14 polysilicon layer

15: first oxide film 16: second oxide film

17 polysilicon spacer 20 undercut

Claims (9)

In the method of forming a charge storage electrode of a capacitor, Forming an interlayer insulating film on a semiconductor substrate on which a junction is formed, and forming a contact hole through which the junction is exposed by etching a portion of the interlayer insulating film; Sequentially forming a doped polysilicon layer, a first oxide film, and a second oxide film on the interlayer insulating film including the contact hole; Patterning the second oxide film, the first oxide film, and the doped polysilicon layer by an etching process using a charge storage electrode mask; Forming an undercut under the second oxide film by selectively etching the exposed portion of the first oxide film by an isotropic etching process; Depositing polysilicon on the entire region including the undercut, and then forming a polysilicon spacer on the undercut portion by an etching process using the second oxide layer as an etching mask; And And removing the patterned first and second oxides. The method of claim 1, The doped polysilicon layer is formed of a charge storage electrode of the capacitor, characterized in that formed in a thickness of 1000 to 1500. The method of claim 1, The first oxide film is formed with a thickness of 4000 to 6000, the charge storage electrode forming method of a capacitor, characterized in that. The method of claim 1, The second oxide film is a method of forming a charge storage electrode of a capacitor, characterized in that formed to a thickness of 400 to 500. The method of claim 1, The thickness of the second oxide film is a method of forming a charge storage electrode of a capacitor, characterized in that formed in a thickness of 10 to 20% of the thickness of the first oxide film. The method of claim 1, And the first oxide film is etched at a faster rate in the wet etching solution with respect to the second oxide film. The method of claim 1, And the first oxide film is a doped oxide film, and the second oxide film is an undoped oxide film. The method of claim 1, The isotropic etching process is a charge storage electrode forming method of a capacitor, characterized in that carried out using an HF etching solution. The method of claim 1, The isotropic etching process is a charge storage electrode forming method of a capacitor, characterized in that carried out using a BOE etching solution.