KR960004079B1 - Contact hole forming method - Google Patents

Contact hole forming method Download PDF

Info

Publication number
KR960004079B1
KR960004079B1 KR92024804A KR920024804A KR960004079B1 KR 960004079 B1 KR960004079 B1 KR 960004079B1 KR 92024804 A KR92024804 A KR 92024804A KR 920024804 A KR920024804 A KR 920024804A KR 960004079 B1 KR960004079 B1 KR 960004079B1
Authority
KR
South Korea
Prior art keywords
contact
contact hole
forming method
hole forming
metal lead
Prior art date
Application number
KR92024804A
Other languages
English (en)
Inventor
Young-Kwon Chon
Original Assignee
Lg Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Semicon Co Ltd filed Critical Lg Semicon Co Ltd
Priority to KR92024804A priority Critical patent/KR960004079B1/ko
Priority to JP5309259A priority patent/JP2550286B2/ja
Priority to DE4342817A priority patent/DE4342817B4/de
Priority to US08/168,247 priority patent/US5587331A/en
Application granted granted Critical
Publication of KR960004079B1 publication Critical patent/KR960004079B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Lead Frames For Integrated Circuits (AREA)
KR92024804A 1992-12-19 1992-12-19 Contact hole forming method KR960004079B1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR92024804A KR960004079B1 (en) 1992-12-19 1992-12-19 Contact hole forming method
JP5309259A JP2550286B2 (ja) 1992-12-19 1993-12-09 半導体装置における金属配線用コンタクトホールの形成方法
DE4342817A DE4342817B4 (de) 1992-12-19 1993-12-15 Verfahren zur Bildung eines Kontaktloches für eine Metall-Leitung in einem Halbleiter-Bauelement
US08/168,247 US5587331A (en) 1992-12-19 1993-12-17 Method of forming a contact hole for a metal line in a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92024804A KR960004079B1 (en) 1992-12-19 1992-12-19 Contact hole forming method

Publications (1)

Publication Number Publication Date
KR960004079B1 true KR960004079B1 (en) 1996-03-26

Family

ID=19346033

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92024804A KR960004079B1 (en) 1992-12-19 1992-12-19 Contact hole forming method

Country Status (4)

Country Link
US (1) US5587331A (ko)
JP (1) JP2550286B2 (ko)
KR (1) KR960004079B1 (ko)
DE (1) DE4342817B4 (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE68917732T2 (de) * 1988-05-10 1994-12-15 Teijin Ltd Immuntestverfahren von chondrocalcin.
US5874341A (en) * 1996-10-30 1999-02-23 Advanced Micro Devices, Inc. Method of forming trench transistor with source contact in trench
JP3403231B2 (ja) 1993-05-12 2003-05-06 三菱電機株式会社 半導体装置およびその製造方法
US6111319A (en) 1995-12-19 2000-08-29 Stmicroelectronics, Inc. Method of forming submicron contacts and vias in an integrated circuit
US6066555A (en) 1995-12-22 2000-05-23 Cypress Semiconductor Corporation Method for eliminating lateral spacer erosion on enclosed contact topographies during RF sputter cleaning
US5780340A (en) * 1996-10-30 1998-07-14 Advanced Micro Devices, Inc. Method of forming trench transistor and isolation trench
US5801075A (en) * 1996-10-30 1998-09-01 Advanced Micro Devices, Inc. Method of forming trench transistor with metal spacers
US6100146A (en) * 1996-10-30 2000-08-08 Advanced Micro Devices, Inc. Method of forming trench transistor with insulative spacers
US5923980A (en) * 1996-10-30 1999-07-13 Advanced Micro Devices, Inc. Trench transistor with localized source/drain regions implanted through voids in trench
US5888880A (en) * 1996-10-30 1999-03-30 Advanced Micro Devices, Inc. Trench transistor with localized source/drain regions implanted through selectively grown oxide layer
US5796143A (en) * 1996-10-30 1998-08-18 Advanced Micro Devices, Inc. Trench transistor in combination with trench array
KR100249170B1 (ko) * 1997-04-10 2000-03-15 김영환 반도체 소자의 배선 형성방법
KR100693789B1 (ko) * 2005-10-18 2007-03-12 주식회사 하이닉스반도체 반도체 소자의 제조방법

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2544937B2 (ja) * 1987-08-05 1996-10-16 三菱電機株式会社 半導体装置およびその製造方法
JPH01175245A (ja) * 1987-12-29 1989-07-11 Fujitsu Ltd 半導体装置及びその製造方法
US4962414A (en) * 1988-02-11 1990-10-09 Sgs-Thomson Microelectronics, Inc. Method for forming a contact VIA
JPH01255264A (ja) * 1988-04-05 1989-10-12 Seiko Instr Inc 半導体装置の製造方法
JPH0828473B2 (ja) * 1988-09-29 1996-03-21 三菱電機株式会社 半導体装置およびその製造方法
JPH031559A (ja) * 1989-05-29 1991-01-08 Sharp Corp 半導体装置の製造方法
JP2616034B2 (ja) * 1989-08-23 1997-06-04 日本電気株式会社 半導体集積回路装置
US5275972A (en) * 1990-02-19 1994-01-04 Matsushita Electric Industrial Co., Ltd. Method for fabricating a semiconductor integrated circuit device including the self-aligned formation of a contact window
US5043790A (en) * 1990-04-05 1991-08-27 Ramtron Corporation Sealed self aligned contacts using two nitrides process
US5094981A (en) * 1990-04-17 1992-03-10 North American Philips Corporation, Signetics Div. Technique for manufacturing interconnections for a semiconductor device by annealing layers of titanium and a barrier material above 550° C.
US5240872A (en) * 1990-05-02 1993-08-31 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device having interconnection layer contacting source/drain regions
KR920008294B1 (ko) * 1990-05-08 1992-09-26 금성일렉트론 주식회사 반도체 장치의 제조방법
FR2664095B1 (fr) * 1990-06-28 1993-12-17 Commissariat A Energie Atomique Procede de fabrication d'un contact electrique sur un element actif d'un circuit integre mis.
JPH04134858A (ja) * 1990-09-27 1992-05-08 Oki Electric Ind Co Ltd 半導体記憶装置の製造方法
JP2748050B2 (ja) * 1991-02-08 1998-05-06 三菱電機株式会社 半導体装置およびその製造方法
KR100214036B1 (ko) * 1991-02-19 1999-08-02 이데이 노부유끼 알루미늄계 배선형성방법
JP3360835B2 (ja) * 1991-02-19 2003-01-07 ソニー株式会社 配線形成方法
JPH04352356A (ja) * 1991-05-29 1992-12-07 Hitachi Ltd 半導体集積回路装置およびその製造方法
US5246883A (en) * 1992-02-06 1993-09-21 Sgs-Thomson Microelectronics, Inc. Semiconductor contact via structure and method
US5266156A (en) * 1992-06-25 1993-11-30 Digital Equipment Corporation Methods of forming a local interconnect and a high resistor polysilicon load by reacting cobalt with polysilicon
US5308783A (en) * 1992-12-16 1994-05-03 Siemens Aktiengesellschaft Process for the manufacture of a high density cell array of gain memory cells

Also Published As

Publication number Publication date
DE4342817B4 (de) 2006-03-16
JPH06224149A (ja) 1994-08-12
US5587331A (en) 1996-12-24
JP2550286B2 (ja) 1996-11-06
DE4342817A1 (de) 1994-06-23

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E701 Decision to grant or registration of patent right
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