KR950034753A - 유도성 부하소자용 집적 드라이버 회로 - Google Patents

유도성 부하소자용 집적 드라이버 회로 Download PDF

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Publication number
KR950034753A
KR950034753A KR1019950007930A KR19950007930A KR950034753A KR 950034753 A KR950034753 A KR 950034753A KR 1019950007930 A KR1019950007930 A KR 1019950007930A KR 19950007930 A KR19950007930 A KR 19950007930A KR 950034753 A KR950034753 A KR 950034753A
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South Korea
Prior art keywords
substrate
inductive load
integrated driver
driver circuit
doped
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KR1019950007930A
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English (en)
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KR100334381B1 (ko
Inventor
볼프강 베르너
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발도르프, 옴케
지멘스 악티엔게젤샤프트
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Publication of KR950034753A publication Critical patent/KR950034753A/ko
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Publication of KR100334381B1 publication Critical patent/KR100334381B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

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  • Power Engineering (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Electronic Switches (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

집적회로에 의해 구동되는 유도성부하(L)의 정류시, 마이노리티 캐리어 주입에 의해 기판(1)에 생기는 전류의 횡측성분으로 인한 오동작을 방지하기 위해, 하이도핑된 p 기판 또는 n기판상에 p 도전형 에피택셜층(2)이 제공되고 상기 층내에 n 도핑웰(3-5)이 배치된다. 전술한 효과는 하이도핑된 p 기판에서 캐리어 수명이 현저히 줄어들고 n 기판내에서 마이노리티 캐리어가 머조리티 캐리어이기 때문에 불리하지 않게 된다. 회로기술의 변형은, 유도성 부하(L)에 대한 출력단자(C)로부터 다이오드(D1)가 기준전위에 대향해서 접속되고 기판이 2개의 역으로 병렬접속된 다이오드(D2,D3)를 통해 기준전위에 접속된다는 것이다.

Description

유도성 부하소자용 집적 드라이버 회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 특징으로 갖는 웨이퍼의 횡단면도, 제2a도는 회로의 설명을 위한 웨이퍼의 횡단면도, 제2b도는 제2a도에 대한 회로도, 제3도는 본 발명의 문제점을 설명하기 위한 공지의 회로도.

Claims (5)

  1. 기판, 다수의 절연된 웰, 및 부하조사에 접속하기 위한 출력단자를 갖춘 유도성 부하소자용 집적드라이버 회로에 있어서, 하이도핑된 p 도전형 기판(1), 상기 기판(1) 위에 제공되며 그 안에 웰이 배치되어 있는 동일한 도전형의 에피택셜층(2), 및 출력단자에 배치된 웰(3)을 측면으로 둘러싸는 n 도핑구역(5)을 포함하는 것을 특징으로 하는 유도성 부하소자용 집적 드라이버 회로.
  2. 제1항에 있어서, 기판의 억셉터 도핑이 에피택셜층의 억셉터 도핑보다 적어도 2차수만큼 더 큰 것을 특징으로 하는 유도성 부하소자용 집적 드라이버 회로.
  3. 제1항 또는 2항에 있어서, 유도성 부하소자(L)의 정류시 기판(1)가 에피택셜층(2)의 접합영역에서 전기드리프트 필드가 생기는 것을 특징으로 하는 유도성 부하소자용 집적 드라이버 회로.
  4. 기판, 다수의 절연된 웰, 및 부하소자에 접속하기 위한 출력단자를 갖춘 유도성 부하소자용 집적 드라이버 회로에 있어서, 에미터로서 n 도핑 웰(3), 콜렉터로서 상기 웰(3)을 측면으로 둘러싸는 n 도핑구역(5), 및 베이스로서 하이도핑된 기판(1) 및 그 위에 제공된 에피택셜층(2)을 갖춘 npn 트랜지스터를 포함하는 것을 특징으로 하는 유도성 부하소자용 집적 드라이버 회로.
  5. 유도성 부하소자를 구동시키는데 대한 제1항 내지 4항 중 어느 한 항의 특징을 갖는 집적 드라이버 회로의 용도.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950007930A 1994-04-06 1995-04-06 유도성부하소자용집적드라이버회로 KR100334381B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEP4411869.4 1994-04-06
DE4411869A DE4411869C2 (de) 1994-04-06 1994-04-06 Schaltungsanordnung mit einer integrierten Treiberschaltungsanordnung

Publications (2)

Publication Number Publication Date
KR950034753A true KR950034753A (ko) 1995-12-28
KR100334381B1 KR100334381B1 (ko) 2002-10-31

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KR1019950007930A KR100334381B1 (ko) 1994-04-06 1995-04-06 유도성부하소자용집적드라이버회로

Country Status (5)

Country Link
US (1) US5719431A (ko)
EP (1) EP0676808B1 (ko)
JP (1) JPH07297373A (ko)
KR (1) KR100334381B1 (ko)
DE (2) DE4411869C2 (ko)

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US7943960B2 (en) * 2008-02-01 2011-05-17 Infineon Technologies Ag Integrated circuit arrangement including a protective structure
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Also Published As

Publication number Publication date
DE4411869A1 (de) 1995-10-12
DE59501583D1 (de) 1998-04-16
US5719431A (en) 1998-02-17
JPH07297373A (ja) 1995-11-10
EP0676808B1 (de) 1998-03-11
EP0676808A1 (de) 1995-10-11
DE4411869C2 (de) 1997-05-15
KR100334381B1 (ko) 2002-10-31

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