KR950011017B1 - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

Info

Publication number
KR950011017B1
KR950011017B1 KR1019910022904A KR910022904A KR950011017B1 KR 950011017 B1 KR950011017 B1 KR 950011017B1 KR 1019910022904 A KR1019910022904 A KR 1019910022904A KR 910022904 A KR910022904 A KR 910022904A KR 950011017 B1 KR950011017 B1 KR 950011017B1
Authority
KR
South Korea
Prior art keywords
layer
diffusion layer
iil
collector
buried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019910022904A
Other languages
English (en)
Korean (ko)
Other versions
KR930003417A (ko
Inventor
아끼히로 칸다
미쯔오 타나카
타케히로 히라이
마시히로 나카타니
Original Assignee
미쯔시다덴기산교 가부시기가이샤
다니이 아끼오
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 미쯔시다덴기산교 가부시기가이샤, 다니이 아끼오 filed Critical 미쯔시다덴기산교 가부시기가이샤
Publication of KR930003417A publication Critical patent/KR930003417A/ko
Application granted granted Critical
Publication of KR950011017B1 publication Critical patent/KR950011017B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/67Complementary BJTs
    • H10D84/673Vertical complementary BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0112Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0112Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0119Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
    • H10D84/0121Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/021Manufacture or treatment of interconnections within wafers or substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/087I2L integrated injection logic

Landscapes

  • Bipolar Integrated Circuits (AREA)
KR1019910022904A 1991-07-01 1991-12-13 반도체장치 및 그 제조방법 Expired - Fee Related KR950011017B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP15926891 1991-07-01
JP91-159268 1991-07-01

Publications (2)

Publication Number Publication Date
KR930003417A KR930003417A (ko) 1993-02-24
KR950011017B1 true KR950011017B1 (ko) 1995-09-27

Family

ID=15690065

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910022904A Expired - Fee Related KR950011017B1 (ko) 1991-07-01 1991-12-13 반도체장치 및 그 제조방법

Country Status (4)

Country Link
US (2) US5162252A (enExample)
EP (1) EP0521219B1 (enExample)
KR (1) KR950011017B1 (enExample)
DE (1) DE69128963T2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015025996A1 (ko) * 2013-08-22 2015-02-26 (주)코미코 에어로졸 코팅 방법 및 이에 의해 형성된 내플라즈마 부재

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0534632B1 (en) * 1991-09-24 2002-01-16 Matsushita Electronics Corporation, Ltd. Semiconductor integrated circuit device and method of fabricating the same
US5268312A (en) * 1992-10-22 1993-12-07 Motorola, Inc. Method of forming isolated wells in the fabrication of BiCMOS devices
US5369042A (en) * 1993-03-05 1994-11-29 Texas Instruments Incorporated Enhanced performance bipolar transistor process
JPH07235602A (ja) * 1994-02-21 1995-09-05 Mitsubishi Electric Corp Iil回路を有する半導体装置およびその製造方法
JP3547811B2 (ja) * 1994-10-13 2004-07-28 株式会社ルネサステクノロジ バイポーラトランジスタを有する半導体装置およびその製造方法
JP3159237B2 (ja) * 1996-06-03 2001-04-23 日本電気株式会社 半導体装置およびその製造方法
KR100258436B1 (ko) * 1996-10-11 2000-06-01 김덕중 상보형 쌍극성 트랜지스터 및 그 제조 방법
US6140690A (en) * 1996-11-18 2000-10-31 Matsushita Electric Industrial Co., Ltd. Semiconductor device
US6165868A (en) * 1999-06-04 2000-12-26 Industrial Technology Research Institute Monolithic device isolation by buried conducting walls
US6894366B2 (en) * 2000-10-10 2005-05-17 Texas Instruments Incorporated Bipolar junction transistor with a counterdoped collector region
EP1646084A1 (en) * 2004-10-06 2006-04-12 Infineon Technologies AG A method in the fabrication of an integrated injection logic circuit
US20070298576A1 (en) * 2006-06-21 2007-12-27 Kuhn Kelin J Methods of forming bipolar transistors by silicide through contact and structures formed thereby
US20180076038A1 (en) * 2016-09-09 2018-03-15 Texas Instruments Incorporated Method For Producing Two N-Type Buried Layers In An Integrated Circuit

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258379A (en) * 1978-09-25 1981-03-24 Hitachi, Ltd. IIL With in and outdiffused emitter pocket
DE3020609C2 (de) * 1979-05-31 1985-11-07 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Verfahren zum Herstellen einer integrierten Schaltung mit wenigstens einem I↑2↑L-Element
JPS57116430A (en) * 1981-01-13 1982-07-20 Toshiba Corp Inverted logical circuit
JPS57164560A (en) * 1981-04-02 1982-10-09 Toshiba Corp Manufacture of semiconductor integrated circuit device
DE3361832D1 (en) * 1982-04-19 1986-02-27 Matsushita Electric Industrial Co Ltd Semiconductor ic and method of making the same
JPS59141261A (ja) * 1983-01-31 1984-08-13 Matsushita Electric Ind Co Ltd 半導体集積回路装置の製造方法
JPS5967255A (ja) * 1982-10-07 1984-04-16 Sumitomo Chem Co Ltd N−フエニルテトラヒドロフタラミン酸誘導体、その製造法およびそれを有効成分とする除草剤
JPS6052038A (ja) * 1983-08-31 1985-03-23 Nec Corp 半導体装置の製造方法
DE3586341T2 (de) * 1984-02-03 1993-02-04 Advanced Micro Devices Inc Bipolartransistor mit in schlitzen gebildeten aktiven elementen.
US4984048A (en) * 1987-07-10 1991-01-08 Hitachi, Ltd. Semiconductor device with buried side contact
ZA891937B (en) * 1988-04-04 1990-11-28 Ppg Industries Inc Pigment grinding vehicles containing quaternary ammonium and ternary sulfonium groups
JPH0258865A (ja) * 1988-08-24 1990-02-28 Nec Corp 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015025996A1 (ko) * 2013-08-22 2015-02-26 (주)코미코 에어로졸 코팅 방법 및 이에 의해 형성된 내플라즈마 부재
US10272467B2 (en) 2013-08-22 2019-04-30 Komico Co., Ltd. Aerosol coating method and plasma-resistant member formed by the same

Also Published As

Publication number Publication date
EP0521219B1 (en) 1998-02-25
US5331198A (en) 1994-07-19
KR930003417A (ko) 1993-02-24
EP0521219A2 (en) 1993-01-07
EP0521219A3 (enExample) 1994-08-31
US5162252A (en) 1992-11-10
DE69128963T2 (de) 1998-07-30
DE69128963D1 (de) 1998-04-02

Similar Documents

Publication Publication Date Title
EP0172878B1 (en) A bipolar transistor with active elements formed in slots
US4333227A (en) Process for fabricating a self-aligned micrometer bipolar transistor device
US4884117A (en) Circuit containing integrated bipolar and complementary MOS transistors on a common substrate
US6750526B2 (en) Semiconductor device with trench isolation having reduced leak current
EP0083816B1 (en) Semiconductor device having an interconnection pattern
US4199378A (en) Method of manufacturing a semiconductor device and semiconductor device manufactured while using such a method
KR950011017B1 (ko) 반도체장치 및 그 제조방법
US4910572A (en) Semiconductor device and method of fabricating the same
US4303933A (en) Self-aligned micrometer bipolar transistor device and process
EP0232510B1 (en) Semiconductor device having a plane junction with autopassivating termination
EP0193116B1 (en) Method of manufacturing a semiconductor device having a trench
JPS60124869A (ja) トランジスタの製造方法
EP0112489A1 (en) Semiconductor device with compact isolation and method of making the same
EP0193934B1 (en) Semiconductor integreated circuit device and method of manufacturing the same
US5198376A (en) Method of forming high performance lateral PNP transistor with buried base contact
KR950001146B1 (ko) 폴리실리콘 자체 정렬 바이폴라 장치 및 이의 제조 방법
US5624854A (en) Method of formation of bipolar transistor having reduced parasitic capacitance
KR920010434B1 (ko) 바이폴라 트랜지스터와 iil을 갖는 반도체 장치
KR930009029B1 (ko) 반도체 장치 및 그 제조방법
US5273913A (en) High performance lateral PNP transistor with buried base contact
JP2524035B2 (ja) 半導体装置及びその製造方法
US5323054A (en) Semiconductor device including integrated injection logic and vertical NPN and PNP transistors
KR930004720B1 (ko) 반도체장치 및 그 제조방법
KR0166069B1 (ko) 반도체장치
US7101750B2 (en) Semiconductor device for integrated injection logic cell and process for fabricating the same

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

G160 Decision to publish patent application
PG1605 Publication of application before grant of patent

St.27 status event code: A-2-2-Q10-Q13-nap-PG1605

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

FPAY Annual fee payment

Payment date: 19980922

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 19990928

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 19990928

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000