KR950006968A - 실리사이드 형성방법 및 반도체장치의 제조방법 - Google Patents

실리사이드 형성방법 및 반도체장치의 제조방법 Download PDF

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Publication number
KR950006968A
KR950006968A KR1019940020073A KR19940020073A KR950006968A KR 950006968 A KR950006968 A KR 950006968A KR 1019940020073 A KR1019940020073 A KR 1019940020073A KR 19940020073 A KR19940020073 A KR 19940020073A KR 950006968 A KR950006968 A KR 950006968A
Authority
KR
South Korea
Prior art keywords
film
silicide
forming
semiconductor device
reaction chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019940020073A
Other languages
English (en)
Korean (ko)
Inventor
다께시 스와
오사무 가사하라
Original Assignee
가나이 쯔또무
가부시끼가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 쯔또무, 가부시끼가이샤 히다찌세이사꾸쇼 filed Critical 가나이 쯔또무
Publication of KR950006968A publication Critical patent/KR950006968A/ko
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/01312Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional layer comprising a metal or metal silicide formed by deposition, i.e. without a silicidation reaction, e.g. sputter deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/011Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019940020073A 1993-08-20 1994-08-16 실리사이드 형성방법 및 반도체장치의 제조방법 Withdrawn KR950006968A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP20638793 1993-08-20
JP93-206387 1993-08-20
JP6039457A JPH07111253A (ja) 1993-08-20 1994-03-10 シリサイド形成方法および半導体装置の製造方法
JP94-039457 1994-03-10

Publications (1)

Publication Number Publication Date
KR950006968A true KR950006968A (ko) 1995-03-21

Family

ID=26378851

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940020073A Withdrawn KR950006968A (ko) 1993-08-20 1994-08-16 실리사이드 형성방법 및 반도체장치의 제조방법

Country Status (3)

Country Link
JP (1) JPH07111253A (https=)
KR (1) KR950006968A (https=)
TW (1) TW291577B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11200050A (ja) * 1998-01-14 1999-07-27 Mitsubishi Electric Corp タングステンシリサイド膜の形成方法、半導体装置の製造方法、及び半導体ウェーハ処理装置
JP2937998B1 (ja) 1998-03-16 1999-08-23 山形日本電気株式会社 配線の製造方法
US6583057B1 (en) * 1998-12-14 2003-06-24 Motorola, Inc. Method of forming a semiconductor device having a layer deposited by varying flow of reactants
JP4154471B2 (ja) 2002-11-15 2008-09-24 富士通株式会社 半導体装置の製造方法
JP4858461B2 (ja) * 2008-02-21 2012-01-18 ルネサスエレクトロニクス株式会社 タングステンシリサイド膜の形成方法及び半導体装置の製造方法

Also Published As

Publication number Publication date
JPH07111253A (ja) 1995-04-25
TW291577B (https=) 1996-11-21

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