KR940001258A - 다결정 실리콘 박막의 제조방법 - Google Patents

다결정 실리콘 박막의 제조방법 Download PDF

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KR940001258A
KR940001258A KR1019920011615A KR920011615A KR940001258A KR 940001258 A KR940001258 A KR 940001258A KR 1019920011615 A KR1019920011615 A KR 1019920011615A KR 920011615 A KR920011615 A KR 920011615A KR 940001258 A KR940001258 A KR 940001258A
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thin film
polycrystalline silicon
silicon thin
manufacturing
present
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KR1019920011615A
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KR100270618B1 (ko
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이재원
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김광호
삼성전자 주식회사
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Priority to JP4347536A priority patent/JP2997375B2/ja
Priority to US07/998,683 priority patent/US5382548A/en
Publication of KR940001258A publication Critical patent/KR940001258A/ko
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02422Non-crystalline insulating materials, e.g. glass, polymers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02678Beam shaping, e.g. using a mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02686Pulsed laser beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691Scanning of a beam
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/09Laser anneal

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  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

본 발명은 비정질 실리콘(Amorphous Silicon: a-Si) 박막을 레이저를 이용하여 균일하게 열처리(annealing)함으로써 다결정 실리콘(Poly Crystalline Silicon : p-Si) 박막으로 결정화시키는 방법에 관한 것으로, 유리기판(11)의 a-Si 부분(3)위에 불균일한 빔이 조사되는 부분에 금속반사층(7)을 형성시키고, 그 위에는 전체적으로 SiO2절연막(8)을 형성시킨 다음 상기 금속반사층(7) 양쪽 모서리 위쪽으로 마이크로 렌즈(6)를 위치시켜 다결정 실리콘 박막을 제조하는 방법에 관한 것이다
결과적으로 본 발명의 다결정 실리콘은 종래의 고온공정이 아닌 저온공정으로 p-Si 박막을 제작할 수 있으므로 고가의 단결정이나 석영기판을 사용하는 대신 저렴한 유리기판이나 플래스틱, 세라믹등 다양한 기판을 사용할 수 있으며 정밀하게 균일한 강도분포의 레이저 빔을 제작하려면 고가의 광학설비를 갖추어야 하나 본 발명의 경우 종래의 반도체 박막 제작공정을 채용함으로써 현 보유설비나 기술을 이용할 수 있어 경제적이다.
또한 균일한 p-Si 박막을 제작할 수 있으므로 소자의 동작성능 및 신뢰성이 향상되었다.

Description

다결정 실리콘 박막의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제5도는 본 발명에 의해 결정화된 균일한 다결정 실리콘 박막의 단면도이고,
제6도는 본 발명에 의해 결정화된 균일한 다결정 실리콘 박막의 제조공정도이다.

Claims (4)

  1. 레이져를 이용하여 비정질 실리콘 박막을 열처리하여 다결정 실리콘 박막을 제조하는데 있어서, 유리기판(11)의 a-Si 부분(3)위에 불균일한 빔이 조사되는 부분에 금속반사층(7)을 형성시키고, 그 위에는 전체적으로 SiO2절연막(8)을 형성시킨 다음 상기 금속반사층(7) 양쪽 모서리 위쪽으로 마이크로 렌즈(6)를 위치시켜 제조되는 것을 특징으로 하는 다결정 실리콘 박막의 제조방법.
  2. 제1항에 있어서, 상기 금속반사층(7)은 알루미늄, 금, 은, 동 등의 금속에서 하나를 선택하여 사용되는 것을 특징으로 하는 다결정 실리콘 박막의 제조방법.
  3. 제1항에 있어서, 상기 금속반사막(7)에 사진식각법으로 창부분(9)을 형성시키는 것을 특징으로 하는 다결정 실리콘 박막의 제조방법.
  4. 제1항에 있어서, 상기 마이크로 렌즈(6)는 저굴절률의 SiO2절연막(8)에 고굴절율의 물질을 삽입하여 오목렌즈 형태로 제조한 것을 특징으로 하는 다결정 실리콘 박막의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920011615A 1992-06-30 1992-06-30 다결정 실리콘 박막의 제조방법 KR100270618B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019920011615A KR100270618B1 (ko) 1992-06-30 1992-06-30 다결정 실리콘 박막의 제조방법
JP4347536A JP2997375B2 (ja) 1992-06-30 1992-12-28 多結晶シリコン薄膜の製造方法
US07/998,683 US5382548A (en) 1992-06-30 1992-12-30 Method for making polystalline silicon thin film

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Application Number Priority Date Filing Date Title
KR1019920011615A KR100270618B1 (ko) 1992-06-30 1992-06-30 다결정 실리콘 박막의 제조방법

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KR100270618B1 KR100270618B1 (ko) 2000-12-01

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100505449B1 (ko) * 1998-12-24 2005-10-14 주식회사 하이닉스반도체 반도체 소자의 폴리사이드 게이트 전극 형성방법

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW297138B (ko) * 1995-05-31 1997-02-01 Handotai Energy Kenkyusho Kk
JP3883592B2 (ja) * 1995-08-07 2007-02-21 株式会社半導体エネルギー研究所 レーザ照射方法および半導体作製方法および半導体装置の作製方法および液晶電気光学装置の作製方法
US5817743A (en) * 1996-03-29 1998-10-06 Alliant Techsystems Inc. Process and materials for inducing pre-tilt in liquid crystals and liquid crystal displays
US5731405A (en) * 1996-03-29 1998-03-24 Alliant Techsystems Inc. Process and materials for inducing pre-tilt in liquid crystals and liquid crystal displays
US6759628B1 (en) * 1996-06-20 2004-07-06 Sony Corporation Laser annealing apparatus
TW473783B (en) * 1999-08-13 2002-01-21 Semiconductor Energy Lab Laser apparatus, laser annealing method, and manufacturing method of a semiconductor device
JP2002043245A (ja) * 2000-07-31 2002-02-08 Fujitsu Ltd 結晶性半導体薄膜の形成方法
JP4969024B2 (ja) * 2003-01-21 2012-07-04 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7387922B2 (en) * 2003-01-21 2008-06-17 Semiconductor Energy Laboratory Co., Ltd. Laser irradiation method, method for manufacturing semiconductor device, and laser irradiation system
JP2009135453A (ja) * 2007-10-30 2009-06-18 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法、半導体装置及び電子機器
US9536970B2 (en) * 2010-03-26 2017-01-03 Samsung Electronics Co., Ltd. Three-dimensional semiconductor memory devices and methods of fabricating the same
US11190810B2 (en) 2018-01-26 2021-11-30 Samsung Electronics Co., Ltd. Device and method for compressing image data using quantization parameter and entropy tables

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4897150A (en) * 1988-06-29 1990-01-30 Lasa Industries, Inc. Method of direct write desposition of a conductor on a semiconductor
JPH03140920A (ja) * 1989-10-26 1991-06-14 Matsushita Electric Ind Co Ltd 投写型表示装置及び該投写型表示装置に用いる液晶表示装置
JPH046823A (ja) * 1990-04-24 1992-01-10 Seiko Epson Corp 結晶性半導体薄膜の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100505449B1 (ko) * 1998-12-24 2005-10-14 주식회사 하이닉스반도체 반도체 소자의 폴리사이드 게이트 전극 형성방법

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JPH0669128A (ja) 1994-03-11
KR100270618B1 (ko) 2000-12-01
US5382548A (en) 1995-01-17
JP2997375B2 (ja) 2000-01-11

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