KR930011131A - 에칭처리시의 표면 보호방법 - Google Patents

에칭처리시의 표면 보호방법 Download PDF

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Publication number
KR930011131A
KR930011131A KR1019920020353A KR920020353A KR930011131A KR 930011131 A KR930011131 A KR 930011131A KR 1019920020353 A KR1019920020353 A KR 1019920020353A KR 920020353 A KR920020353 A KR 920020353A KR 930011131 A KR930011131 A KR 930011131A
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KR
South Korea
Prior art keywords
radiation
adhesive tape
sensitive adhesive
etching
etching process
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KR1019920020353A
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English (en)
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KR0156012B1 (ko
Inventor
신이치 이시와타
가즈시게 이와모토
미치오 우에야마
이사무 노구치
Original Assignee
도모마쓰 겐고
후루까와 덴끼 고오교오 가부시끼가이샤
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Publication of KR930011131A publication Critical patent/KR930011131A/ko
Application granted granted Critical
Publication of KR0156012B1 publication Critical patent/KR0156012B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

(목적) 판형상재, 예를들면, 웨이퍼의 에칭처리시에 점착 테이프를 표면 보호함에 있어서, 웨이퍼 주변부분에 노출하고 있는 풀의 에칭액 흡수에 의한 부식열화에서 생기는 풀남음을 방지함과 동시에, 애칭처리시의 발열에 의한 방사선 경화성 점착제의 점착력 변동에서 오는 페턴면상의 풀남음 또는 테이프의 박리불량을 방지하는 것을 목적으로 한다.
(구성) 판형상재를 에칭처리함에 있어서, 비에칭처리부에 표면보호를 위하여 방사선 경화성 점착 테이프를 붙이고, 미리 그 방사선 경화성 점착제층을 방사선 조사하고 경화시킨 후, 에칭처리한다. 그후, 상기 점착 테이프를 판형상재로부터 박리한다.

Description

에칭처리시의 표면 보호방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (8)

  1. 판형상재를 케미칼 에칭처리함에 있어서, 그 판형상재의 비(非)에칭부위에 방사성 경화성 점착 테이프를 붙이고, 방사선 경화성 점착제층을 방사선 조사하여 경화시키는 가운데, 상기 판형상재를 에칭처리하는 것을 특징으로 하는 에칭처리시의 표면보호방법.
  2. 제1항에 있어서, 방사선 경화성 점착테이프에 방사선 조사하고, 그 점착력이 20g/25㎜를 밑돌지 않는 범위로 저하하도록 경화시키는 가운데 에칭처리하는 것을 특징으로 하는 에칭처리시의 표면보호방법.
  3. 제1항에 있어서, 방사선 경화성 점착테이프에 방사선 조사후의 점착력이, 20∼200g/25㎜ 범위에 까지 저하하는 것을 특징으로 하는 에칭처리시의 표면보호방법.
  4. 제1항에 있어서, 에칭처리로서, 불화수소, 염화수소, 황산, 질산, 초산, 과산화수소, 인산 중 적어도 1종을 함유하는 케미칼 에칭액을 사용하는 것을 특징으로 하는 에칭처리시의 표면보호방법.
  5. 제1항에 있어서, 방사선 경화성 점착테이프가, 방사선, 경화성 점착제층을 통하여 피에칭부재인 판형상제의 붙여지는 것을 특징으로 하는 에칭처리시의 표면보호방법.
  6. 제1항에 있어서, 방사선 경화성 점착테이프의 점착제층으로서, 아크릴계 점착제 100중량부와, 탄소－탄소 이중결합을 가지는 화합물 5∼200중량부를 함유하는 것을 특징으로 하는 에칭처리시의 표면보호방법.
  7. 제1항에 있어서, 방사선 경화성 점착 테이프의 필름형상지지체로서, 폴리에틸렌, 아이소택틱 폴리프로필렌, 폴리－4－에틸펜텐－1, 4불화에틸렌, FEP, PFA, 폴리에틸렌 텔레프탈레이트 등으로 대표되도록 방사선 투과성으로 내에칭성을 가지는 재료를 사용한 것을 특징으로 하는 에칭처리시의 표면보호방법.
  8. 제1항에 있어서, 방사선 경화성 점착 테이프가, 자외선 조사에 의하여 경화하는 것을 특징으로 하는 에칭처리시의 표면보호방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920020353A 1991-11-01 1992-10-31 에칭처리시의 표면 보호방법 KR0156012B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP91-313075 1991-11-01
JP31307591 1991-11-01

Publications (2)

Publication Number Publication Date
KR930011131A true KR930011131A (ko) 1993-06-23
KR0156012B1 KR0156012B1 (ko) 1998-12-01

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KR1019920020353A KR0156012B1 (ko) 1991-11-01 1992-10-31 에칭처리시의 표면 보호방법

Country Status (5)

Country Link
US (1) US5300172A (ko)
EP (1) EP0539973A3 (ko)
KR (1) KR0156012B1 (ko)
MY (1) MY108386A (ko)
TW (1) TW230830B (ko)

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JP3763710B2 (ja) * 1999-09-29 2006-04-05 信越化学工業株式会社 防塵用カバーフィルム付きウエハ支持台及びその製造方法
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US6524881B1 (en) * 2000-08-25 2003-02-25 Micron Technology, Inc. Method and apparatus for marking a bare semiconductor die
KR100379824B1 (ko) * 2000-12-20 2003-04-11 엘지.필립스 엘시디 주식회사 식각용액 및 식각용액으로 패턴된 구리배선을 가지는전자기기용 어레이기판
US7169685B2 (en) * 2002-02-25 2007-01-30 Micron Technology, Inc. Wafer back side coating to balance stress from passivation layer on front of wafer and be used as die attach adhesive
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US8661655B2 (en) * 2002-05-24 2014-03-04 Koninklijke Philips N.V. Method suitable for transferring a component supported by a carrier to a desired position on a substrate, and a device designed for this
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WO2021102610A1 (zh) * 2019-11-25 2021-06-03 邦弗特新材料股份有限公司 一种多涂层辐射固化预涂装膜及其制备方法

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Also Published As

Publication number Publication date
EP0539973A2 (en) 1993-05-05
KR0156012B1 (ko) 1998-12-01
TW230830B (ko) 1994-09-21
US5300172A (en) 1994-04-05
MY108386A (en) 1996-09-30
EP0539973A3 (en) 1995-07-12

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