KR930002671B1 - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR930002671B1
KR930002671B1 KR1019890011144A KR890011144A KR930002671B1 KR 930002671 B1 KR930002671 B1 KR 930002671B1 KR 1019890011144 A KR1019890011144 A KR 1019890011144A KR 890011144 A KR890011144 A KR 890011144A KR 930002671 B1 KR930002671 B1 KR 930002671B1
Authority
KR
South Korea
Prior art keywords
insulating film
semiconductor device
wiring layer
gate electrode
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019890011144A
Other languages
English (en)
Korean (ko)
Other versions
KR900003974A (ko
Inventor
다카요시 히구치
Original Assignee
가부시키가이샤 도시바
아오이 죠이치
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 도시바, 아오이 죠이치 filed Critical 가부시키가이샤 도시바
Publication of KR900003974A publication Critical patent/KR900003974A/ko
Application granted granted Critical
Publication of KR930002671B1 publication Critical patent/KR930002671B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019890011144A 1988-08-05 1989-08-04 반도체장치의 제조방법 Expired - Fee Related KR930002671B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63194572A JPH0244753A (ja) 1988-08-05 1988-08-05 半導体装置の製造方法
JP88-194572 1988-08-05

Publications (2)

Publication Number Publication Date
KR900003974A KR900003974A (ko) 1990-03-27
KR930002671B1 true KR930002671B1 (ko) 1993-04-07

Family

ID=16326767

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890011144A Expired - Fee Related KR930002671B1 (ko) 1988-08-05 1989-08-04 반도체장치의 제조방법

Country Status (5)

Country Link
US (1) US5014109A (enExample)
EP (1) EP0362511B1 (enExample)
JP (1) JPH0244753A (enExample)
KR (1) KR930002671B1 (enExample)
DE (1) DE68923047T2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950025908A (ko) * 1994-02-03 1995-09-18 김주용 반도체소자 제조방법
US5619072A (en) * 1995-02-09 1997-04-08 Advanced Micro Devices, Inc. High density multi-level metallization and interconnection structure
JPH1041406A (ja) * 1996-07-18 1998-02-13 Mitsubishi Electric Corp 半導体装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799777A (en) * 1980-12-12 1982-06-21 Toshiba Corp Metal oxide semiconductor type semiconductor device
JPS57177553A (en) * 1981-04-24 1982-11-01 Toshiba Corp Semiconductor
US4617193A (en) * 1983-06-16 1986-10-14 Digital Equipment Corporation Planar interconnect for integrated circuits
JPS6042866A (ja) * 1983-08-19 1985-03-07 Toshiba Corp 半導体装置及びその製造方法
JPS60217657A (ja) * 1984-04-12 1985-10-31 Mitsubishi Electric Corp 半導体集積回路装置の製造方法
US4656732A (en) * 1984-09-26 1987-04-14 Texas Instruments Incorporated Integrated circuit fabrication process
JPS62219542A (ja) * 1986-03-19 1987-09-26 Fuji Electric Co Ltd 半導体装置の製造方法
US4722910A (en) * 1986-05-27 1988-02-02 Analog Devices, Inc. Partially self-aligned metal contact process
JPH07112014B2 (ja) * 1986-07-09 1995-11-29 株式会社日立製作所 半導体記憶装置

Also Published As

Publication number Publication date
JPH0244753A (ja) 1990-02-14
KR900003974A (ko) 1990-03-27
EP0362511A1 (en) 1990-04-11
JPH0583184B2 (enExample) 1993-11-25
DE68923047D1 (de) 1995-07-20
DE68923047T2 (de) 1995-11-30
EP0362511B1 (en) 1995-06-14
US5014109A (en) 1991-05-07

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