KR930001657B1 - Semiconductor memory device having means for replacing defective memory cells - Google Patents

Semiconductor memory device having means for replacing defective memory cells

Info

Publication number
KR930001657B1
KR930001657B1 KR9001096A KR900001096A KR930001657B1 KR 930001657 B1 KR930001657 B1 KR 930001657B1 KR 9001096 A KR9001096 A KR 9001096A KR 900001096 A KR900001096 A KR 900001096A KR 930001657 B1 KR930001657 B1 KR 930001657B1
Authority
KR
South Korea
Prior art keywords
replacing defective
memory device
memory cells
semiconductor memory
defective memory
Prior art date
Application number
KR9001096A
Other languages
English (en)
Inventor
Yasushi Kasa
Yoshihiro Takemae
Masanori Nakasawa
Yuji Arayama
Akira Derui
Sunao Araki
Original Assignee
Fujitsu Ltd
Fujitsu Vlsi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1021337A external-priority patent/JPH02201800A/ja
Priority claimed from JP1030436A external-priority patent/JPH02210697A/ja
Priority claimed from JP3043589A external-priority patent/JP2594638B2/ja
Priority claimed from JP1031562A external-priority patent/JPH02210699A/ja
Priority claimed from JP1031561A external-priority patent/JP2540201B2/ja
Priority claimed from JP1031484A external-priority patent/JPH02210698A/ja
Application filed by Fujitsu Ltd, Fujitsu Vlsi Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of KR930001657B1 publication Critical patent/KR930001657B1/ko

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/816—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout
    • G11C29/822—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout for read only memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/006—Identification

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
KR9001096A 1989-01-31 1990-01-31 Semiconductor memory device having means for replacing defective memory cells KR930001657B1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP1021337A JPH02201800A (ja) 1989-01-31 1989-01-31 半導体記憶装置
JP1030436A JPH02210697A (ja) 1989-02-09 1989-02-09 半導体記憶装置
JP3043589A JP2594638B2 (ja) 1989-02-09 1989-02-09 半導体記憶装置
JP1031562A JPH02210699A (ja) 1989-02-10 1989-02-10 半導体記憶装置
JP1031561A JP2540201B2 (ja) 1989-02-10 1989-02-10 半導体記憶装置
JP1031484A JPH02210698A (ja) 1989-02-10 1989-02-10 半導体メモリ装置

Publications (1)

Publication Number Publication Date
KR930001657B1 true KR930001657B1 (en) 1993-03-08

Family

ID=27548967

Family Applications (1)

Application Number Title Priority Date Filing Date
KR9001096A KR930001657B1 (en) 1989-01-31 1990-01-31 Semiconductor memory device having means for replacing defective memory cells

Country Status (3)

Country Link
EP (2) EP0383452B1 (ko)
KR (1) KR930001657B1 (ko)
DE (1) DE69032844T2 (ko)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2250838A (en) * 1990-12-11 1992-06-17 Honda Motor Co Ltd Patching a program stored in ROM
JPH04278299A (ja) * 1991-03-07 1992-10-02 Sharp Corp 半導体記憶装置
JP2981346B2 (ja) * 1992-08-31 1999-11-22 シャープ株式会社 読み出し専用半導体記憶装置
FR2716566B1 (fr) * 1994-02-23 1996-04-19 Sgs Thomson Microelectronics Circuit de sélection d'éléments de mémoire redondants et mémoire "Flash Eeprom" comportant ledit circuit.
IT1274925B (it) * 1994-09-21 1997-07-29 Texas Instruments Italia Spa Architettura di memoria per dischi a stato solido
JP3230795B2 (ja) * 1995-09-29 2001-11-19 シャープ株式会社 読み出し専用半導体記憶装置
US6188239B1 (en) * 1996-08-12 2001-02-13 Micron Technology, Inc. Semiconductor programmable test arrangement such as an antifuse to ID circuit having common access switches and/or common programming switches
US5896327A (en) * 1997-10-27 1999-04-20 Macronix International Co., Ltd. Memory redundancy circuit for high density memory with extra row and column for failed address storage
JP3948692B2 (ja) * 1999-03-26 2007-07-25 シャープ株式会社 半導体記憶装置
US6768150B1 (en) * 2003-04-17 2004-07-27 Infineon Technologies Aktiengesellschaft Magnetic memory
US7061815B2 (en) * 2003-08-05 2006-06-13 Stmicroelectronics Pvt. Ltd. Semiconductor memory device providing redundancy

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS563499A (en) * 1979-06-25 1981-01-14 Fujitsu Ltd Semiconductor memory device
DE3221268C1 (de) * 1982-06-04 1983-12-15 Siemens AG, 1000 Berlin und 8000 München Speicherbaustein
JPH01224999A (ja) * 1988-03-04 1989-09-07 Mitsubishi Electric Corp 半導体記憶装置
DE68928112T2 (de) * 1988-03-18 1997-11-20 Toshiba Kawasaki Kk Masken-rom mit Ersatzspeicherzellen

Also Published As

Publication number Publication date
EP0686980A1 (en) 1995-12-13
DE69032844T2 (de) 1999-05-12
EP0383452A3 (en) 1992-12-23
DE69032844D1 (de) 1999-01-28
EP0383452A2 (en) 1990-08-22
EP0686980B1 (en) 1998-12-16
EP0383452B1 (en) 1996-12-11

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Legal Events

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A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
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Payment date: 20060223

Year of fee payment: 14

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