KR920013741A - Manufacturing method of NPN transistor - Google Patents

Manufacturing method of NPN transistor Download PDF

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Publication number
KR920013741A
KR920013741A KR1019900019713A KR900019713A KR920013741A KR 920013741 A KR920013741 A KR 920013741A KR 1019900019713 A KR1019900019713 A KR 1019900019713A KR 900019713 A KR900019713 A KR 900019713A KR 920013741 A KR920013741 A KR 920013741A
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KR
South Korea
Prior art keywords
layer
forming
epi
implanting
sio
Prior art date
Application number
KR1019900019713A
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Korean (ko)
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KR930004298B1 (en
Inventor
홍성룡
Original Assignee
문정환
금성일렉트론 주식회사
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Priority to KR1019900019713A priority Critical patent/KR930004298B1/en
Publication of KR920013741A publication Critical patent/KR920013741A/en
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Publication of KR930004298B1 publication Critical patent/KR930004298B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/735—Lateral transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

내용 없음No content

Description

NPN형 트랜지스터의 제조방법Manufacturing method of NPN transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 NPN형 트랜지스터 제조공정도2 is a manufacturing process diagram of the NPN transistor according to the present invention

Claims (1)

P형 기판(1) 위에 선택적인 산화처리를 실시하여 SiO2층(2)을 형성하는 공정과, P-EPI층(3)을 성장시키는 공정과, 상기 제2공정에서의 P-EPI층(3)에 실리콘 에치를 실시하는 공정과, 서멀 산화처리하여 상기 P-EPI(3)과 P-POLY층(5)상에 SiO2층(2)을 형성하는 공정과, 활성영역(6)을 개방하여 N+를 이식하는 공정과, 활성영역(6)에 버리드층(7)을 형성하고 그 위에 2차 EPI층('7)을 형성한 다음 애닐링처리하여 재결정화를 실시하는 공정과, SiO2층(2)과 2차 EPI층('7)위에 산화막(8)을 형성하고, 그 위에 N+를 이식하여 도핑된 폴리층(9)을 형성하는 공정과, 도핑된 폴리층(9)에서 베이스단자로 사용할 부분을 에치하는 공정과, N+를 이식하여 이미터 및 콜렉터 영역을 형성하는 공정 및, 각 단자(B)(E)(C)을 형성하고 보호층(10)을 형성하는 공정으로 구성되는 NPN형 트랜지스터의 제조방법.Performing a selective oxidation treatment on the P-type substrate 1 to form a SiO 2 layer 2, growing a P-EPI layer 3, and a P-EPI layer in the second step ( 3) silicon etch, thermal oxidation treatment to form SiO 2 layer (2) on the P-EPI (3) and P-POLY layer (5), and active region (6) A process of opening and implanting N + , forming a buried layer 7 in the active region 6, forming a secondary EPI layer ('7) thereon, and then annealing to perform recrystallization; Forming an oxide film 8 on the SiO 2 layer 2 and the secondary EPI layer '7, implanting N + thereon to form the doped poly layer 9, and the doped poly layer 9 ), A process of etching the portion to be used as the base terminal, a process of forming an emitter and a collector region by implanting N + , and forming each terminal (B) (E) (C) to form the protective layer 10. Of NPN transistor composed of forming process Manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900019713A 1990-12-01 1990-12-01 Making method of npn type transistor KR930004298B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900019713A KR930004298B1 (en) 1990-12-01 1990-12-01 Making method of npn type transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900019713A KR930004298B1 (en) 1990-12-01 1990-12-01 Making method of npn type transistor

Publications (2)

Publication Number Publication Date
KR920013741A true KR920013741A (en) 1992-07-29
KR930004298B1 KR930004298B1 (en) 1993-05-22

Family

ID=19306919

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900019713A KR930004298B1 (en) 1990-12-01 1990-12-01 Making method of npn type transistor

Country Status (1)

Country Link
KR (1) KR930004298B1 (en)

Also Published As

Publication number Publication date
KR930004298B1 (en) 1993-05-22

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