JP2722829B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device having a channel stopper, and more particularly to a method for manufacturing a channel stopper.

[0002]

2. Description of the Related Art FIG. 3 shows a conventional semiconductor device having such a channel stopper. In this semiconductor device, after an N-type buried layer 2 is formed in an element region of a P-type substrate 1, an N-type epitaxial layer 3 is formed on the entire surface. Then, after forming a P-type element isolation layer 4 to define an element region and forming a silicon oxide film 5 on the entire surface,
A P-type base layer 6 and an N-type emitter layer 7 are formed in the transistor region, and a P-type impurity layer 8 as a resistance electrode is formed in the diffusion resistance region. Then, an N-type impurity layer 12 as a channel stopper is formed in the diffusion resistance region to prevent surface inversion.

[0003]

In the conventional semiconductor device described above, the N-type channel stopper 12 formed in the diffusion resistance region is formed simultaneously with the N-type emitter layer 7 of the NPN transistor. There is a problem that the impurity concentration becomes high and defects are likely to be generated near the surface. Further, since the oxidation time after the impurity is diffused into the channel stopper 12 cannot be made long, the oxide film formed on the surface of the channel stopper becomes thinner than the other portions.
There is a problem that the oxide film of the contact portion becomes thin and is susceptible to electrostatic breakdown.

[0004] For this reason, it is conceivable to lower the concentration of the channel stopper. However, for this purpose, it is necessary to manufacture the channel stopper in an independent process, and there is a problem that the number of steps is increased and the cost is increased. . An object of the present invention is to provide a method of manufacturing a semiconductor device capable of manufacturing a low concentration channel stopper without increasing the number of steps.

[0005] The method of manufacturing a semiconductor device of the present invention, a semiconductor
Form an insulating film on the surface of the base and form a channel stopper
By selectively etching away the insulating film where it forms
Step of forming an opening, including the required concentration of impurities on the entire surface
Before forming a polycrystalline silicon film and performing heat treatment
The semiconductor substrate from the polycrystalline silicon film through the opening;
Diffusing impurities into the body to form the channel stopper
Patterning the polycrystalline silicon film to form a polycrystalline silicon film.
Forming a crystalline silicon resistance element.

[0006]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing a first embodiment of the present invention in the order of manufacturing steps. First, as shown in FIG. 1A, an N-type buried layer 2 is formed in an element region of a P-type silicon substrate 1, and an N-type buried layer 2 is formed thereon.
A type epitaxial layer 3 is grown. Then, a P-type element isolation layer 4 is formed on the N-type epitaxial layer to define an element region. Further, after a silicon oxide film 5 is formed on the entire surface, a P-type base layer 6 and an N-type emitter layer 7 are formed in the transistor region in the same manner as in the prior art, as indicated by a chain line in FIG. In the thermal diffusion resistance region, a P-type impurity, for example, boron is implanted at 30 KeV, about 5 × 10 ¹³ to 1 × 10 ¹⁴ cm ^{-2 by} photolithography using a resist 9 to form a P-type diffusion resistance electrode 8. Form.

Next, as shown in FIG. 1B, after a silicon nitride film 10 is grown on the entire surface by 1500 °, a region for forming an N-type impurity layer as a channel stopper is opened by using a photolithography technique. Then, a polycrystalline silicon film 11 is grown on the entire surface at 1500 °, and an N-type impurity, for example, arsenic is ion-implanted at 70 KeV and 8.0 × 10 ^{13 to} 1.0 × 10 ¹⁴ cm ⁻² .

Next, as shown in FIG.
After growing a silicon oxide film (not shown) by 3000mm by the method,
After removing the oxide film at the electrode portion and the channel stopper forming portion of the polycrystalline silicon resistor by using the photolithography technique, an N-type impurity such as arsenic is applied at 70 KeV and 1 × 10 ¹⁶ cm.
^{-2 will be} introduced. Then, by performing a heat treatment in a nitrogen atmosphere at 950 ° C. for 50 to 70 minutes, N-type impurities are diffused into the polycrystalline silicon film 11 and the N-type epitaxial layer 3 in the diffusion resistance region therefrom. The electrode portion 14 of the resistor and the N-type channel stopper 12 are formed.
Thereafter, the polycrystalline silicon film 11 is selectively patterned to form a polycrystalline silicon resistor 13 on the silicon nitride film 10.

Therefore, in this manufacturing method, the step of forming the polycrystalline silicon resistor 13 after forming the transistor and the diffused resistor, especially the polycrystalline silicon resistor 13
The channel stopper 12 can be formed at the same time as the step of forming the electrode portion 14, and the impurity concentration of the channel stopper 12 can be formed lower than that of the N-type emitter layer of the NPN transistor. Thereby, surface defects are less likely to occur, and a long oxidation time can be taken after diffusion, so that a thick oxide film on the surface can be formed,
Strength against electrostatic breakdown can be increased. Further, since the channel stopper 12 is formed simultaneously with the step of forming the polycrystalline silicon resistor 13, the number of steps is not increased.

FIG. 2 is a sectional view of a second embodiment of a semiconductor device manufactured by using the method of the present invention. In this embodiment, B
In an i-CMOS transistor, a P-type well 15 is formed in an N-type epitaxial layer 3 and an N-type source / drain layer 16 is formed in the P-type well 15 to form an N-type M-type transistor.
It constitutes an OS transistor. And this N-type M
The channel stopper 12 is formed by diffusing an N-type impurity layer between the OS transistors. In this case, too, the channel stopper 12 uses the polycrystalline silicon film 11 for forming the N-type polycrystalline silicon resistor 13. The formation at the same time as this is the same as in the first embodiment.

As described above, the present invention provides a polycrystalline silicon
Polycrystalline silicon for forming a resistor element consisting of a capacitor
Using a film, the impurities contained in this polycrystalline silicon
From the opening in the insulating film of the conductor base to the surface of the semiconductor base
Since the channel stopper is formed by diffusion, the channel stopper can be formed independently of the emitter of the bipolar transistor, the impurity concentration thereof can be reduced, and the occurrence of surface defects is suppressed.
By forming a thick oxide film on the surface, electrostatic breakdown strength can be increased. Also, the resistance element made of polycrystalline silicon
Since the channel stobber can be formed by utilizing a part of the manufacturing process, the cost can be prevented without increasing the number of manufacturing steps.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views showing a first embodiment of the present invention in the order of manufacturing steps.

FIG. 2 is a sectional view of a second embodiment of the present invention.

FIG. 3 is a cross-sectional view of a conventional semiconductor device.

[Explanation of symbols]

Reference Signs List 1 P-type silicon substrate 2 N-type buried layer 3 N-type epitaxial layer 4 P-type element isolation layer 5 silicon oxide film 6 P-type base layer 7 N-type emitter layer 10 silicon nitride film 11 polycrystalline silicon film 12 channel stopper 13 many Crystal silicon resistor 15 P-type well 16 N-type source / drain layer

Claims (1)

(57) [Claims] 1. A semiconductor device having a channel stopper in a semiconductor substrate.
And made of polycrystalline silicon on the surface of the semiconductor substrate.
In the production of a semiconductor device having a resistance element made, before
Forming an insulating film on the surface of the semiconductor substrate;
Selectively etch the insulating film where stoppers are to be formed
Forming an opening by removing
Forming a polycrystalline silicon film containing impurities,
Through the opening from the polycrystalline silicon film
By diffusing impurities into the semiconductor substrate, the channel strike is performed.
Forming a mask, and patterning the polycrystalline silicon film.
Forming a polycrystalline silicon resistor element.
The method of manufacturing a semiconductor device according to claim no possible.