KR900017371A - 디더(dither) 처리방법 - Google Patents

디더(dither) 처리방법 Download PDF

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Publication number
KR900017371A
KR900017371A KR1019900005781A KR900005781A KR900017371A KR 900017371 A KR900017371 A KR 900017371A KR 1019900005781 A KR1019900005781 A KR 1019900005781A KR 900005781 A KR900005781 A KR 900005781A KR 900017371 A KR900017371 A KR 900017371A
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South Korea
Prior art keywords
dither
cell
processing method
macro
random number
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KR1019900005781A
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English (en)
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KR0173456B1 (ko
Inventor
료오헤이 구마가이
Original Assignee
다까도리 스나오
가부시기가이샤 이-제루
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Priority claimed from JP1103695A external-priority patent/JP2928786B2/ja
Priority claimed from JP1147229A external-priority patent/JP2729278B2/ja
Priority claimed from JP1157164A external-priority patent/JP2729279B2/ja
Application filed by 다까도리 스나오, 가부시기가이샤 이-제루 filed Critical 다까도리 스나오
Publication of KR900017371A publication Critical patent/KR900017371A/ko
Application granted granted Critical
Publication of KR0173456B1 publication Critical patent/KR0173456B1/ko

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40—Picture signal circuits
    • H04N1/405—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels
    • H04N1/4055—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a clustered dots or a size modulated halftone pattern
    • H04N1/4058—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a clustered dots or a size modulated halftone pattern with details for producing a halftone screen at an oblique angle
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40—Picture signal circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40—Picture signal circuits
    • H04N1/405—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels
    • H04N1/4051—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a dispersed dots halftone pattern, the dots having substantially the same size
    • H04N1/4052—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a dispersed dots halftone pattern, the dots having substantially the same size by error diffusion, i.e. transferring the binarising error to neighbouring dot decisions

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Processing (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

내용 없음

Description

디더(dither) 처리방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 제1실시예의 매크로디더셀을 나타내는 개념도.
제13도는 매크로디더셀을 처리대상화상에 적용한 제2실시예의 개념도.
제20도는 제3실시예의 블록도.

Claims (10)

  1. 비장형방의 디더셀(D1)-(D4)및 전기한 디더셀을 소정형태로 복수 인접 배열하여 이루어지는 매크로디더셀(MD)을 정의하고, 전기한 디더셀내의 각 화소의 한계치 순의를 정의하며, 전기한 매크로디더셀내의 한계치 순의를 정의하고, 전기한 매크로디더셀내의 디더셀및 디더셀내의 한계치 순위에 따라서 매크로디더셀내의 각 디더셀의 각 화소의 한계치를 정의하는 단계로 이루어진 것을 특징으로 하는 디더처리방법.
  2. 제1항에 있어서, 전기한 매크로디더셀(MD)은 대략 정육각 형상인 것을 특징으로 하는 디더처리방법.
  3. 제2항에 있어서, 전기한 디더셀은 8화소로 구성되어 있는 것을 특징으로 하는 디더처리방법.
  4. 제2항에 있어서, 전기한 매크로디더셀은 전기한 하나의 디더셀의 중심으로 부터 다른 디더셀의 중심까지 거리가 최소로 되도록 디더셀을 4개 배열하여 이루어진 것을 특징으로 하는 디더처리방법.
  5. 제1항 내지 제4항에 있어서, 전기한 매크로디더셀내의 디더셀의 한계치순위는 난수 계열에 기초하여 정의되는 것을 특징으로 하는 디더처리방법.
  6. 제5항에 있어서, 전기한 난수 계열은 랜덤성이 높은 화소패턴의 실제화상에 기초하여 생성되는 것을 특징으로 하는 디더처리방법.
  7. 제5항에 있어서, 전기한 난수계열은 전기한 매크로디더셀내의 각 난수의 출현확률이 거의 균일하도록 정의되는 것을 특징으로 하는 디더처리방법.
  8. 제7항에 있어서, 전기한 난수계열은 난수계열에 기초하여 복수의 난수계열로부터 선택되는 것을 특징으로 하는 디더처리방법.
  9. 처리대상화소의 근방의 2치화화소의 2치화오차를 가중치에 의해 가중하고, 2치화되는 농도를 부가하여, 전기한 2치화되는 농도를 한계치처리하는 디더처리방법에 있어서, 전기한 가중치는 전기한 처리대상화소의 농도에 따라 변화되는 것을 특징으로 하는 디더처리방법.
  10. 원화상을 조직디더에 의해 2치화하여 디더화상을 생성하는 단계와, 디더셀에 대응하는 디더화상내의 각 영역에 대해 대표농도를 계산하는 단계와, 디더화상의 대표농도의 중앙값을 계산하는 단계와, 중앙값의 한계치에 의해 원화상을 2치화하는 단계로 구성되어 있는 것을 특징으로 하는 디더처리방법.
    ※참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900005781A 1989-04-24 1990-04-24 디더 처리방법 KR0173456B1 (ko)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
JP1103695A JP2928786B2 (ja) 1989-04-24 1989-04-24 中間調画像の表現方法
JP???1-?103695? 1989-04-24
JP1-103695 1989-04-24
JP???1-?147229? 1989-06-09
JP1147229A JP2729278B2 (ja) 1989-06-09 1989-06-09 画像の２値化表現方法
JP1-147229 1989-06-09
JP1-157164 1989-06-20
JP1157164A JP2729279B2 (ja) 1989-06-20 1989-06-20 画像の閾値処理方法
JP???1-?157164? 1989-06-20

Publications (2)

Publication Number Publication Date
KR900017371A true KR900017371A (ko) 1990-11-16
KR0173456B1 KR0173456B1 (ko) 1999-03-20

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US (3) US5201013A (ko)
EP (1) EP0394929B1 (ko)
KR (1) KR0173456B1 (ko)
DE (1) DE69022469T2 (ko)

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Also Published As

Publication number Publication date
US5438634A (en) 1995-08-01
EP0394929A3 (en) 1991-09-25
DE69022469D1 (de) 1995-10-26
US5315669A (en) 1994-05-24
DE69022469T2 (de) 1996-03-14
KR0173456B1 (ko) 1999-03-20
EP0394929A2 (en) 1990-10-31
EP0394929B1 (en) 1995-09-20
US5201013A (en) 1993-04-06

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