KR900006981A - 반도체 집적회로 장치 및 그 설계방법 - Google Patents

반도체 집적회로 장치 및 그 설계방법

Info

Publication number
KR900006981A
KR900006981A KR1019890015696A KR890015696A KR900006981A KR 900006981 A KR900006981 A KR 900006981A KR 1019890015696 A KR1019890015696 A KR 1019890015696A KR 890015696 A KR890015696 A KR 890015696A KR 900006981 A KR900006981 A KR 900006981A
Authority
KR
South Korea
Prior art keywords
integrated circuit
semiconductor integrated
circuit device
design method
design
Prior art date
Application number
KR1019890015696A
Other languages
English (en)
Other versions
KR0150778B1 (ko
Inventor
도시오 도이
다께히사 하야시
겐이찌 이시바시
미쯔오 아사이
Original Assignee
가부시끼가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 히다찌세이사꾸쇼 filed Critical 가부시끼가이샤 히다찌세이사꾸쇼
Publication of KR900006981A publication Critical patent/KR900006981A/ko
Application granted granted Critical
Publication of KR0150778B1 publication Critical patent/KR0150778B1/ko

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
KR1019890015696A 1988-10-31 1989-10-31 반도체 집적회로 장치 및 그 설계방법 KR0150778B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63-272970 1988-10-31
JP63272970A JP2834156B2 (ja) 1988-10-31 1988-10-31 半導体集積回路装置

Publications (2)

Publication Number Publication Date
KR900006981A true KR900006981A (ko) 1990-05-09
KR0150778B1 KR0150778B1 (ko) 1998-12-01

Family

ID=17521331

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890015696A KR0150778B1 (ko) 1988-10-31 1989-10-31 반도체 집적회로 장치 및 그 설계방법

Country Status (2)

Country Link
JP (1) JP2834156B2 (ko)
KR (1) KR0150778B1 (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2855905B2 (ja) * 1990-09-13 1999-02-10 日本電気株式会社 半導体集積回路装置
TW399319B (en) 1997-03-19 2000-07-21 Hitachi Ltd Semiconductor device
JP4204444B2 (ja) 2003-11-04 2009-01-07 パナソニック株式会社 半導体集積回路の設計方法
JP2005347591A (ja) * 2004-06-04 2005-12-15 Matsushita Electric Ind Co Ltd スタンダードセル、スタンダードセル方式の半導体集積回路装置および半導体集積回路装置のレイアウト設計方法

Also Published As

Publication number Publication date
JPH02121349A (ja) 1990-05-09
JP2834156B2 (ja) 1998-12-09
KR0150778B1 (ko) 1998-12-01

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