KR890011011A - 반도체 기판의 실리콘 산화물층이 스트립된 반도체 장치 제조 방법 - Google Patents
반도체 기판의 실리콘 산화물층이 스트립된 반도체 장치 제조 방법 Download PDFInfo
- Publication number
- KR890011011A KR890011011A KR1019880015671A KR880015671A KR890011011A KR 890011011 A KR890011011 A KR 890011011A KR 1019880015671 A KR1019880015671 A KR 1019880015671A KR 880015671 A KR880015671 A KR 880015671A KR 890011011 A KR890011011 A KR 890011011A
- Authority
- KR
- South Korea
- Prior art keywords
- oxide layer
- semiconductor substrate
- silicon oxide
- semiconductor device
- manufacturing
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims 7
- 238000000034 method Methods 0.000 title claims 5
- 238000004519 manufacturing process Methods 0.000 title claims 4
- 239000000758 substrate Substances 0.000 title claims 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims 3
- 229910052814 silicon oxide Inorganic materials 0.000 title claims 3
- 229920002120 photoresistant polymer Polymers 0.000 claims 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 238000002485 combustion reaction Methods 0.000 claims 1
- 230000005684 electric field Effects 0.000 claims 1
- 230000005611 electricity Effects 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
- G03F7/427—Stripping or agents therefor using plasma means only
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도 내지 3도는 상업적으로 이용가능한“싱글 웨이퍼”장치 실시예의 개략도.
Claims (5)
- 반도체 기판의 실리콘 산화물층의 감광성 내식막이 스트립되고, 감광성 내식막을 지나 반도체 기판이 산소-함유, 플라즈마를 처리실에서 처리하는 반도체 장치 제조방법에 있어서, 상기 반도체 기판은 제1 전극을 통해 정극성 단자 및 처리실내에 어떤 거리를 두고 배열된 제2전극을 통해 전기 공급원의 음극성 단자에 연결되며, 결과로서 전기적 필드는 실리콘 산화물층과 상기 플라즈마 사이에서 조절되는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 1항에 있어서, 제1 전극은 감광성 내식막으로 피복 안된 반도체 기판의 측에 연결된 것을 특징으로 하는 반도체 장치 제조 방법.
- 제1 또는 2항에 있어서, 제2전극은 전기 공급원의 음극성 단자 연결을 위해 처리실의 전기적 전도벽인 것을 특징으로 하는 반도체 장치 제조 방법.
- 제1,2 또는 3항에 있어서, 상기 전기 공급원은 산화물층에서 발생된 4-8MV/㎝ 정도의 필드 세기를 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제1,2,3 또는 4항에 있어서, 상기 전기 공급원은 오직 제조 끝과정에서 처리 연소실로부터 모든 플라즈마가 제거된 후 스위치 오프되는 것을 특징으로 하는 반도체 장치 제조 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8702875 | 1987-12-01 | ||
NL8702875A NL8702875A (nl) | 1987-12-01 | 1987-12-01 | Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij fotolak op een laag van siliciumoxide op een halfgeleidersubstraat wordt verwijderd. |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890011011A true KR890011011A (ko) | 1989-08-12 |
KR0134380B1 KR0134380B1 (ko) | 1998-04-20 |
Family
ID=19851004
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019880015671A KR0134380B1 (ko) | 1987-12-01 | 1988-11-28 | 반도체 기판의 산화 실리콘층 상의 포토레지스트가 제거된 반도체 장치 제조방법. |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0320045B1 (ko) |
JP (1) | JP2628729B2 (ko) |
KR (1) | KR0134380B1 (ko) |
DE (1) | DE3887740T2 (ko) |
NL (1) | NL8702875A (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3251184B2 (ja) * | 1996-11-01 | 2002-01-28 | 日本電気株式会社 | レジスト除去方法及びレジスト除去装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4233109A (en) * | 1976-01-16 | 1980-11-11 | Zaidan Hojin Handotai Kenkyu Shinkokai | Dry etching method |
JPS5613480A (en) * | 1979-07-13 | 1981-02-09 | Hitachi Ltd | Dry etching apparatus |
US4298429A (en) * | 1979-09-17 | 1981-11-03 | Beloit Corporation | Means for effecting cross direction fiber orientation in a papermaking machine headbox |
JPS5681678A (en) * | 1979-12-05 | 1981-07-03 | Toshiba Corp | Method and apparatus for plasma etching |
US4333814A (en) * | 1979-12-26 | 1982-06-08 | Western Electric Company, Inc. | Methods and apparatus for improving an RF excited reactive gas plasma |
JPS58131628U (ja) * | 1982-03-01 | 1983-09-05 | 沖電気工業株式会社 | 半導体製造装置の汚染のモニタ装置 |
JPS5980932A (ja) * | 1983-08-31 | 1984-05-10 | Hitachi Ltd | プラズマ処理装置 |
JPS60154621A (ja) * | 1984-01-25 | 1985-08-14 | Hitachi Ltd | 真空処理方法 |
US4581100A (en) * | 1984-10-29 | 1986-04-08 | International Business Machines Corporation | Mixed excitation plasma etching system |
-
1987
- 1987-12-01 NL NL8702875A patent/NL8702875A/nl not_active Application Discontinuation
-
1988
- 1988-11-28 DE DE3887740T patent/DE3887740T2/de not_active Expired - Fee Related
- 1988-11-28 KR KR1019880015671A patent/KR0134380B1/ko not_active IP Right Cessation
- 1988-11-28 EP EP88202710A patent/EP0320045B1/en not_active Expired - Lifetime
- 1988-11-30 JP JP63301081A patent/JP2628729B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE3887740T2 (de) | 1994-07-28 |
EP0320045A1 (en) | 1989-06-14 |
KR0134380B1 (ko) | 1998-04-20 |
DE3887740D1 (de) | 1994-03-24 |
NL8702875A (nl) | 1989-07-03 |
JP2628729B2 (ja) | 1997-07-09 |
EP0320045B1 (en) | 1994-02-09 |
JPH01194421A (ja) | 1989-08-04 |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20021203 Year of fee payment: 6 |
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LAPS | Lapse due to unpaid annual fee |