KR830008393A - 반도체기판의 제조방법 - Google Patents

반도체기판의 제조방법 Download PDF

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Publication number
KR830008393A
KR830008393A KR1019810004814A KR810004814A KR830008393A KR 830008393 A KR830008393 A KR 830008393A KR 1019810004814 A KR1019810004814 A KR 1019810004814A KR 810004814 A KR810004814 A KR 810004814A KR 830008393 A KR830008393 A KR 830008393A
Authority
KR
South Korea
Prior art keywords
insulating film
semiconductor substrate
impurity layer
manufacturing
mirror surface
Prior art date
Application number
KR1019810004814A
Other languages
English (en)
Other versions
KR860000157B1 (ko
Inventor
쇼오이찌 기타네
시게루 혼죠오
구니요시 오오에
후미오 토비오까
Original Assignee
사바 쇼오이찌
도오쿄오 시바우라덴기 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 사바 쇼오이찌, 도오쿄오 시바우라덴기 가부시기가이샤 filed Critical 사바 쇼오이찌
Publication of KR830008393A publication Critical patent/KR830008393A/ko
Application granted granted Critical
Publication of KR860000157B1 publication Critical patent/KR860000157B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Bipolar Transistors (AREA)

Abstract

내용 없음

Description

반도체기판의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1(a)도-제1(f)도는 본 발명방법을 제조공정순서에 따라 도시한 설명도.

Claims (1)

  1. 도전형의 반도체기체(基體)의 양면에 동도전형의 불순물층을 형성하고, 이 불순물층의 표면에 제1의 절연막을 형성하고, 이어서 상기 반도체기판의 편면축을 소정의 깊이까지 연삭(硏削)하여 상기 제1의 절연막과 불순물층의 한쪽을 제거한 다음 이 제거면에 경면사상을 실시한 후, 경면사상면 및 잔존한 상기 제1의 절연막의 표면에 제2의 절연막, 보호막, 및 제3의 절연막을 차례로 형성하고, 이것에 가압상태의 산화분위기중에서 상기 불순물층과 동도전형의 불순물확산을 실시한 다음 제1의 절연막, 제2의 절연막, 보호막 및 제3의 절연막을 제거시키는 것을 특징으로 하는 반도체기판의 제조방법.
    ※참고사항:최초출원 내용에 의하여 공개하는 것임.
KR1019810004814A 1980-12-12 1981-12-09 반도체기판의 제조방법 KR860000157B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP175305 1980-12-12
JP55175305A JPS5799736A (en) 1980-12-12 1980-12-12 Fabrication of semiconductor substrate
JP55-175305 1980-12-12

Publications (2)

Publication Number Publication Date
KR830008393A true KR830008393A (ko) 1983-11-18
KR860000157B1 KR860000157B1 (ko) 1986-02-27

Family

ID=15993768

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019810004814A KR860000157B1 (ko) 1980-12-12 1981-12-09 반도체기판의 제조방법

Country Status (4)

Country Link
US (1) US4391658A (ko)
JP (1) JPS5799736A (ko)
KR (1) KR860000157B1 (ko)
DE (1) DE3148959C2 (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5024867A (en) * 1987-10-28 1991-06-18 Kabushiki Kaisha Toshiba Dopant film and methods of diffusing impurity into and manufacturing a semiconductor wafer
JP6914587B2 (ja) * 2017-05-25 2021-08-04 株式会社ディスコ ウェーハの加工方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2974073A (en) * 1958-12-04 1961-03-07 Rca Corp Method of making phosphorus diffused silicon semiconductor devices
US3507714A (en) * 1967-08-16 1970-04-21 Westinghouse Electric Corp High current single diffused transistor
GB1273199A (en) * 1968-10-21 1972-05-03 Hitachi Ltd A method for manufacturing a semiconductor device having diffusion junctions
US3775197A (en) * 1972-01-05 1973-11-27 A Sahagun Method to produce high concentrations of dopant in silicon
US3963523A (en) * 1973-04-26 1976-06-15 Matsushita Electronics Corporation Method of manufacturing semiconductor devices
US3914138A (en) * 1974-08-16 1975-10-21 Westinghouse Electric Corp Method of making semiconductor devices by single step diffusion
US3956036A (en) * 1975-02-10 1976-05-11 Victory Engineering Corporation Method of diffusing silicon slices with dopant at high temperatures
US4105476A (en) * 1977-05-02 1978-08-08 Solitron Devices, Inc. Method of manufacturing semiconductors
JPS5467778A (en) * 1977-11-10 1979-05-31 Toshiba Corp Production of semiconductor device
US4249968A (en) * 1978-12-29 1981-02-10 International Business Machines Corporation Method of manufacturing a metal-insulator-semiconductor utilizing a multiple stage deposition of polycrystalline layers
US4233093A (en) * 1979-04-12 1980-11-11 Pel Chow Process for the manufacture of PNP transistors high power

Also Published As

Publication number Publication date
DE3148959A1 (de) 1982-06-24
US4391658A (en) 1983-07-05
JPS5799736A (en) 1982-06-21
DE3148959C2 (de) 1985-04-18
KR860000157B1 (ko) 1986-02-27

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