KR20220030279A - 인쇄회로기판 제조 방법 및 상기 제조 방법에 따라 제조된 인쇄회로기판 - Google Patents

인쇄회로기판 제조 방법 및 상기 제조 방법에 따라 제조된 인쇄회로기판 Download PDF

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Publication number
KR20220030279A
KR20220030279A KR1020227003720A KR20227003720A KR20220030279A KR 20220030279 A KR20220030279 A KR 20220030279A KR 1020227003720 A KR1020227003720 A KR 1020227003720A KR 20227003720 A KR20227003720 A KR 20227003720A KR 20220030279 A KR20220030279 A KR 20220030279A
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KR
South Korea
Prior art keywords
metal layer
substrate
cover metal
trench
conductor structure
Prior art date
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Pending
Application number
KR1020227003720A
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English (en)
Korean (ko)
Inventor
크리스티앙 슈미트
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게부르. 쉬미트 게엠베하
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Publication of KR20220030279A publication Critical patent/KR20220030279A/ko
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0041Etching of the substrate by chemical or physical means by plasma etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0376Flush conductors, i.e. flush with the surface of the printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845Stepped hole, via, edge, bump or conductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0548Masks
    • H05K2203/0554Metal used as mask for etching vias, e.g. by laser ablation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0585Second resist used as mask for selective stripping of first resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/0733Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679Aligning added circuit layers or via connections relative to previous circuit layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
KR1020227003720A 2019-07-04 2020-06-18 인쇄회로기판 제조 방법 및 상기 제조 방법에 따라 제조된 인쇄회로기판 Pending KR20220030279A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102019209889.4 2019-07-04
DE102019209889.4A DE102019209889A1 (de) 2019-07-04 2019-07-04 Verfahren zur Leiterplattenherstellung sowie gemäß dem Verfahren hergestellte Leiterplatten
PCT/EP2020/067042 WO2021001167A1 (de) 2019-07-04 2020-06-18 VERFAHREN ZUR LEITERPLATTENHERSTELLUNG SOWIE GEMÄß DEM VERFAHREN HERGESTELLTE LEITERPLATTEN

Publications (1)

Publication Number Publication Date
KR20220030279A true KR20220030279A (ko) 2022-03-10

Family

ID=71120168

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020227003720A Pending KR20220030279A (ko) 2019-07-04 2020-06-18 인쇄회로기판 제조 방법 및 상기 제조 방법에 따라 제조된 인쇄회로기판

Country Status (8)

Country Link
US (1) US20220361341A1 (https=)
EP (1) EP3994963A1 (https=)
JP (1) JP2022537656A (https=)
KR (1) KR20220030279A (https=)
CN (1) CN114009154A (https=)
DE (1) DE102019209889A1 (https=)
TW (1) TWI873155B (https=)
WO (1) WO2021001167A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021209939A1 (de) 2021-09-08 2023-03-09 Gebr. Schmid Gmbh Verfahren zur Leiterplattenherstellung und Leiterplatte
CN115884494A (zh) * 2021-09-28 2023-03-31 深南电路股份有限公司 一种线路内埋方法及线路内埋pcb板
CN114725026A (zh) * 2022-03-04 2022-07-08 苏州链芯半导体科技有限公司 一种叠加先进塑料的柔性无芯3d印刷集成电路模压工艺
CN114745845B (zh) * 2022-04-30 2023-08-08 苏州浪潮智能科技有限公司 一种印刷电路板及制造方法
DE102023116529A1 (de) 2023-06-23 2024-12-24 Gebr. Schmid Gmbh Verfahren zur Leiterplattenherstellung
DE102024125859A1 (de) * 2024-09-09 2026-03-12 Gebr. Schmid Gmbh Verfahren zur Herstellung mehrschichtiger Substrate mit einer integrierten Leiterstruktur und gemäss dem Verfahren herstellbare mehrschichtige Substrate

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3373256D1 (en) * 1983-05-19 1987-10-01 Ibm Deutschland Process for manufacturing printed circuits with metallic conductor patterns embedded in the isolating substrate
JPH0724328B2 (ja) * 1989-07-03 1995-03-15 ポリプラスチックス株式会社 精密細線回路用成形品の製造方法
US5173442A (en) * 1990-07-23 1992-12-22 Microelectronics And Computer Technology Corporation Methods of forming channels and vias in insulating layers
US5244538A (en) * 1991-07-26 1993-09-14 Microelectronics And Computer Technology Corporation Method of patterning metal on a substrate using direct-write deposition of a mask
JP3361556B2 (ja) * 1992-09-25 2003-01-07 日本メクトロン株式会社 回路配線パタ−ンの形成法
JPH07240568A (ja) * 1994-02-28 1995-09-12 Mitsubishi Electric Corp 回路基板およびその製造方法
JP3726500B2 (ja) * 1997-07-28 2005-12-14 株式会社日立製作所 配線板及びその製造方法並びに無電解めっき方法
US6518160B1 (en) * 1998-02-05 2003-02-11 Tessera, Inc. Method of manufacturing connection components using a plasma patterned mask
US7091589B2 (en) * 2002-12-11 2006-08-15 Dai Nippon Printing Co., Ltd. Multilayer wiring board and manufacture method thereof
JP2005332928A (ja) * 2004-05-19 2005-12-02 Sumitomo Heavy Ind Ltd プリント配線板の製造方法
US20060127686A1 (en) * 2004-12-15 2006-06-15 Meloni Paul A Thermally conductive polyimide film composites having high thermal conductivity useful in an electronic device
TWI253714B (en) * 2004-12-21 2006-04-21 Phoenix Prec Technology Corp Method for fabricating a multi-layer circuit board with fine pitch
KR101022914B1 (ko) * 2008-11-04 2011-03-16 삼성전기주식회사 인쇄회로기판의 제조방법
JP5892157B2 (ja) * 2011-03-25 2016-03-23 住友ベークライト株式会社 プリント配線基板、プリント配線基板の製造方法および半導体装置
KR101267277B1 (ko) * 2011-05-19 2013-05-24 한국기계연구원 유연기판의 금속배선 형성방법
CN102315163A (zh) * 2011-09-28 2012-01-11 上海华力微电子有限公司 超低介电常数薄膜铜互连的制作方法
US20140027163A1 (en) * 2012-07-30 2014-01-30 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method for manufacturing the same
JP6044592B2 (ja) * 2014-05-29 2016-12-14 トヨタ自動車株式会社 多層配線基板及びその製造方法

Also Published As

Publication number Publication date
JP2022537656A (ja) 2022-08-29
CN114009154A (zh) 2022-02-01
WO2021001167A1 (de) 2021-01-07
TW202109622A (zh) 2021-03-01
DE102019209889A1 (de) 2021-01-07
US20220361341A1 (en) 2022-11-10
EP3994963A1 (de) 2022-05-11
TWI873155B (zh) 2025-02-21

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