KR20130086271A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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KR20130086271A
KR20130086271A KR1020120148030A KR20120148030A KR20130086271A KR 20130086271 A KR20130086271 A KR 20130086271A KR 1020120148030 A KR1020120148030 A KR 1020120148030A KR 20120148030 A KR20120148030 A KR 20120148030A KR 20130086271 A KR20130086271 A KR 20130086271A
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Korean (ko)
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카즈토요 타카노
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미쓰비시덴키 가부시키가이샤
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1404—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase using predeposition followed by drive-in of impurities into the semiconductor surface, e.g. predeposition from a gaseous phase
    • H10P32/1406—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase using predeposition followed by drive-in of impurities into the semiconductor surface, e.g. predeposition from a gaseous phase by ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60—Impurity distributions or concentrations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020120148030A 2012-01-24 2012-12-18 반도체장치 및 그 제조방법 Ceased KR20130086271A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012011869A JP5765251B2 (ja) 2012-01-24 2012-01-24 半導体装置及びその製造方法
JPJP-P-2012-011869 2012-01-24

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KR1020140119114A Division KR101550675B1 (ko) 2012-01-24 2014-09-05 반도체장치 및 그 제조방법

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KR20130086271A true KR20130086271A (ko) 2013-08-01

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KR1020120148030A Ceased KR20130086271A (ko) 2012-01-24 2012-12-18 반도체장치 및 그 제조방법
KR1020140119114A Active KR101550675B1 (ko) 2012-01-24 2014-09-05 반도체장치 및 그 제조방법

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Country Link
US (1) US9093310B2 (https=)
JP (1) JP5765251B2 (https=)
KR (2) KR20130086271A (https=)
CN (1) CN103219364B (https=)
DE (1) DE102012219645B4 (https=)

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CN103489917B (zh) * 2013-10-22 2016-09-21 东南大学 一种高雪崩耐量能力的纵向双扩散金属氧化物半导体结构
CN104934470B (zh) * 2014-03-18 2018-05-29 国家电网公司 一种igbt芯片及其制造方法
DE102014005879B4 (de) * 2014-04-16 2021-12-16 Infineon Technologies Ag Vertikale Halbleitervorrichtung
US9397213B2 (en) 2014-08-29 2016-07-19 Freescale Semiconductor, Inc. Trench gate FET with self-aligned source contact
US9553184B2 (en) * 2014-08-29 2017-01-24 Nxp Usa, Inc. Edge termination for trench gate FET
CN105390397A (zh) * 2014-09-04 2016-03-09 北大方正集团有限公司 变掺杂器件制作方法及变掺杂器件
JP2016174030A (ja) * 2015-03-16 2016-09-29 株式会社東芝 半導体装置
US9680003B2 (en) 2015-03-27 2017-06-13 Nxp Usa, Inc. Trench MOSFET shield poly contact
WO2017115434A1 (ja) * 2015-12-28 2017-07-06 三菱電機株式会社 半導体装置、半導体装置の製造方法
DE102016118012A1 (de) 2016-09-23 2018-03-29 Infineon Technologies Ag Halbleiterbauelement und Verfahren zum Bilden eines Halbleiterbauelements
WO2018135147A1 (ja) 2017-01-17 2018-07-26 富士電機株式会社 半導体装置および半導体装置の製造方法
CN107579057A (zh) * 2017-09-14 2018-01-12 全球能源互联网研究院 能进行终端横向耐压测试的igbt版图
JP7052476B2 (ja) 2018-03-27 2022-04-12 三菱電機株式会社 半導体装置
JP7172216B2 (ja) 2018-07-13 2022-11-16 富士電機株式会社 半導体装置および半導体回路装置
CN111900087B (zh) * 2020-08-31 2022-09-20 华虹半导体(无锡)有限公司 Igbt器件的制造方法
JP7580352B2 (ja) * 2021-09-01 2024-11-11 三菱電機株式会社 半導体装置、半導体装置の製造方法、および電力変換装置
KR102414388B1 (ko) * 2022-03-24 2022-06-29 (주) 트리노테크놀로지 Vld 구조의 내압 영역을 가지는 전력 반도체 장치 및 그 제조 방법

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US4345265A (en) 1980-04-14 1982-08-17 Supertex, Inc. MOS Power transistor with improved high-voltage capability
JPH03180074A (ja) * 1989-12-08 1991-08-06 Fujitsu Ltd 半導体装置
US5686750A (en) 1991-09-27 1997-11-11 Koshiba & Partners Power semiconductor device having improved reverse recovery voltage
EP0768714B1 (en) 1995-10-09 2003-09-17 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Construction method for power devices with deep edge ring
JP4122113B2 (ja) * 1999-06-24 2008-07-23 新電元工業株式会社 高破壊耐量電界効果型トランジスタ
JP4357753B2 (ja) 2001-01-26 2009-11-04 株式会社東芝 高耐圧半導体装置
DE102005023668B3 (de) 2005-05-23 2006-11-09 Infineon Technologies Ag Halbleiterbauelement mit einer Randstruktur mit Spannungsdurchbruch im linearen Bereich
JP2008103529A (ja) 2006-10-19 2008-05-01 Toyota Central R&D Labs Inc 半導体装置
JP4621708B2 (ja) 2007-05-24 2011-01-26 株式会社東芝 半導体装置及びその製造方法
US8564088B2 (en) 2008-08-19 2013-10-22 Infineon Technologies Austria Ag Semiconductor device having variably laterally doped zone with decreasing concentration formed in an edge region
US8716792B2 (en) 2008-09-30 2014-05-06 Infineon Technologies Austria Ag Semiconductor device with a charge carrier compensation structure and method for the production of a semiconductor device
JP5515922B2 (ja) 2010-03-24 2014-06-11 富士電機株式会社 半導体装置
JP4864153B2 (ja) 2010-06-30 2012-02-01 株式会社小松製作所 ラバースプリング装置を架設したオフロードトラック
JP6067957B2 (ja) 2011-02-15 2017-01-25 三菱電機株式会社 半導体装置

Also Published As

Publication number Publication date
KR101550675B1 (ko) 2015-09-08
DE102012219645B4 (de) 2022-05-05
CN103219364B (zh) 2016-06-15
DE102012219645A1 (de) 2013-07-25
US20130187240A1 (en) 2013-07-25
JP5765251B2 (ja) 2015-08-19
KR20140117331A (ko) 2014-10-07
JP2013152981A (ja) 2013-08-08
US9093310B2 (en) 2015-07-28
CN103219364A (zh) 2013-07-24

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