KR20050084328A - 사전할당된 여분 아키텍처를 사용한 메모리 어레이들의자체 수리 - Google Patents
사전할당된 여분 아키텍처를 사용한 메모리 어레이들의자체 수리 Download PDFInfo
- Publication number
- KR20050084328A KR20050084328A KR1020057011052A KR20057011052A KR20050084328A KR 20050084328 A KR20050084328 A KR 20050084328A KR 1020057011052 A KR1020057011052 A KR 1020057011052A KR 20057011052 A KR20057011052 A KR 20057011052A KR 20050084328 A KR20050084328 A KR 20050084328A
- Authority
- KR
- South Korea
- Prior art keywords
- memory
- subblock
- threshold voltage
- block
- check
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000015654 memory Effects 0.000 title claims abstract description 129
- 238000003491 array Methods 0.000 title description 4
- 238000000034 method Methods 0.000 claims abstract description 44
- 230000008439 repair process Effects 0.000 claims description 34
- 238000012360 testing method Methods 0.000 claims description 29
- 230000002950 deficient Effects 0.000 claims description 22
- 230000007547 defect Effects 0.000 claims description 20
- 238000007689 inspection Methods 0.000 description 18
- RBSXHDIPCIWOMG-UHFFFAOYSA-N 1-(4,6-dimethoxypyrimidin-2-yl)-3-(2-ethylsulfonylimidazo[1,2-a]pyridin-3-yl)sulfonylurea Chemical compound CCS(=O)(=O)C=1N=C2C=CC=CN2C=1S(=O)(=O)NC(=O)NC1=NC(OC)=CC(OC)=N1 RBSXHDIPCIWOMG-UHFFFAOYSA-N 0.000 description 6
- 238000004458 analytical method Methods 0.000 description 5
- 238000005259 measurement Methods 0.000 description 5
- 238000012545 processing Methods 0.000 description 4
- 238000007792 addition Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000008707 rearrangement Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012812 general test Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
- G11C29/4401—Indication or identification of errors, e.g. for repair for self repair
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/327,641 US20040123181A1 (en) | 2002-12-20 | 2002-12-20 | Self-repair of memory arrays using preallocated redundancy (PAR) architecture |
| US10/327,641 | 2002-12-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20050084328A true KR20050084328A (ko) | 2005-08-26 |
Family
ID=32594306
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020057011052A Withdrawn KR20050084328A (ko) | 2002-12-20 | 2003-09-30 | 사전할당된 여분 아키텍처를 사용한 메모리 어레이들의자체 수리 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20040123181A1 (https=) |
| JP (1) | JP2006511904A (https=) |
| KR (1) | KR20050084328A (https=) |
| CN (1) | CN1717749A (https=) |
| AU (1) | AU2003275306A1 (https=) |
| TW (1) | TWI312517B (https=) |
| WO (1) | WO2004061862A1 (https=) |
Families Citing this family (76)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7154886B2 (en) | 2002-07-22 | 2006-12-26 | Qlogic Corporation | Method and system for primary blade selection in a multi-module fiber channel switch |
| US7334046B1 (en) | 2002-08-05 | 2008-02-19 | Qlogic, Corporation | System and method for optimizing frame routing in a network |
| US7397768B1 (en) | 2002-09-11 | 2008-07-08 | Qlogic, Corporation | Zone management in a multi-module fibre channel switch |
| US7362717B1 (en) | 2002-10-03 | 2008-04-22 | Qlogic, Corporation | Method and system for using distributed name servers in multi-module fibre channel switches |
| US7319669B1 (en) | 2002-11-22 | 2008-01-15 | Qlogic, Corporation | Method and system for controlling packet flow in networks |
| US20060001669A1 (en) * | 2002-12-02 | 2006-01-05 | Sehat Sutardja | Self-reparable semiconductor and method thereof |
| US7185225B2 (en) * | 2002-12-02 | 2007-02-27 | Marvell World Trade Ltd. | Self-reparable semiconductor and method thereof |
| US7340644B2 (en) * | 2002-12-02 | 2008-03-04 | Marvell World Trade Ltd. | Self-reparable semiconductor and method thereof |
| EP1447813B9 (en) * | 2003-02-12 | 2008-10-22 | Infineon Technologies AG | Memory built-in self repair (MBISR) circuits / devices and method for repairing a memory comprising a memory built-in self repair (MBISR) structure |
| US7620059B2 (en) | 2003-07-16 | 2009-11-17 | Qlogic, Corporation | Method and apparatus for accelerating receive-modify-send frames in a fibre channel network |
| US7471635B2 (en) | 2003-07-16 | 2008-12-30 | Qlogic, Corporation | Method and apparatus for test pattern generation |
| US7463646B2 (en) | 2003-07-16 | 2008-12-09 | Qlogic Corporation | Method and system for fibre channel arbitrated loop acceleration |
| US7525910B2 (en) | 2003-07-16 | 2009-04-28 | Qlogic, Corporation | Method and system for non-disruptive data capture in networks |
| US7453802B2 (en) | 2003-07-16 | 2008-11-18 | Qlogic, Corporation | Method and apparatus for detecting and removing orphaned primitives in a fibre channel network |
| US7388843B2 (en) * | 2003-07-16 | 2008-06-17 | Qlogic, Corporation | Method and apparatus for testing loop pathway integrity in a fibre channel arbitrated loop |
| US7355966B2 (en) * | 2003-07-16 | 2008-04-08 | Qlogic, Corporation | Method and system for minimizing disruption in common-access networks |
| US7684401B2 (en) | 2003-07-21 | 2010-03-23 | Qlogic, Corporation | Method and system for using extended fabric features with fibre channel switch elements |
| US7420982B2 (en) | 2003-07-21 | 2008-09-02 | Qlogic, Corporation | Method and system for keeping a fibre channel arbitrated loop open during frame gaps |
| US7477655B2 (en) | 2003-07-21 | 2009-01-13 | Qlogic, Corporation | Method and system for power control of fibre channel switches |
| US7894348B2 (en) | 2003-07-21 | 2011-02-22 | Qlogic, Corporation | Method and system for congestion control in a fibre channel switch |
| US7580354B2 (en) | 2003-07-21 | 2009-08-25 | Qlogic, Corporation | Multi-speed cut through operation in fibre channel switches |
| US7525983B2 (en) | 2003-07-21 | 2009-04-28 | Qlogic, Corporation | Method and system for selecting virtual lanes in fibre channel switches |
| US7630384B2 (en) | 2003-07-21 | 2009-12-08 | Qlogic, Corporation | Method and system for distributing credit in fibre channel systems |
| US7522522B2 (en) | 2003-07-21 | 2009-04-21 | Qlogic, Corporation | Method and system for reducing latency and congestion in fibre channel switches |
| US7583597B2 (en) | 2003-07-21 | 2009-09-01 | Qlogic Corporation | Method and system for improving bandwidth and reducing idles in fibre channel switches |
| US7522529B2 (en) | 2003-07-21 | 2009-04-21 | Qlogic, Corporation | Method and system for detecting congestion and over subscription in a fibre channel network |
| US7573909B2 (en) | 2003-07-21 | 2009-08-11 | Qlogic, Corporation | Method and system for programmable data dependant network routing |
| US7466700B2 (en) | 2003-07-21 | 2008-12-16 | Qlogic, Corporation | LUN based hard zoning in fibre channel switches |
| US7430175B2 (en) | 2003-07-21 | 2008-09-30 | Qlogic, Corporation | Method and system for managing traffic in fibre channel systems |
| US7406092B2 (en) | 2003-07-21 | 2008-07-29 | Qlogic, Corporation | Programmable pseudo virtual lanes for fibre channel systems |
| US7447224B2 (en) | 2003-07-21 | 2008-11-04 | Qlogic, Corporation | Method and system for routing fibre channel frames |
| US7512067B2 (en) | 2003-07-21 | 2009-03-31 | Qlogic, Corporation | Method and system for congestion control based on optimum bandwidth allocation in a fibre channel switch |
| US7558281B2 (en) | 2003-07-21 | 2009-07-07 | Qlogic, Corporation | Method and system for configuring fibre channel ports |
| US7646767B2 (en) | 2003-07-21 | 2010-01-12 | Qlogic, Corporation | Method and system for programmable data dependant network routing |
| US7792115B2 (en) | 2003-07-21 | 2010-09-07 | Qlogic, Corporation | Method and system for routing and filtering network data packets in fibre channel systems |
| KR100548274B1 (ko) * | 2003-07-23 | 2006-02-02 | 엘지전자 주식회사 | 세탁기의 포량 검출방법 |
| US7352701B1 (en) | 2003-09-19 | 2008-04-01 | Qlogic, Corporation | Buffer to buffer credit recovery for in-line fibre channel credit extension devices |
| US7564789B2 (en) | 2004-02-05 | 2009-07-21 | Qlogic, Corporation | Method and system for reducing deadlock in fibre channel fabrics using virtual lanes |
| US7480293B2 (en) | 2004-02-05 | 2009-01-20 | Qlogic, Corporation | Method and system for preventing deadlock in fibre channel fabrics using frame priorities |
| US7340167B2 (en) * | 2004-04-23 | 2008-03-04 | Qlogic, Corporation | Fibre channel transparent switch for mixed switch fabrics |
| US7930377B2 (en) | 2004-04-23 | 2011-04-19 | Qlogic, Corporation | Method and system for using boot servers in networks |
| US7404020B2 (en) * | 2004-07-20 | 2008-07-22 | Qlogic, Corporation | Integrated fibre channel fabric controller |
| US7380030B2 (en) | 2004-10-01 | 2008-05-27 | Qlogic, Corp. | Method and system for using an in-line credit extender with a host bus adapter |
| US7593997B2 (en) | 2004-10-01 | 2009-09-22 | Qlogic, Corporation | Method and system for LUN remapping in fibre channel networks |
| US7411958B2 (en) | 2004-10-01 | 2008-08-12 | Qlogic, Corporation | Method and system for transferring data directly between storage devices in a storage area network |
| US8295299B2 (en) | 2004-10-01 | 2012-10-23 | Qlogic, Corporation | High speed fibre channel switch element |
| US7519058B2 (en) | 2005-01-18 | 2009-04-14 | Qlogic, Corporation | Address translation in fibre channel switches |
| CN100550208C (zh) * | 2006-03-29 | 2009-10-14 | 富晶半导体股份有限公司 | 熔丝检查电路及其检查方法 |
| JP2008033995A (ja) * | 2006-07-26 | 2008-02-14 | Matsushita Electric Ind Co Ltd | メモリシステム |
| JP4982173B2 (ja) * | 2006-12-27 | 2012-07-25 | 株式会社東芝 | 半導体記憶装置 |
| US8868783B2 (en) * | 2007-03-27 | 2014-10-21 | Cisco Technology, Inc. | Abstract representation of subnet utilization in an address block |
| KR101314037B1 (ko) * | 2007-04-26 | 2013-10-01 | 에이저 시스템즈 엘엘시 | 메모리 복구 회로, 집적 회로, 자동화 테스트 설비 장치 및 불량 복구 시스템 |
| US8358540B2 (en) | 2010-01-13 | 2013-01-22 | Micron Technology, Inc. | Access line dependent biasing schemes |
| KR101131557B1 (ko) * | 2010-04-30 | 2012-04-04 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 리페어 회로 및 리페어 방법 |
| US8718079B1 (en) | 2010-06-07 | 2014-05-06 | Marvell International Ltd. | Physical layer devices for network switches |
| US8873320B2 (en) * | 2011-08-17 | 2014-10-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | DRAM repair architecture for wide I/O DRAM based 2.5D/3D system chips |
| US8976604B2 (en) | 2012-02-13 | 2015-03-10 | Macronix International Co., Lt. | Method and apparatus for copying data with a memory array having redundant memory |
| US9165680B2 (en) | 2013-03-11 | 2015-10-20 | Macronix International Co., Ltd. | Memory integrated circuit with a page register/status memory capable of storing only a subset of row blocks of main column blocks |
| CN104681096B (zh) * | 2013-11-27 | 2017-11-21 | 北京兆易创新科技股份有限公司 | 一种非易失性存储器的修复方法 |
| CN104681098B (zh) * | 2013-11-27 | 2017-12-05 | 北京兆易创新科技股份有限公司 | 一种非易失性存储器的修复方法 |
| CN104681099B (zh) * | 2013-11-27 | 2018-02-23 | 北京兆易创新科技股份有限公司 | 一种非易失性存储器的修复方法 |
| US9773571B2 (en) | 2014-12-16 | 2017-09-26 | Macronix International Co., Ltd. | Memory repair redundancy with array cache redundancy |
| US20160218286A1 (en) | 2015-01-23 | 2016-07-28 | Macronix International Co., Ltd. | Capped contact structure with variable adhesion layer thickness |
| US9514815B1 (en) | 2015-05-13 | 2016-12-06 | Macronix International Co., Ltd. | Verify scheme for ReRAM |
| KR20170008553A (ko) * | 2015-07-14 | 2017-01-24 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 리페어 방법 |
| CN106548809A (zh) | 2015-09-22 | 2017-03-29 | 飞思卡尔半导体公司 | 处理缺陷非易失性存储器 |
| US9965346B2 (en) | 2016-04-12 | 2018-05-08 | International Business Machines Corporation | Handling repaired memory array elements in a memory of a computer system |
| US9691478B1 (en) | 2016-04-22 | 2017-06-27 | Macronix International Co., Ltd. | ReRAM array configuration for bipolar operation |
| US9959928B1 (en) | 2016-12-13 | 2018-05-01 | Macronix International Co., Ltd. | Iterative method and apparatus to program a programmable resistance memory element using stabilizing pulses |
| CN108735268B (zh) | 2017-04-19 | 2024-01-30 | 恩智浦美国有限公司 | 非易失性存储器修复电路 |
| CN107240421B (zh) * | 2017-05-19 | 2020-09-01 | 上海华虹宏力半导体制造有限公司 | 存储器的测试方法及装置、存储介质和测试终端 |
| CN114999555B (zh) * | 2021-03-01 | 2024-05-03 | 长鑫存储技术有限公司 | 熔丝故障修复电路 |
| CN112908397B (zh) * | 2021-03-22 | 2023-10-13 | 西安紫光国芯半导体有限公司 | Dram存储阵列的修复方法及相关设备 |
| CN114550807B (zh) * | 2022-01-10 | 2024-09-24 | 苏州萨沙迈半导体有限公司 | 存储器的自修复电路、芯片 |
| CN119091949B (zh) * | 2024-08-13 | 2026-02-24 | 无锡众星微系统技术有限公司 | 一种芯片内memory修复系统及方法 |
| CN119274608B (zh) * | 2024-09-19 | 2026-04-21 | 新存微科技(北京)有限责任公司 | 存储器件 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5313424A (en) * | 1992-03-17 | 1994-05-17 | International Business Machines Corporation | Module level electronic redundancy |
| US5452251A (en) * | 1992-12-03 | 1995-09-19 | Fujitsu Limited | Semiconductor memory device for selecting and deselecting blocks of word lines |
| US5646896A (en) * | 1995-10-31 | 1997-07-08 | Hyundai Electronics America | Memory device with reduced number of fuses |
| EP0797145B1 (en) * | 1996-03-22 | 2002-06-12 | STMicroelectronics S.r.l. | Sectorized electrically erasable and programmable non-volatile memory device with redundancy |
| US5987632A (en) * | 1997-05-07 | 1999-11-16 | Lsi Logic Corporation | Method of testing memory operations employing self-repair circuitry and permanently disabling memory locations |
| US5920515A (en) * | 1997-09-26 | 1999-07-06 | Advanced Micro Devices, Inc. | Register-based redundancy circuit and method for built-in self-repair in a semiconductor memory device |
| JP2000030483A (ja) * | 1998-07-15 | 2000-01-28 | Mitsubishi Electric Corp | 大規模メモリ用ｂｉｓｔ回路 |
| US6067262A (en) * | 1998-12-11 | 2000-05-23 | Lsi Logic Corporation | Redundancy analysis for embedded memories with built-in self test and built-in self repair |
| US6574763B1 (en) * | 1999-12-28 | 2003-06-03 | International Business Machines Corporation | Method and apparatus for semiconductor integrated circuit testing and burn-in |
| DE10110469A1 (de) * | 2001-03-05 | 2002-09-26 | Infineon Technologies Ag | Integrierter Speicher und Verfahren zum Testen und Reparieren desselben |
| US6904552B2 (en) * | 2001-03-15 | 2005-06-07 | Micron Technolgy, Inc. | Circuit and method for test and repair |
| US6347056B1 (en) * | 2001-05-16 | 2002-02-12 | Motorola, Inc. | Recording of result information in a built-in self-test circuit and method therefor |
-
2002
- 2002-12-20 US US10/327,641 patent/US20040123181A1/en not_active Abandoned
-
2003
- 2003-09-30 KR KR1020057011052A patent/KR20050084328A/ko not_active Withdrawn
- 2003-09-30 CN CNA038256886A patent/CN1717749A/zh active Pending
- 2003-09-30 JP JP2004564761A patent/JP2006511904A/ja active Pending
- 2003-09-30 WO PCT/US2003/030863 patent/WO2004061862A1/en not_active Ceased
- 2003-09-30 AU AU2003275306A patent/AU2003275306A1/en not_active Abandoned
- 2003-11-03 TW TW092130655A patent/TWI312517B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| TWI312517B (en) | 2009-07-21 |
| CN1717749A (zh) | 2006-01-04 |
| US20040123181A1 (en) | 2004-06-24 |
| WO2004061862A1 (en) | 2004-07-22 |
| TW200428402A (en) | 2004-12-16 |
| JP2006511904A (ja) | 2006-04-06 |
| AU2003275306A1 (en) | 2004-07-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR20050084328A (ko) | 사전할당된 여분 아키텍처를 사용한 메모리 어레이들의자체 수리 | |
| US6085334A (en) | Method and apparatus for testing an integrated memory device | |
| US6667918B2 (en) | Self-repair of embedded memory arrays | |
| KR100432791B1 (ko) | 메모리 시험방법 및 메모리 시험장치 | |
| US5577050A (en) | Method and apparatus for configurable build-in self-repairing of ASIC memories design | |
| US6829181B1 (en) | Semiconductor memory, method of testing semiconductor memory, and method of manufacturing semiconductor memory | |
| US8570820B2 (en) | Selectable repair pass masking | |
| KR100327136B1 (ko) | 반도체 메모리 장치 및 이 장치의 병렬 비트 테스트 방법 | |
| CN110277130B (zh) | 涉及冗余区域的修复的半导体装置 | |
| US5841711A (en) | Semiconductor memory device with redundancy switching method | |
| US8868975B2 (en) | Testing and operating a multiprocessor chip with processor redundancy | |
| US11430537B2 (en) | Error-correcting code-assisted memory repair | |
| KR20230058603A (ko) | 오티피 메모리 회로 및 이를 포함하는 반도체 장치 | |
| US20130051158A1 (en) | Integrated circuit, testing apparatus for integrated circuit, and method of testing integrated circuit | |
| US7137049B2 (en) | Method and apparatus for masking known fails during memory tests readouts | |
| US20020108073A1 (en) | System for and method of operating a programmable column fail counter for redundancy allocation | |
| US7739560B2 (en) | Nonvolatile semiconductor memory device and method of self-testing the same | |
| TW201503145A (zh) | 在ｎａｎｄ陣列中儲存及讀取可靠資訊的方法及裝置 | |
| KR20060111856A (ko) | 반도체 기억 장치 | |
| US12100464B2 (en) | Repairable latch array | |
| US7518918B2 (en) | Method and apparatus for repairing embedded memory in an integrated circuit | |
| US7352638B2 (en) | Method and apparatus for testing a memory device | |
| US7257733B2 (en) | Memory repair circuit and method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
Patent event date: 20050616 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PG1501 | Laying open of application | ||
| PC1203 | Withdrawal of no request for examination | ||
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |