KR20050038533A - 반도체 소자 및 그 제조방법 - Google Patents
반도체 소자 및 그 제조방법 Download PDFInfo
- Publication number
- KR20050038533A KR20050038533A KR1020030073898A KR20030073898A KR20050038533A KR 20050038533 A KR20050038533 A KR 20050038533A KR 1020030073898 A KR1020030073898 A KR 1020030073898A KR 20030073898 A KR20030073898 A KR 20030073898A KR 20050038533 A KR20050038533 A KR 20050038533A
- Authority
- KR
- South Korea
- Prior art keywords
- gate electrode
- electrode pattern
- film
- interlayer insulating
- pmd
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 42
- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 239000010410 layer Substances 0.000 claims description 31
- 239000011229 interlayer Substances 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 32
- 238000012856 packing Methods 0.000 abstract description 20
- 230000001965 increasing effect Effects 0.000 abstract description 16
- 230000002950 deficient Effects 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 8
- 230000006866 deterioration Effects 0.000 abstract description 5
- 238000009413 insulation Methods 0.000 abstract description 5
- 230000007423 decrease Effects 0.000 abstract description 4
- 230000001939 inductive effect Effects 0.000 abstract description 3
- 230000015572 biosynthetic process Effects 0.000 description 11
- 238000002955 isolation Methods 0.000 description 8
- 125000006850 spacer group Chemical group 0.000 description 7
- 239000005368 silicate glass Substances 0.000 description 5
- 230000009471 action Effects 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 2
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000005429 filling process Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Claims (6)
- 반도체 기판의 활성 영역에 제 1 게이트 전극 패턴을 형성하는 단계와;상기 제 1 게이트 전극 패턴이 포함되도록 상기 반도체 기판의 상부에 층간 절연막을 형성하는 단계와;상기 제 1 게이트 전극 패턴이 노출되도록 상기 층간 절연막을 오픈 시킨 후, 해당 오픈 공간 내부에, 최종의 게이트 전극을 이루는 제 2 게이트 전극패턴을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서, 상기 제 1 게이트 전극 패턴이 이루는 두께는 상기 최종의 게이트 전극이 이루는 두께의 10%~90%인 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서, 상기 제 2 게이트 전극은 폴리 실리콘, 텅스텐, 알루미늄, 구리 중의 어느 하나의 재질을 갖는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서, 상기 제 2 게이트 전극 패턴이 포함되도록 상기 층간 절연막의 상부에 후속 층간 절연막을 형성하는 단계와;상기 제 2 게이트 전극 패턴이 노출되도록 상기 후속 층간 절연막을 오픈 시킨 후, 해당 오픈 공간 내부에 콘택 플러그를 채우는 단계와;상기 콘택 플러그와 전기적으로 접촉되도록 상기 후속 층간 절연막 상부에 금속배선을 형성하는 단계가 더 진행되는 것을 특징으로 하는 반도체 소자의 제조방법.
- 반도체 기판의 활성 영역 상부에 형성된 제 1 게이트 전극 패턴과;상기 제 1 게이트 전극 패턴이 매립되도록 상기 반도체 기판 상부에 형성된 층간 절연막과;상기 층간 절연막을 관통하면서, 상기 제 1 게이트 전극 패턴의 상부에 합체되어, 최종의 게이트 전극을 이루는 제 2 게이트 전극 패턴을 포함하는 것을 특징으로 하는 반도체 소자.
- 제 5 항에 있어서, 상기 제 2 게이트 전극 패턴이 매립되도록 상기 층간 절연막 상부에 형성된 후속 층간 절연막과;상기 후속 층간 절연막을 관통하면서, 상기 제 2 게이트 전극 패턴 및 상기 후속 층간 절연막 상부에 형성된 금속배선을 전기적으로 연결하는 콘택 플러그를 더 포함하는 것을 특징으로 하는 반도체 소자.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2003-0073898A KR100515010B1 (ko) | 2003-10-22 | 2003-10-22 | 반도체 소자 및 그 제조방법 |
US10/972,189 US7314814B2 (en) | 2003-10-22 | 2004-10-22 | Semiconductor devices and methods of fabricating the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2003-0073898A KR100515010B1 (ko) | 2003-10-22 | 2003-10-22 | 반도체 소자 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20050038533A true KR20050038533A (ko) | 2005-04-27 |
KR100515010B1 KR100515010B1 (ko) | 2005-09-14 |
Family
ID=34511009
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2003-0073898A KR100515010B1 (ko) | 2003-10-22 | 2003-10-22 | 반도체 소자 및 그 제조방법 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7314814B2 (ko) |
KR (1) | KR100515010B1 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100677047B1 (ko) * | 2005-09-29 | 2007-02-01 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
US8796125B2 (en) * | 2006-06-12 | 2014-08-05 | Kovio, Inc. | Printed, self-aligned, top gate thin film transistor |
US7767520B2 (en) * | 2006-08-15 | 2010-08-03 | Kovio, Inc. | Printed dopant layers |
US7701011B2 (en) * | 2006-08-15 | 2010-04-20 | Kovio, Inc. | Printed dopant layers |
US9196641B2 (en) | 2006-08-15 | 2015-11-24 | Thin Film Electronics Asa | Printed dopant layers |
KR100907181B1 (ko) * | 2007-09-19 | 2009-07-09 | 주식회사 동부하이텍 | 반도체 소자 및 이의 제조방법 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5767004A (en) | 1996-04-22 | 1998-06-16 | Chartered Semiconductor Manufacturing, Ltd. | Method for forming a low impurity diffusion polysilicon layer |
US6239018B1 (en) * | 1999-02-01 | 2001-05-29 | United Microelectronics Corp. | Method for forming dielectric layers |
US6180501B1 (en) * | 1999-10-14 | 2001-01-30 | Chartered Semiconductor Manufacturing Ltd. | Method to fabricate a double-polysilicon gate structure for a sub-quarter micron self-aligned-titanium silicide process |
US6406986B1 (en) * | 2000-06-26 | 2002-06-18 | Advanced Micro Devices, Inc. | Fabrication of a wide metal silicide on a narrow polysilicon gate structure |
JP2002299609A (ja) * | 2001-03-29 | 2002-10-11 | Nec Corp | 半導体装置及びその製造方法 |
US6740549B1 (en) | 2001-08-10 | 2004-05-25 | Integrated Device Technology, Inc. | Gate structures having sidewall spacers using selective deposition and method of forming the same |
KR100456688B1 (ko) * | 2002-01-07 | 2004-11-10 | 삼성전자주식회사 | 완전 씨모스 에스램 셀 |
US6777761B2 (en) * | 2002-08-06 | 2004-08-17 | International Business Machines Corporation | Semiconductor chip using both polysilicon and metal gate devices |
KR100553682B1 (ko) * | 2003-03-07 | 2006-02-24 | 삼성전자주식회사 | 게이트 전극을 갖는 반도체 소자 및 그 형성방법 |
-
2003
- 2003-10-22 KR KR10-2003-0073898A patent/KR100515010B1/ko not_active IP Right Cessation
-
2004
- 2004-10-22 US US10/972,189 patent/US7314814B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100515010B1 (ko) | 2005-09-14 |
US7314814B2 (en) | 2008-01-01 |
US20050090092A1 (en) | 2005-04-28 |
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