KR102780323B1 - 복합 로직 셀들에 대한 컴팩트한 3d 적층 cfet 아키텍처 - Google Patents
복합 로직 셀들에 대한 컴팩트한 3d 적층 cfet 아키텍처 Download PDFInfo
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- KR102780323B1 KR102780323B1 KR1020217034120A KR20217034120A KR102780323B1 KR 102780323 B1 KR102780323 B1 KR 102780323B1 KR 1020217034120 A KR1020217034120 A KR 1020217034120A KR 20217034120 A KR20217034120 A KR 20217034120A KR 102780323 B1 KR102780323 B1 KR 102780323B1
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- H01L25/0657—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H01L23/5226—
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- H01L23/528—
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
- H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
- H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
- H10D88/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/42—Vias, e.g. via plugs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/427—Power or ground buses
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0135—Manufacturing their gate conductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Geometry (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201962855374P | 2019-05-31 | 2019-05-31 | |
| US62/855,374 | 2019-05-31 | ||
| US16/849,630 US11437376B2 (en) | 2019-05-31 | 2020-04-15 | Compact 3D stacked-CFET architecture for complex logic cells |
| US16/849,630 | 2020-04-15 | ||
| PCT/US2020/034134 WO2020242909A1 (en) | 2019-05-31 | 2020-05-22 | Compact 3d stacked cfet architecture for complex logic cells |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20220003516A KR20220003516A (ko) | 2022-01-10 |
| KR102780323B1 true KR102780323B1 (ko) | 2025-03-11 |
Family
ID=73550387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020217034120A Active KR102780323B1 (ko) | 2019-05-31 | 2020-05-22 | 복합 로직 셀들에 대한 컴팩트한 3d 적층 cfet 아키텍처 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US11437376B2 (https=) |
| JP (1) | JP7680812B2 (https=) |
| KR (1) | KR102780323B1 (https=) |
| CN (1) | CN113875007A (https=) |
| TW (1) | TWI861115B (https=) |
| WO (1) | WO2020242909A1 (https=) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11469321B2 (en) | 2020-02-27 | 2022-10-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device |
| US11714945B2 (en) | 2020-04-09 | 2023-08-01 | Tokyo Electron Limited | Method for automated standard cell design |
| US11550985B2 (en) | 2020-04-09 | 2023-01-10 | Tokyo Electron Limited | Method for automated standard cell design |
| US11961802B2 (en) | 2020-12-04 | 2024-04-16 | Tokyo Electron Limited | Power-tap pass-through to connect a buried power rail to front-side power distribution network |
| US12374623B2 (en) * | 2021-01-18 | 2025-07-29 | Samsung Electronics Co., Ltd. | Stacked semiconductor device architecture |
| US12046643B2 (en) * | 2021-09-20 | 2024-07-23 | International Business Machines Corporation | Semiconductor structures with power rail disposed under active gate |
| EP4167275A1 (en) | 2021-10-18 | 2023-04-19 | Imec VZW | A method for forming an interconnection structure |
| US12336294B2 (en) | 2021-11-10 | 2025-06-17 | International Business Machines Corporation | Gate-cut and separation techniques for enabling independent gate control of stacked transistors |
| US11894436B2 (en) * | 2021-12-06 | 2024-02-06 | International Business Machines Corporation | Gate-all-around monolithic stacked field effect transistors having multiple threshold voltages |
| KR102892844B1 (ko) | 2022-01-10 | 2025-12-02 | 엘지전자 주식회사 | 무선 통신 시스템에서 신호 송수신 방법 및 장치 |
| US12218135B2 (en) | 2022-01-13 | 2025-02-04 | Tokyo Electron Limited | Wiring in diffusion breaks in an integrated circuit |
| US12588489B2 (en) | 2022-02-25 | 2026-03-24 | Samsung Electronics Co., Ltd. | Integrated circuit devices including stacked elements and methods of forming the same |
| US12349458B2 (en) | 2022-03-22 | 2025-07-01 | International Business Machines Corporation | Staggered stacked circuits with increased effective width |
| US12131996B2 (en) | 2022-03-28 | 2024-10-29 | Samsung Electronics Co., Ltd. | Stacked device with backside power distribution network and method of manufacturing the same |
| US12490480B2 (en) | 2022-09-16 | 2025-12-02 | International Business Machines Corporation | Stacked FETS with contact placeholder structures |
| KR20240167169A (ko) * | 2023-05-19 | 2024-11-26 | 삼성전자주식회사 | 반도체 장치 |
| WO2025083833A1 (ja) * | 2023-10-19 | 2025-04-24 | 株式会社ソシオネクスト | 半導体装置 |
| WO2025083834A1 (ja) * | 2023-10-19 | 2025-04-24 | 株式会社ソシオネクスト | 半導体装置 |
| WO2025083832A1 (ja) * | 2023-10-19 | 2025-04-24 | 株式会社ソシオネクスト | 半導体装置 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170141122A1 (en) | 2015-11-18 | 2017-05-18 | Kabushiki Kaisha Toshiba | A three-dimensional memory device |
| US20180122846A1 (en) * | 2016-09-26 | 2018-05-03 | Stmicroelectronics (Crolles 2) Sas | Trench between stacked semiconductor substrates making contact with source-drain region |
| US10109646B1 (en) * | 2017-06-05 | 2018-10-23 | Qualcomm Incorporated | Selectively recessing trench isolation in three-dimensional (3D) transistors to vary channel structure exposures from trench isolation to control drive strength |
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| US7247528B2 (en) * | 2004-02-24 | 2007-07-24 | Samsung Electronics Co., Ltd. | Methods of fabricating semiconductor integrated circuits using selective epitaxial growth and partial planarization techniques |
| KR100663360B1 (ko) | 2005-04-20 | 2007-01-02 | 삼성전자주식회사 | 박막 트랜지스터를 갖는 반도체 소자들 및 그 제조방법들 |
| CN101257024A (zh) * | 2006-09-14 | 2008-09-03 | 三星电子株式会社 | 具有三维排列的存储单元晶体管的与非型闪存器件 |
| US8314001B2 (en) | 2010-04-09 | 2012-11-20 | International Business Machines Corporation | Vertical stacking of field effect transistor structures for logic gates |
| JP5956736B2 (ja) | 2011-10-18 | 2016-07-27 | 日本放送協会 | 積層型半導体装置及びその製造方法 |
| JP6074985B2 (ja) * | 2012-09-28 | 2017-02-08 | ソニー株式会社 | 半導体装置、固体撮像装置、および半導体装置の製造方法 |
| WO2014141485A1 (ja) * | 2013-03-15 | 2014-09-18 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | Sgtを有する半導体装置の製造方法 |
| JP2014222740A (ja) | 2013-05-14 | 2014-11-27 | 株式会社東芝 | 半導体記憶装置 |
| WO2015068226A1 (ja) * | 2013-11-06 | 2015-05-14 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | Sgtを有する半導体装置と、その製造方法 |
| WO2015155656A1 (en) | 2014-04-11 | 2015-10-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and electronic device |
| JP5990843B2 (ja) * | 2014-07-14 | 2016-09-14 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッドUnisantis Electronics Singapore Pte Ltd. | 半導体装置の製造方法、及び、半導体装置 |
| JP6065190B2 (ja) * | 2014-09-05 | 2017-01-25 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッドUnisantis Electronics Singapore Pte Ltd. | 半導体装置 |
| US9666562B2 (en) * | 2015-01-15 | 2017-05-30 | Qualcomm Incorporated | 3D integrated circuit |
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| KR101855846B1 (ko) | 2015-12-29 | 2018-05-09 | 포항공과대학교 산학협력단 | 수직적층구조의 3차원 정적램 코어 셀 및 그를 포함하는 정적램 코어 셀 어셈블리 |
| US9941200B1 (en) | 2016-09-26 | 2018-04-10 | Stmicroelectronics (Crolles 2) Sas | Contact trench between stacked semiconductor substrates |
| US10084081B2 (en) * | 2017-01-23 | 2018-09-25 | International Business Machines Corporation | Vertical transistor with enhanced drive current |
| US10192867B1 (en) * | 2018-02-05 | 2019-01-29 | Globalfoundries Inc. | Complementary FETs with wrap around contacts and method of forming same |
| KR20180058673A (ko) | 2018-04-24 | 2018-06-01 | 포항공과대학교 산학협력단 | 수직적층구조의 3차원 정적램 코어 셀 및 그를 포함하는 정적램 코어 셀 어셈블리 |
| CN112585752B (zh) * | 2018-09-05 | 2023-09-19 | 东京毅力科创株式会社 | 3d逻辑和存储器的配电网络 |
| US10811415B2 (en) * | 2018-10-25 | 2020-10-20 | Samsung Electronics Co., Ltd. | Semiconductor device and method for making the same |
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| KR102795719B1 (ko) * | 2019-07-19 | 2025-04-16 | 삼성전자주식회사 | 3차원 반도체 장치 |
| US11195794B2 (en) * | 2020-02-05 | 2021-12-07 | Samsung Electronics Co., Ltd. | Stacked integrated circuit devices including a routing wire |
-
2020
- 2020-04-15 US US16/849,630 patent/US11437376B2/en active Active
- 2020-05-22 WO PCT/US2020/034134 patent/WO2020242909A1/en not_active Ceased
- 2020-05-22 KR KR1020217034120A patent/KR102780323B1/ko active Active
- 2020-05-22 JP JP2021564305A patent/JP7680812B2/ja active Active
- 2020-05-22 CN CN202080039123.XA patent/CN113875007A/zh active Pending
- 2020-05-26 TW TW109117500A patent/TWI861115B/zh active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170141122A1 (en) | 2015-11-18 | 2017-05-18 | Kabushiki Kaisha Toshiba | A three-dimensional memory device |
| US20180122846A1 (en) * | 2016-09-26 | 2018-05-03 | Stmicroelectronics (Crolles 2) Sas | Trench between stacked semiconductor substrates making contact with source-drain region |
| US10109646B1 (en) * | 2017-06-05 | 2018-10-23 | Qualcomm Incorporated | Selectively recessing trench isolation in three-dimensional (3D) transistors to vary channel structure exposures from trench isolation to control drive strength |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020242909A1 (en) | 2020-12-03 |
| JP2022534858A (ja) | 2022-08-04 |
| KR20220003516A (ko) | 2022-01-10 |
| US20200381430A1 (en) | 2020-12-03 |
| TWI861115B (zh) | 2024-11-11 |
| JP7680812B2 (ja) | 2025-05-21 |
| US11437376B2 (en) | 2022-09-06 |
| TW202114115A (zh) | 2021-04-01 |
| CN113875007A (zh) | 2021-12-31 |
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