KR101979931B1 - PECVD SiO2 패시베이션을 사용한 IGZO 및 ZNO TFT 제조 방법 - Google Patents

PECVD SiO2 패시베이션을 사용한 IGZO 및 ZNO TFT 제조 방법 Download PDF

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KR101979931B1
KR101979931B1 KR1020177014161A KR20177014161A KR101979931B1 KR 101979931 B1 KR101979931 B1 KR 101979931B1 KR 1020177014161 A KR1020177014161 A KR 1020177014161A KR 20177014161 A KR20177014161 A KR 20177014161A KR 101979931 B1 KR101979931 B1 KR 101979931B1
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plasma
active layer
thin film
film transistor
repairing
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KR1020177014161A
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Korean (ko)
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KR20170061721A (ko
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즐즈얀 제리 첸
수영 최
동길 임
얀 예
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어플라이드 머티어리얼스, 인코포레이티드
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H01L29/7869—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
KR1020177014161A 2011-06-30 2012-06-08 PECVD SiO2 패시베이션을 사용한 IGZO 및 ZNO TFT 제조 방법 KR101979931B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201161503413P 2011-06-30 2011-06-30
US61/503,413 2011-06-30
US13/490,813 2012-06-07
US13/490,813 US9553195B2 (en) 2011-06-30 2012-06-07 Method of IGZO and ZNO TFT fabrication with PECVD SiO2 passivation
PCT/US2012/041603 WO2013003004A2 (en) 2011-06-30 2012-06-08 METHOD OF IGZO AND ZNO TFT FABRICATION WITH PECVD SiO2 PASSIVATION

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KR1020147001257A Division KR101817684B1 (ko) 2011-06-30 2012-06-08 PECVD SiO2 패시베이션을 사용한 IGZO 및 ZNO TFT 제조 방법

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KR20170061721A KR20170061721A (ko) 2017-06-05
KR101979931B1 true KR101979931B1 (ko) 2019-09-03

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KR1020147001257A KR101817684B1 (ko) 2011-06-30 2012-06-08 PECVD SiO2 패시베이션을 사용한 IGZO 및 ZNO TFT 제조 방법
KR1020177014161A KR101979931B1 (ko) 2011-06-30 2012-06-08 PECVD SiO2 패시베이션을 사용한 IGZO 및 ZNO TFT 제조 방법

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KR1020147001257A KR101817684B1 (ko) 2011-06-30 2012-06-08 PECVD SiO2 패시베이션을 사용한 IGZO 및 ZNO TFT 제조 방법

Country Status (5)

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US (2) US9553195B2 (zh)
KR (2) KR101817684B1 (zh)
CN (2) CN103620788B (zh)
TW (1) TWI577028B (zh)
WO (1) WO2013003004A2 (zh)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9553195B2 (en) * 2011-06-30 2017-01-24 Applied Materials, Inc. Method of IGZO and ZNO TFT fabrication with PECVD SiO2 passivation
US8969154B2 (en) * 2011-08-23 2015-03-03 Micron Technology, Inc. Methods for fabricating semiconductor device structures and arrays of vertical transistor devices
US8854772B1 (en) 2013-05-03 2014-10-07 Seagate Technology Llc Adhesion enhancement of thin film PZT structure
US8975625B2 (en) * 2013-05-14 2015-03-10 Applied Materials, Inc. TFT with insert in passivation layer or etch stop layer
JP6142200B2 (ja) * 2013-09-30 2017-06-07 株式会社Ｊｏｌｅｄ 薄膜半導体装置及びその製造方法
US9082793B1 (en) * 2013-12-19 2015-07-14 Intermolecular, Inc. IGZO devices with reduced threshhold voltage shift and methods for forming the same
CN103730373B (zh) 2013-12-31 2016-09-07 京东方科技集团股份有限公司 一种半导体器件的制备方法及半导体器件
US9214340B2 (en) 2014-02-05 2015-12-15 Applied Materials, Inc. Apparatus and method of forming an indium gallium zinc oxide layer
KR102197854B1 (ko) 2014-05-13 2021-01-05 삼성디스플레이 주식회사 박막 트랜지스터, 이를 포함하는 표시기판 및 이의 제조방법
KR102338190B1 (ko) 2015-04-10 2021-12-10 삼성디스플레이 주식회사 박막 트랜지스터 표시판, 이를 포함하는 액정 표시 장치 및 그 제조 방법
US10395928B2 (en) * 2016-06-15 2019-08-27 Nanomedical Diagnostics, Inc. Depositing a passivation layer on a graphene sheet
TW201812419A (zh) * 2016-07-25 2018-04-01 半導體能源研究所股份有限公司 電晶體的製造方法及顯示裝置
CN107978607B (zh) 2017-11-21 2020-04-28 深圳市华星光电半导体显示技术有限公司 背沟道蚀刻型氧化物半导体tft基板的制作方法
CN109346412B (zh) * 2018-09-30 2022-05-06 南京京东方显示技术有限公司 一种薄膜晶体管的制造方法及薄膜晶体管
CN109616476A (zh) * 2018-12-17 2019-04-12 惠科股份有限公司 主动开关及其制作方法、显示装置
US10748759B2 (en) 2019-01-15 2020-08-18 Applied Materials, Inc. Methods for improved silicon nitride passivation films
CN110098126A (zh) * 2019-05-22 2019-08-06 成都中电熊猫显示科技有限公司 一种薄膜晶体管的制作方法及薄膜晶体管和显示装置
CN114008743A (zh) * 2019-06-17 2022-02-01 应用材料公司 形成薄膜晶体管的方法
EP4073831A4 (en) * 2019-12-09 2024-01-10 Entegris, Inc. MULTIPLE BARRIER MATERIAL DIFFUSION BARRIERS AND RELATED ARTICLES AND METHODS

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009141002A (ja) * 2007-12-04 2009-06-25 Canon Inc 絶縁層を有する酸化物半導体素子およびそれを用いた表示装置
JP2010258196A (ja) * 2009-04-24 2010-11-11 Toppan Printing Co Ltd 薄膜トランジスタおよびアクティブマトリクスディスプレイ

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1317748C (zh) 2004-12-13 2007-05-23 友达光电股份有限公司 薄膜晶体管的制造方法
EP1995787A3 (en) 2005-09-29 2012-01-18 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device having oxide semiconductor layer and manufacturing method therof
JP5216446B2 (ja) * 2007-07-27 2013-06-19 株式会社半導体エネルギー研究所 プラズマｃｖｄ装置及び表示装置の作製方法
US8258511B2 (en) 2008-07-02 2012-09-04 Applied Materials, Inc. Thin film transistors using multiple active channel layers
TWI491048B (zh) * 2008-07-31 2015-07-01 Semiconductor Energy Lab 半導體裝置
KR102094683B1 (ko) 2008-09-19 2020-03-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시장치
US8187919B2 (en) * 2008-10-08 2012-05-29 Lg Display Co. Ltd. Oxide thin film transistor and method of fabricating the same
KR101586674B1 (ko) * 2008-10-28 2016-01-20 엘지디스플레이 주식회사 산화물 박막 트랜지스터의 제조방법
JP5713603B2 (ja) 2009-09-02 2015-05-07 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
KR101523358B1 (ko) 2009-12-04 2015-05-27 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치
US9553195B2 (en) * 2011-06-30 2017-01-24 Applied Materials, Inc. Method of IGZO and ZNO TFT fabrication with PECVD SiO2 passivation

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009141002A (ja) * 2007-12-04 2009-06-25 Canon Inc 絶縁層を有する酸化物半導体素子およびそれを用いた表示装置
JP2010258196A (ja) * 2009-04-24 2010-11-11 Toppan Printing Co Ltd 薄膜トランジスタおよびアクティブマトリクスディスプレイ

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TWI577028B (zh) 2017-04-01
CN103620788A (zh) 2014-03-05
KR20170061721A (ko) 2017-06-05
US20130005081A1 (en) 2013-01-03
KR20140050631A (ko) 2014-04-29
TW201308609A (zh) 2013-02-16
KR101817684B1 (ko) 2018-01-11
WO2013003004A3 (en) 2013-05-16
WO2013003004A2 (en) 2013-01-03
CN103620788B (zh) 2017-06-30
US9871124B2 (en) 2018-01-16
CN107293494A (zh) 2017-10-24
US9553195B2 (en) 2017-01-24
US20170133492A1 (en) 2017-05-11

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