KR101970290B1 - 설정가능한 인터페이스를 가진 테스트 기기 - Google Patents
설정가능한 인터페이스를 가진 테스트 기기 Download PDFInfo
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- KR101970290B1 KR101970290B1 KR1020147014230A KR20147014230A KR101970290B1 KR 101970290 B1 KR101970290 B1 KR 101970290B1 KR 1020147014230 A KR1020147014230 A KR 1020147014230A KR 20147014230 A KR20147014230 A KR 20147014230A KR 101970290 B1 KR101970290 B1 KR 101970290B1
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- South Korea
- Prior art keywords
- test
- processing system
- port
- programmable logic
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- 238000012360 testing method Methods 0.000 title claims abstract description 275
- 238000012545 processing Methods 0.000 claims abstract description 153
- 238000004891 communication Methods 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims description 18
- 230000006870 function Effects 0.000 claims description 15
- 230000004044 response Effects 0.000 claims description 15
- 238000004590 computer program Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000005259 measurement Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2889—Interfaces, e.g. between probe and tester
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31704—Design for test; Design verification
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computer Networks & Wireless Communication (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/284,378 US9470759B2 (en) | 2011-10-28 | 2011-10-28 | Test instrument having a configurable interface |
| US13/284,378 | 2011-10-28 | ||
| PCT/US2012/056247 WO2013062692A1 (en) | 2011-10-28 | 2012-09-20 | Test instrument having a configurable interface |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20140091719A KR20140091719A (ko) | 2014-07-22 |
| KR101970290B1 true KR101970290B1 (ko) | 2019-04-18 |
Family
ID=48168296
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020147014230A Active KR101970290B1 (ko) | 2011-10-28 | 2012-09-20 | 설정가능한 인터페이스를 가진 테스트 기기 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9470759B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2771704A4 (cg-RX-API-DMAC7.html) |
| JP (1) | JP2014532862A (cg-RX-API-DMAC7.html) |
| KR (1) | KR101970290B1 (cg-RX-API-DMAC7.html) |
| IN (1) | IN2014CN02499A (cg-RX-API-DMAC7.html) |
| WO (1) | WO2013062692A1 (cg-RX-API-DMAC7.html) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12315585B2 (en) | 2019-08-06 | 2025-05-27 | Advantest Corporation | Automated test equipment comprising a plurality of communication interfaces to a device under test |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10776233B2 (en) | 2011-10-28 | 2020-09-15 | Teradyne, Inc. | Programmable test instrument |
| US9759772B2 (en) | 2011-10-28 | 2017-09-12 | Teradyne, Inc. | Programmable test instrument |
| US9116785B2 (en) | 2013-01-22 | 2015-08-25 | Teradyne, Inc. | Embedded tester |
| US10156611B2 (en) | 2013-09-12 | 2018-12-18 | Teradyne, Inc. | Executing code on a test instrument in response to an event |
| EP2990817A1 (de) * | 2014-09-01 | 2016-03-02 | Siemens Aktiengesellschaft | Kompakte Prüfanordnung für Leiterplatten |
| EP3213214B1 (fr) | 2014-10-30 | 2021-03-03 | SPHEREA Test & Services | Banc et logiciel pour tester un appareillage electrique, notamment un calculateur |
| US10241146B2 (en) * | 2017-05-01 | 2019-03-26 | Advantest Corporation | Test system and method |
| US11169203B1 (en) | 2018-09-26 | 2021-11-09 | Teradyne, Inc. | Determining a configuration of a test system |
| WO2020152232A1 (en) * | 2019-01-22 | 2020-07-30 | Advantest Corporation | Automated test equipment for testing one or more devices under test, method for automated testing of one or more devices under test, and computer program for handling command errors |
| JP7316818B2 (ja) * | 2019-03-28 | 2023-07-28 | 株式会社アドバンテスト | 波形データ取得モジュールおよび試験装置 |
| US11408927B2 (en) | 2019-06-18 | 2022-08-09 | Teradyne, Inc. | Functional testing with inline parametric testing |
| US11461222B2 (en) | 2020-04-16 | 2022-10-04 | Teradyne, Inc. | Determining the complexity of a test program |
| CN112653598B (zh) * | 2020-12-18 | 2022-02-22 | 迈普通信技术股份有限公司 | 自动化测试方法、装置、设备及可读存储介质 |
| CN113868038B (zh) * | 2021-08-30 | 2024-06-04 | 中科可控信息产业有限公司 | 信号测试方法、装置、计算机设备和存储介质 |
| CN114020554A (zh) * | 2021-10-30 | 2022-02-08 | 江苏信而泰智能装备有限公司 | 一种测试仪的端口隔离方法和具有端口隔离功能的测试仪 |
| US20240118339A1 (en) * | 2022-10-11 | 2024-04-11 | SK Hynix Inc. | System, method for circuit validation, and system and method for facilitating circuit validation |
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| JP2006003239A (ja) | 2004-06-18 | 2006-01-05 | Hitachi Ltd | 半導体装置テスタ |
| JP2010281707A (ja) | 2009-06-05 | 2010-12-16 | Hitachi Kokusai Electric Inc | 試験装置 |
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-
2011
- 2011-10-28 US US13/284,378 patent/US9470759B2/en active Active
-
2012
- 2012-09-20 EP EP12843264.8A patent/EP2771704A4/en not_active Withdrawn
- 2012-09-20 IN IN2499CHN2014 patent/IN2014CN02499A/en unknown
- 2012-09-20 JP JP2014538796A patent/JP2014532862A/ja active Pending
- 2012-09-20 KR KR1020147014230A patent/KR101970290B1/ko active Active
- 2012-09-20 WO PCT/US2012/056247 patent/WO2013062692A1/en not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006003239A (ja) | 2004-06-18 | 2006-01-05 | Hitachi Ltd | 半導体装置テスタ |
| JP2010281707A (ja) | 2009-06-05 | 2010-12-16 | Hitachi Kokusai Electric Inc | 試験装置 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12315585B2 (en) | 2019-08-06 | 2025-05-27 | Advantest Corporation | Automated test equipment comprising a plurality of communication interfaces to a device under test |
Also Published As
| Publication number | Publication date |
|---|---|
| IN2014CN02499A (cg-RX-API-DMAC7.html) | 2015-06-26 |
| US9470759B2 (en) | 2016-10-18 |
| US20130110446A1 (en) | 2013-05-02 |
| EP2771704A4 (en) | 2015-03-25 |
| WO2013062692A1 (en) | 2013-05-02 |
| JP2014532862A (ja) | 2014-12-08 |
| KR20140091719A (ko) | 2014-07-22 |
| EP2771704A1 (en) | 2014-09-03 |
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