KR101910100B1 - Soi 웨이퍼의 제조방법 - Google Patents

Soi 웨이퍼의 제조방법 Download PDF

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Publication number
KR101910100B1
KR101910100B1 KR1020157005866A KR20157005866A KR101910100B1 KR 101910100 B1 KR101910100 B1 KR 101910100B1 KR 1020157005866 A KR1020157005866 A KR 1020157005866A KR 20157005866 A KR20157005866 A KR 20157005866A KR 101910100 B1 KR101910100 B1 KR 101910100B1
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South Korea
Prior art keywords
wafer
oxide film
bond wafer
soi
bond
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KR1020157005866A
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English (en)
Korean (ko)
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KR20150087181A (ko
Inventor
히로지 아가
토루 이시즈카
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신에쯔 한도타이 가부시키가이샤
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Publication of KR20150087181A publication Critical patent/KR20150087181A/ko
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    • H01L21/762—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H01L21/02107—
    • H01L21/265—
    • H01L21/7624—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H01L2027/11857—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6322—Formation by thermal treatments

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  • Element Separation (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
KR1020157005866A 2012-11-21 2013-10-11 Soi 웨이퍼의 제조방법 Active KR101910100B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPJP-P-2012-255719 2012-11-21
JP2012255719A JP5821828B2 (ja) 2012-11-21 2012-11-21 Ｓｏｉウェーハの製造方法
PCT/JP2013/006072 WO2014080563A1 (ja) 2012-11-21 2013-10-11 Ｓｏｉウェーハの製造方法

Publications (2)

Publication Number Publication Date
KR20150087181A KR20150087181A (ko) 2015-07-29
KR101910100B1 true KR101910100B1 (ko) 2018-10-19

Family

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Application Number Title Priority Date Filing Date
KR1020157005866A Active KR101910100B1 (ko) 2012-11-21 2013-10-11 Soi 웨이퍼의 제조방법

Country Status (7)

Country Link
US (1) US9378999B2 (https=)
EP (1) EP2924736B1 (https=)
JP (1) JP5821828B2 (https=)
KR (1) KR101910100B1 (https=)
CN (1) CN104620384B (https=)
SG (1) SG11201501873QA (https=)
WO (1) WO2014080563A1 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6353814B2 (ja) * 2015-06-09 2018-07-04 信越半導体株式会社 貼り合わせｓｏｉウェーハの製造方法
JP6556511B2 (ja) * 2015-06-17 2019-08-07 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN110085549B (zh) * 2018-01-26 2021-06-04 沈阳硅基科技有限公司 一种双面注入得到soi的方法
CN110544668B (zh) 2018-05-28 2022-03-25 沈阳硅基科技有限公司 一种通过贴膜改变soi边缘stir的方法
CN109360805A (zh) * 2018-09-28 2019-02-19 沈阳硅基科技有限公司 一种图形soi硅片的制备方法
CN115188703B (zh) * 2022-05-16 2025-09-19 绍兴中芯集成电路制造股份有限公司 一种soi晶圆及制造方法
FR3146019A1 (fr) * 2023-02-16 2024-08-23 Soitec Procédé de formation d’une zone de fragisilation dans un substrat semi-conducteur

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070069335A1 (en) * 2003-09-08 2007-03-29 Akihiko Endo Bonded wafer and its manufacturing method
US20080315349A1 (en) * 2005-02-28 2008-12-25 Shin-Etsu Handotai Co., Ltd. Method for Manufacturing Bonded Wafer and Bonded Wafer
WO2012012138A2 (en) * 2010-06-30 2012-01-26 Corning Incorporated Method for finishing silicon on insulator substrates

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0355822A (ja) 1989-07-25 1991-03-11 Shin Etsu Handotai Co Ltd 半導体素子形成用基板の製造方法
JPH0680624B2 (ja) * 1990-02-28 1994-10-12 信越半導体株式会社 接合ウエーハの製造方法
JP3422225B2 (ja) * 1997-07-08 2003-06-30 三菱住友シリコン株式会社 貼り合わせ半導体基板及びその製造方法
JP3500063B2 (ja) * 1998-04-23 2004-02-23 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
FR2811807B1 (fr) 2000-07-12 2003-07-04 Commissariat Energie Atomique Procede de decoupage d'un bloc de materiau et de formation d'un film mince
JP4398934B2 (ja) * 2005-02-28 2010-01-13 信越半導体株式会社 Ｓｏｉウエーハの製造方法
US7902039B2 (en) 2006-11-30 2011-03-08 Sumco Corporation Method for manufacturing silicon wafer
JP5233111B2 (ja) 2006-11-30 2013-07-10 株式会社Ｓｕｍｃｏ 貼り合わせｓｏｉウェーハの製造方法
JP2011187502A (ja) * 2010-03-04 2011-09-22 Seiko Epson Corp 半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070069335A1 (en) * 2003-09-08 2007-03-29 Akihiko Endo Bonded wafer and its manufacturing method
US20080315349A1 (en) * 2005-02-28 2008-12-25 Shin-Etsu Handotai Co., Ltd. Method for Manufacturing Bonded Wafer and Bonded Wafer
WO2012012138A2 (en) * 2010-06-30 2012-01-26 Corning Incorporated Method for finishing silicon on insulator substrates

Also Published As

Publication number Publication date
SG11201501873QA (en) 2015-05-28
US20150243550A1 (en) 2015-08-27
EP2924736A1 (en) 2015-09-30
EP2924736B1 (en) 2017-08-30
KR20150087181A (ko) 2015-07-29
CN104620384B (zh) 2017-06-06
US9378999B2 (en) 2016-06-28
WO2014080563A1 (ja) 2014-05-30
JP5821828B2 (ja) 2015-11-24
EP2924736A4 (en) 2016-06-29
CN104620384A (zh) 2015-05-13
JP2014103329A (ja) 2014-06-05

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