KR101858325B1 - 워드 라인들의 순차적 선택을 갖는 3d 비-휘발성 메모리에 대한 소거 - Google Patents
워드 라인들의 순차적 선택을 갖는 3d 비-휘발성 메모리에 대한 소거 Download PDFInfo
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- KR101858325B1 KR101858325B1 KR1020157006567A KR20157006567A KR101858325B1 KR 101858325 B1 KR101858325 B1 KR 101858325B1 KR 1020157006567 A KR1020157006567 A KR 1020157006567A KR 20157006567 A KR20157006567 A KR 20157006567A KR 101858325 B1 KR101858325 B1 KR 101858325B1
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
- G11C11/5635—Erasing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
- G11C16/3445—Circuits or methods to verify correct erasure of nonvolatile memory cells
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- H01L27/11582—
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
- H01L29/7926—Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201261682600P | 2012-08-13 | 2012-08-13 | |
US61/682,600 | 2012-08-13 | ||
US13/960,360 | 2013-08-06 | ||
US13/960,360 US8908444B2 (en) | 2012-08-13 | 2013-08-06 | Erase for 3D non-volatile memory with sequential selection of word lines |
PCT/US2013/054232 WO2014028308A1 (fr) | 2012-08-13 | 2013-08-09 | Effacement de mémoire non volatile 3d, avec sélection séquentielle de lignes de mots |
Publications (2)
Publication Number | Publication Date |
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KR20150046121A KR20150046121A (ko) | 2015-04-29 |
KR101858325B1 true KR101858325B1 (ko) | 2018-05-15 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020157006567A KR101858325B1 (ko) | 2012-08-13 | 2013-08-09 | 워드 라인들의 순차적 선택을 갖는 3d 비-휘발성 메모리에 대한 소거 |
Country Status (5)
Country | Link |
---|---|
US (2) | US8908444B2 (fr) |
EP (1) | EP2883229B8 (fr) |
KR (1) | KR101858325B1 (fr) |
CN (1) | CN104813407B (fr) |
WO (1) | WO2014028308A1 (fr) |
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US8908444B2 (en) | 2012-08-13 | 2014-12-09 | Sandisk Technologies Inc. | Erase for 3D non-volatile memory with sequential selection of word lines |
US8988937B2 (en) | 2012-10-24 | 2015-03-24 | Sandisk Technologies Inc. | Pre-charge during programming for 3D memory using gate-induced drain leakage |
KR102179284B1 (ko) * | 2014-05-12 | 2020-11-18 | 삼성전자주식회사 | 불 휘발성 메모리 장치 및 그것의 소거 방법 |
US9917096B2 (en) * | 2014-09-10 | 2018-03-13 | Toshiba Memory Corporation | Semiconductor memory device and method for manufacturing same |
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US9552885B2 (en) * | 2014-12-10 | 2017-01-24 | Sandisk Technologies Llc | Partial block erase for open block reading in non-volatile memory |
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JP2019165150A (ja) * | 2018-03-20 | 2019-09-26 | 東芝メモリ株式会社 | 半導体記憶装置 |
KR102617353B1 (ko) | 2018-03-27 | 2023-12-26 | 삼성전자주식회사 | 복수의 수직 채널 구조체들을 갖는 3차원 메모리 장치 |
US10755788B2 (en) | 2018-11-06 | 2020-08-25 | Sandisk Technologies Llc | Impedance mismatch mitigation scheme that applies asymmetric voltage pulses to compensate for asymmetries from applying symmetric voltage pulses |
US10650898B1 (en) | 2018-11-06 | 2020-05-12 | Sandisk Technologies Llc | Erase operation in 3D NAND flash memory including pathway impedance compensation |
US10910064B2 (en) | 2018-11-06 | 2021-02-02 | Sandisk Technologies Llc | Location dependent impedance mitigation in non-volatile memory |
KR102644525B1 (ko) * | 2018-11-07 | 2024-03-07 | 삼성전자주식회사 | 수직형 반도체 소자 |
US10741253B1 (en) * | 2019-02-20 | 2020-08-11 | Sandisk Technologies Llc | Memory device with compensation for erase speed variations due to blocking oxide layer thinning |
CN110176265B (zh) * | 2019-04-29 | 2021-06-04 | 长江存储科技有限责任公司 | 多层存储器及其制作方法 |
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WO2021237492A1 (fr) | 2020-05-27 | 2021-12-02 | Yangtze Memory Technologies Co., Ltd. | Procédés de formation de dispositifs de mémoire tridimensionnels |
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CN111801799B (zh) | 2020-05-27 | 2021-03-23 | 长江存储科技有限责任公司 | 用于形成三维存储器件的方法 |
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US8908444B2 (en) | 2012-08-13 | 2014-12-09 | Sandisk Technologies Inc. | Erase for 3D non-volatile memory with sequential selection of word lines |
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2013
- 2013-08-06 US US13/960,360 patent/US8908444B2/en active Active
- 2013-08-09 KR KR1020157006567A patent/KR101858325B1/ko active IP Right Grant
- 2013-08-09 EP EP13751012.9A patent/EP2883229B8/fr active Active
- 2013-08-09 WO PCT/US2013/054232 patent/WO2014028308A1/fr active Application Filing
- 2013-08-09 CN CN201380043266.8A patent/CN104813407B/zh active Active
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2014
- 2014-05-16 US US14/279,618 patent/US8861280B2/en active Active
Patent Citations (1)
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US20100214838A1 (en) | 2009-02-24 | 2010-08-26 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor storage device |
Also Published As
Publication number | Publication date |
---|---|
WO2014028308A1 (fr) | 2014-02-20 |
EP2883229B8 (fr) | 2016-09-07 |
US8908444B2 (en) | 2014-12-09 |
EP2883229B1 (fr) | 2016-06-29 |
CN104813407A (zh) | 2015-07-29 |
EP2883229A1 (fr) | 2015-06-17 |
US8861280B2 (en) | 2014-10-14 |
US20140043916A1 (en) | 2014-02-13 |
KR20150046121A (ko) | 2015-04-29 |
CN104813407B (zh) | 2018-06-08 |
US20140247661A1 (en) | 2014-09-04 |
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