KR101742825B1 - 다마신 인터커넥트에서 전자이동 저항성 개선을 위한 계면층 - Google Patents

다마신 인터커넥트에서 전자이동 저항성 개선을 위한 계면층 Download PDF

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KR101742825B1
KR101742825B1 KR1020110004334A KR20110004334A KR101742825B1 KR 101742825 B1 KR101742825 B1 KR 101742825B1 KR 1020110004334 A KR1020110004334 A KR 1020110004334A KR 20110004334 A KR20110004334 A KR 20110004334A KR 101742825 B1 KR101742825 B1 KR 101742825B1
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layer
copper
substrate
insulating film
aluminum
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Korean (ko)
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KR20110084130A (ko
Inventor
아난다 바너지
조니 앤드류 안토넬리
제니퍼 오'러플린
만디얌 스리람
바트 반 슈라벤디즈크
세샤사이 바라다라잔
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노벨러스 시스템즈, 인코포레이티드
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Priority claimed from US12/688,154 external-priority patent/US8268722B2/en
Priority claimed from US12/689,803 external-priority patent/US7858510B1/en
Application filed by 노벨러스 시스템즈, 인코포레이티드 filed Critical 노벨러스 시스템즈, 인코포레이티드
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01354Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6316Formation by nitridation, e.g. nitridation of the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6512Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour
    • H10P14/6514Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00Cleaning of wafers, substrates or parts of devices
    • H10P70/10Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H10P70/12Cleaning before device manufacture, i.e. Begin-Of-Line process by dry cleaning only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H10P14/432Chemical deposition, e.g. chemical vapour deposition [CVD] using selective deposition

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020110004334A 2010-01-15 2011-01-17 다마신 인터커넥트에서 전자이동 저항성 개선을 위한 계면층 Active KR101742825B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US12/688,154 2010-01-15
US12/688,154 US8268722B2 (en) 2009-06-03 2010-01-15 Interfacial capping layers for interconnects
US12/689,803 US7858510B1 (en) 2008-02-28 2010-01-19 Interfacial layers for electromigration resistance improvement in damascene interconnects
US12/689,803 2010-01-19

Publications (2)

Publication Number Publication Date
KR20110084130A KR20110084130A (ko) 2011-07-21
KR101742825B1 true KR101742825B1 (ko) 2017-06-01

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KR1020110004334A Active KR101742825B1 (ko) 2010-01-15 2011-01-17 다마신 인터커넥트에서 전자이동 저항성 개선을 위한 계면층

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Country Link
JP (1) JP5773306B2 (https=)
KR (1) KR101742825B1 (https=)
CN (1) CN102130046B (https=)
TW (2) TW201709418A (https=)

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US7727881B1 (en) 2004-11-03 2010-06-01 Novellus Systems, Inc. Protective self-aligned buffer layers for damascene interconnects
US7727880B1 (en) 2004-11-03 2010-06-01 Novellus Systems, Inc. Protective self-aligned buffer layers for damascene interconnects
WO2012167141A2 (en) 2011-06-03 2012-12-06 Novellus Systems, Inc. Metal and silicon containing capping layers for interconnects
CN104008995B (zh) * 2013-02-22 2017-09-01 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制备方法
JP2016514352A (ja) * 2013-03-05 2016-05-19 インテグリス・インコーポレーテッド イオン注入のための組成物、システムおよび方法
CN105378907A (zh) * 2013-07-24 2016-03-02 应用材料公司 钴基板处理系统、设备及方法
CN104576514B (zh) * 2013-10-29 2017-11-24 中芯国际集成电路制造(上海)有限公司 半导体器件的制备方法
CN104637864B (zh) * 2013-11-14 2017-11-24 中芯国际集成电路制造(上海)有限公司 提高数据保持能力的方法
US9368448B2 (en) * 2013-12-20 2016-06-14 Applied Materials, Inc. Metal-containing films as dielectric capping barrier for advanced interconnects
US9465071B2 (en) * 2014-03-04 2016-10-11 Mediatek Inc. Method and apparatus for generating featured scan pattern
US10319908B2 (en) * 2014-05-01 2019-06-11 Crossbar, Inc. Integrative resistive memory in backend metal layers
US9633896B1 (en) 2015-10-09 2017-04-25 Lam Research Corporation Methods for formation of low-k aluminum-containing etch stop films
WO2018063815A1 (en) * 2016-10-02 2018-04-05 Applied Materials, Inc. Doped selective metal caps to improve copper electromigration with ruthenium liner
US9859153B1 (en) * 2016-11-14 2018-01-02 Lam Research Corporation Deposition of aluminum oxide etch stop layers
CN107256845A (zh) * 2017-05-25 2017-10-17 上海集成电路研发中心有限公司 一种铜互连结构及其制造方法
US20190127212A1 (en) * 2017-10-31 2019-05-02 Texas Instruments Incorporated Forming a passivation coating for mems devices
US10741440B2 (en) * 2018-06-05 2020-08-11 Lam Research Corporation Metal liner passivation and adhesion enhancement by zinc doping
US10707119B1 (en) * 2019-01-14 2020-07-07 Globalfoundries Inc. Interconnect structures with airgaps and dielectric-capped interconnects
CN111769074B (zh) * 2019-04-02 2024-09-27 长鑫存储技术有限公司 半导体互连结构及其制作方法
KR102812547B1 (ko) * 2020-04-21 2025-05-27 프랙스에어 테크놀로지, 인코포레이티드 실리콘-게르마늄 층의 기상 선택적 식각을 위한 신규한 방법
CN114429990B (zh) * 2020-10-29 2026-01-23 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US11581258B2 (en) * 2021-01-13 2023-02-14 Nanya Technology Corporation Semiconductor device structure with manganese-containing interconnect structure and method for forming the same
US11961735B2 (en) * 2021-06-04 2024-04-16 Tokyo Electron Limited Cyclic plasma processing

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JP2001524754A (ja) 1997-11-26 2001-12-04 アプライド マテリアルズ インコーポレイテッド Cvdアルミニウム及びpvdアルミニウム集積を用いた新しいホール充填技術
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US20070145600A1 (en) 2005-12-28 2007-06-28 Hisashi Yano Semiconductor device and manufacturing method thereof

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Also Published As

Publication number Publication date
CN102130046A (zh) 2011-07-20
TW201709418A (zh) 2017-03-01
JP5773306B2 (ja) 2015-09-02
KR20110084130A (ko) 2011-07-21
JP2011146711A (ja) 2011-07-28
TWI612618B (zh) 2018-01-21
TW201138024A (en) 2011-11-01
CN102130046B (zh) 2015-01-14

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