KR101504781B1 - 듀얼 인라인 메모리 모듈의 상변화 메모리 - Google Patents

듀얼 인라인 메모리 모듈의 상변화 메모리 Download PDF

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KR101504781B1
KR101504781B1 KR1020100051646A KR20100051646A KR101504781B1 KR 101504781 B1 KR101504781 B1 KR 101504781B1 KR 1020100051646 A KR1020100051646 A KR 1020100051646A KR 20100051646 A KR20100051646 A KR 20100051646A KR 101504781 B1 KR101504781 B1 KR 101504781B1
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memory
dimm
pcm
modules
pcm modules
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KR20110007571A (ko
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쉬코우페 카와미
제러드 이. 헐버트
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마이크론 테크놀로지, 인크.
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40607Refresh operations in memory devices with an internal cache or data buffer
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0054Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
    • G11C14/009Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20Employing a main memory using a specific memory technology
    • G06F2212/202Non-volatile memory
    • G06F2212/2024Rewritable memory not requiring erasing, e.g. resistive or ferroelectric RAM
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/30Providing cache or TLB in specific location of a processing system
    • G06F2212/304In main memory subsystem
    • G06F2212/3042In main memory subsystem being part of a memory device, e.g. cache DRAM
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Hardware Redundancy (AREA)
KR1020100051646A 2009-07-16 2010-06-01 듀얼 인라인 메모리 모듈의 상변화 메모리 Active KR101504781B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/504,029 US8626997B2 (en) 2009-07-16 2009-07-16 Phase change memory in a dual inline memory module
US12/504,029 2009-07-16

Publications (2)

Publication Number Publication Date
KR20110007571A KR20110007571A (ko) 2011-01-24
KR101504781B1 true KR101504781B1 (ko) 2015-03-20

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US (4) US8626997B2 (enExample)
JP (2) JP5788151B2 (enExample)
KR (1) KR101504781B1 (enExample)
CN (1) CN101957726B (enExample)
DE (1) DE102010030742B4 (enExample)
TW (1) TWI506626B (enExample)

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KR20180127707A (ko) * 2017-05-22 2018-11-30 에스케이하이닉스 주식회사 메모리 모듈 및 이의 동작 방법
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Publication number Publication date
US10437722B2 (en) 2019-10-08
US11494302B2 (en) 2022-11-08
JP2016001485A (ja) 2016-01-07
JP5788151B2 (ja) 2015-09-30
US20140095781A1 (en) 2014-04-03
TWI506626B (zh) 2015-11-01
CN101957726B (zh) 2015-09-02
US20200019501A1 (en) 2020-01-16
DE102010030742B4 (de) 2018-04-05
US20110016268A1 (en) 2011-01-20
US9576662B2 (en) 2017-02-21
JP2011022998A (ja) 2011-02-03
KR20110007571A (ko) 2011-01-24
US8626997B2 (en) 2014-01-07
CN101957726A (zh) 2011-01-26
TW201115577A (en) 2011-05-01
US20170177478A1 (en) 2017-06-22
DE102010030742A1 (de) 2011-02-17

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