KR101495153B1 - 반도체 기판의 제작 방법 및 반도체장치 - Google Patents

반도체 기판의 제작 방법 및 반도체장치 Download PDF

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KR101495153B1
KR101495153B1 KR1020097026831A KR20097026831A KR101495153B1 KR 101495153 B1 KR101495153 B1 KR 101495153B1 KR 1020097026831 A KR1020097026831 A KR 1020097026831A KR 20097026831 A KR20097026831 A KR 20097026831A KR 101495153 B1 KR101495153 B1 KR 101495153B1
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South Korea
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layer
single crystal
substrate
crystal semiconductor
semiconductor substrates
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Korean (ko)
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KR20100022484A (ko
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순페이 야마자키
코이치로 타나카
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가부시키가이샤 한도오따이 에네루기 켄큐쇼
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
KR1020097026831A 2007-06-01 2008-05-19 반도체 기판의 제작 방법 및 반도체장치 Expired - Fee Related KR101495153B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007146889 2007-06-01
JPJP-P-2007-146889 2007-06-01
PCT/JP2008/059602 WO2008149699A1 (en) 2007-06-01 2008-05-19 Manufacturing method of semiconductor substrate and semiconductor device

Publications (2)

Publication Number Publication Date
KR20100022484A KR20100022484A (ko) 2010-03-02
KR101495153B1 true KR101495153B1 (ko) 2015-02-24

Family

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Family Applications (1)

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KR1020097026831A Expired - Fee Related KR101495153B1 (ko) 2007-06-01 2008-05-19 반도체 기판의 제작 방법 및 반도체장치

Country Status (5)

Country Link
US (1) US7863155B2 (https=)
JP (1) JP5348942B2 (https=)
KR (1) KR101495153B1 (https=)
CN (1) CN101681807B (https=)
WO (1) WO2008149699A1 (https=)

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JP4116587B2 (ja) * 2004-04-13 2008-07-09 浜松ホトニクス株式会社 半導体発光素子及びその製造方法
EP2174343A1 (en) * 2007-06-28 2010-04-14 Semiconductor Energy Laboratory Co, Ltd. Manufacturing method of semiconductor device
US8431451B2 (en) 2007-06-29 2013-04-30 Semicondutor Energy Laboratory Co., Ltd. Display device and method for manufacturing the same
JP5498670B2 (ja) 2007-07-13 2014-05-21 株式会社半導体エネルギー研究所 半導体基板の作製方法
TWI493609B (zh) * 2007-10-23 2015-07-21 半導體能源研究所股份有限公司 半導體基板、顯示面板及顯示裝置的製造方法
JP5700617B2 (ja) 2008-07-08 2015-04-15 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
SG163481A1 (en) * 2009-01-21 2010-08-30 Semiconductor Energy Lab Method for manufacturing soi substrate and semiconductor device
JP5453947B2 (ja) * 2009-06-17 2014-03-26 ソニー株式会社 固体撮像素子の製造方法
JP2011227369A (ja) * 2010-04-22 2011-11-10 Hitachi Displays Ltd 画像表示装置及びその製造方法
CN104058363B (zh) * 2013-03-22 2016-01-20 上海丽恒光微电子科技有限公司 基于mems透射光阀的显示装置及其形成方法
JP5549769B1 (ja) * 2013-08-26 2014-07-16 Ｔｄｋ株式会社 モジュール部品の製造方法
WO2016081367A1 (en) 2014-11-18 2016-05-26 Sunedison Semiconductor Limited HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING A CHARGE TRAPPING LAYER FORMED BY He-N2 CO-IMPLANTATION
EP3221885B1 (en) 2014-11-18 2019-10-23 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafer and a method of manufacturing
FR3029538B1 (fr) * 2014-12-04 2019-04-26 Soitec Procede de transfert de couche
US10283402B2 (en) 2015-03-03 2019-05-07 Globalwafers Co., Ltd. Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
EP3739620B1 (en) 2015-06-01 2022-02-16 GlobalWafers Co., Ltd. A silicon germanium-on-insulator structure
JP6749394B2 (ja) 2015-11-20 2020-09-02 グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． 滑らかな半導体表面の製造方法
US11114332B2 (en) 2016-03-07 2021-09-07 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
WO2017155806A1 (en) * 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
EP3469120B1 (en) 2016-06-08 2022-02-02 GlobalWafers Co., Ltd. High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
JP6810578B2 (ja) * 2016-11-18 2021-01-06 株式会社Ｓｃｒｅｅｎホールディングス ドーパント導入方法および熱処理方法
WO2019236320A1 (en) 2018-06-08 2019-12-12 Globalwafers Co., Ltd. Method for transfer of a thin layer of silicon
CN111081531B (zh) * 2019-10-30 2022-03-18 华灿光电（浙江）有限公司 外延层剥离方法

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KR19980033377A (ko) * 1996-10-31 1998-07-25 이데이노부유끼 박막 반도체 소자와 그 제조 방법 및 제조 장치, 및 박막 단결정 반도체 태양 전지와 그 제조 방법
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KR19980033377A (ko) * 1996-10-31 1998-07-25 이데이노부유끼 박막 반도체 소자와 그 제조 방법 및 제조 장치, 및 박막 단결정 반도체 태양 전지와 그 제조 방법
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Also Published As

Publication number Publication date
US7863155B2 (en) 2011-01-04
CN101681807B (zh) 2012-03-14
US20080299744A1 (en) 2008-12-04
KR20100022484A (ko) 2010-03-02
CN101681807A (zh) 2010-03-24
JP5348942B2 (ja) 2013-11-20
WO2008149699A1 (en) 2008-12-11
JP2009010353A (ja) 2009-01-15

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