KR101493301B1 - 반도체 웨이퍼의 제작 방법 - Google Patents

반도체 웨이퍼의 제작 방법 Download PDF

Info

Publication number
KR101493301B1
KR101493301B1 KR20080091426A KR20080091426A KR101493301B1 KR 101493301 B1 KR101493301 B1 KR 101493301B1 KR 20080091426 A KR20080091426 A KR 20080091426A KR 20080091426 A KR20080091426 A KR 20080091426A KR 101493301 B1 KR101493301 B1 KR 101493301B1
Authority
KR
South Korea
Prior art keywords
semiconductor wafer
ions
layer
bonding layer
ion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR20080091426A
Other languages
English (en)
Korean (ko)
Other versions
KR20090031258A (ko
Inventor
순페이 야마자키
아키하루 미야나가
코 이나다
유지 이와키
Original Assignee
가부시키가이샤 한도오따이 에네루기 켄큐쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 한도오따이 에네루기 켄큐쇼 filed Critical 가부시키가이샤 한도오따이 에네루기 켄큐쇼
Publication of KR20090031258A publication Critical patent/KR20090031258A/ko
Application granted granted Critical
Publication of KR101493301B1 publication Critical patent/KR101493301B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/225—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/12—Diffusion of dopants within, into or out of semiconductor bodies or layers between a solid phase and a gaseous phase
    • H10P32/1204—Diffusion of dopants within, into or out of semiconductor bodies or layers between a solid phase and a gaseous phase from a plasma phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR20080091426A 2007-09-21 2008-09-18 반도체 웨이퍼의 제작 방법 Expired - Fee Related KR101493301B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2007-00245809 2007-09-21
JP2007245809A JP5325404B2 (ja) 2007-09-21 2007-09-21 Ｓｏｉ基板の作製方法

Publications (2)

Publication Number Publication Date
KR20090031258A KR20090031258A (ko) 2009-03-25
KR101493301B1 true KR101493301B1 (ko) 2015-02-13

Family

ID=40472116

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20080091426A Expired - Fee Related KR101493301B1 (ko) 2007-09-21 2008-09-18 반도체 웨이퍼의 제작 방법

Country Status (5)

Country Link
US (2) US7829434B2 (enExample)
JP (1) JP5325404B2 (enExample)
KR (1) KR101493301B1 (enExample)
CN (1) CN101393860B (enExample)
TW (1) TWI446413B (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008132904A1 (en) * 2007-04-13 2008-11-06 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
US7825007B2 (en) * 2007-05-11 2010-11-02 Semiconductor Energy Laboratory Co., Ltd. Method of joining a plurality of SOI substrates on a glass substrate by a heat treatment
US7795111B2 (en) * 2007-06-27 2010-09-14 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate and manufacturing method of semiconductor device
KR101404781B1 (ko) * 2007-06-28 2014-06-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제조 방법
US8431451B2 (en) 2007-06-29 2013-04-30 Semicondutor Energy Laboratory Co., Ltd. Display device and method for manufacturing the same
US8501585B2 (en) * 2007-10-10 2013-08-06 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
US8163628B2 (en) * 2007-11-01 2012-04-24 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate
JP5548351B2 (ja) * 2007-11-01 2014-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR101127574B1 (ko) * 2009-04-06 2012-03-23 삼성모바일디스플레이주식회사 액티브 매트릭스 기판의 제조방법 및 유기 발광 표시장치의 제조방법
WO2011058913A1 (en) 2009-11-13 2011-05-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP5440360B2 (ja) 2010-04-26 2014-03-12 信越半導体株式会社 イオン注入状況の確認方法および半導体ウェーハの製造方法
US8735263B2 (en) 2011-01-21 2014-05-27 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US9653614B2 (en) 2012-01-23 2017-05-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US9024282B2 (en) 2013-03-08 2015-05-05 Varian Semiconductor Equipment Associates, Inc. Techniques and apparatus for high rate hydrogen implantation and co-implantion
JP6295815B2 (ja) * 2014-05-13 2018-03-20 株式会社Sumco 貼り合わせウェーハの製造方法
US9881832B2 (en) * 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
CN104979152A (zh) * 2015-07-28 2015-10-14 中国科学技术大学 一种离子注入设备
WO2017091515A1 (en) 2015-11-24 2017-06-01 University Of Washington Photosensitive medical tape
JP2019511834A (ja) * 2016-02-16 2019-04-25 ジーレイ スイッツァーランド エスアー 接合インターフェースを横断する電荷輸送のための構造、システムおよび方法
US9704820B1 (en) * 2016-02-26 2017-07-11 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor manufacturing method and associated semiconductor manufacturing system
JP6787268B2 (ja) * 2017-07-20 2020-11-18 株式会社Sumco 半導体エピタキシャルウェーハおよびその製造方法、ならびに固体撮像素子の製造方法
JP6581747B1 (ja) * 2018-02-09 2019-09-25 浜松ホトニクス株式会社 試料支持体、試料支持体の製造方法、及び試料のイオン化方法
WO2020264291A1 (en) 2019-06-28 2020-12-30 University Of Washington Apparatus, system, and method for activating a low-adhesion state of thermal-sensitive tape

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7148124B1 (en) * 2004-11-18 2006-12-12 Alexander Yuri Usenko Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers
WO2007014320A2 (en) * 2005-07-27 2007-02-01 Silicon Genesis Corporation Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process
US20080038908A1 (en) 2006-07-25 2008-02-14 Silicon Genesis Corporation Method and system for continuous large-area scanning implantation process
US20080246109A1 (en) 2007-04-03 2008-10-09 Semiconductor Energy Laboratory Co., Ltd. SOI substrate, method for manufacturing the same, and semiconductor device

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4529571A (en) * 1982-10-27 1985-07-16 The United States Of America As Represented By The United States Department Of Energy Single-ring magnetic cusp low gas pressure ion source
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
US6388652B1 (en) 1997-08-20 2002-05-14 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
US6271101B1 (en) 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
EP1039513A3 (en) 1999-03-26 2008-11-26 Canon Kabushiki Kaisha Method of producing a SOI wafer
JP2002033399A (ja) * 2000-07-13 2002-01-31 Toshiba Corp 半導体集積回路及びその製造方法
US6566158B2 (en) * 2001-08-17 2003-05-20 Rosemount Aerospace Inc. Method of preparing a semiconductor using ion implantation in a SiC layer
JP2004362901A (ja) * 2003-06-04 2004-12-24 Sharp Corp イオンドーピング装置、イオンドーピング方法および半導体装置
JP2006032920A (ja) * 2004-06-14 2006-02-02 Semiconductor Energy Lab Co Ltd 半導体装置、及びそれらの作製方法
FR2877491B1 (fr) * 2004-10-29 2007-01-19 Soitec Silicon On Insulator Structure composite a forte dissipation thermique
JP2006196614A (ja) * 2005-01-12 2006-07-27 Canon Inc 半導体基板の製造方法
US7674687B2 (en) 2005-07-27 2010-03-09 Silicon Genesis Corporation Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process
US20070281440A1 (en) * 2006-05-31 2007-12-06 Jeffrey Scott Cites Producing SOI structure using ion shower

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7148124B1 (en) * 2004-11-18 2006-12-12 Alexander Yuri Usenko Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers
WO2007014320A2 (en) * 2005-07-27 2007-02-01 Silicon Genesis Corporation Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process
US20080038908A1 (en) 2006-07-25 2008-02-14 Silicon Genesis Corporation Method and system for continuous large-area scanning implantation process
US20080246109A1 (en) 2007-04-03 2008-10-09 Semiconductor Energy Laboratory Co., Ltd. SOI substrate, method for manufacturing the same, and semiconductor device

Also Published As

Publication number Publication date
JP2009076771A (ja) 2009-04-09
US20100317161A1 (en) 2010-12-16
US20090081849A1 (en) 2009-03-26
TWI446413B (zh) 2014-07-21
JP5325404B2 (ja) 2013-10-23
CN101393860B (zh) 2013-10-30
US8043939B2 (en) 2011-10-25
CN101393860A (zh) 2009-03-25
TW200937503A (en) 2009-09-01
US7829434B2 (en) 2010-11-09
KR20090031258A (ko) 2009-03-25

Similar Documents

Publication Publication Date Title
KR101493301B1 (ko) 반도체 웨이퍼의 제작 방법
TWI478278B (zh) 用以生產ｓｏｉ基板及半導體裝置的方法
US9515139B2 (en) Trap rich layer formation techniques for semiconductor devices
CN101281912B (zh) Soi衬底及其制造方法以及半导体装置
JP4718425B2 (ja) 複合基板の作製方法
EP0652591A1 (en) Oxide in silicon-on-insulator structures
US9553174B2 (en) Conversion process utilized for manufacturing advanced 3D features for semiconductor device applications
US20090117692A1 (en) Manufacturing method of semiconductor device
US6777299B1 (en) Method for removal of a spacer
CN102308371A (zh) 具有覆盖层的经离子注入的衬底及方法
CN104241336B (zh) 包含具有应力通道区的晶体管的设备及其形成方法
US20130023104A1 (en) Method for manufacturing semiconductor device
KR102579576B1 (ko) 감소된 인터페이스 및 직렬 콘택트 저항을 위한 콘택트 집적
JP5252867B2 (ja) 半導体基板の製造方法
US20140073105A1 (en) Method of manufacturing semiconductor device with ion irradiation
JP5681354B2 (ja) Ｓｏｉ基板の作製方法
CN113611737A (zh) 基于22nm工艺条件的抗辐照FDSOI场效应管及其制备方法
CN102376560A (zh) 半导体器件的制作方法
US10177026B2 (en) Semiconductor structure and fabrication method therefor
JP3578345B2 (ja) 半導体装置の製造方法および半導体装置
JP2001189281A (ja) イオン打ち込み装置およびこれを用いた半導体集積回路装置の製造方法

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20180118

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20190116

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20200115

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20210210

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20210210

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000