KR101492464B1 - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR101492464B1
KR101492464B1 KR20080047895A KR20080047895A KR101492464B1 KR 101492464 B1 KR101492464 B1 KR 101492464B1 KR 20080047895 A KR20080047895 A KR 20080047895A KR 20080047895 A KR20080047895 A KR 20080047895A KR 101492464 B1 KR101492464 B1 KR 101492464B1
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South Korea
Prior art keywords
single crystal
crystal semiconductor
semiconductor layer
substrate
film
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Expired - Fee Related
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KR20080047895A
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English (en)
Korean (ko)
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KR20080106017A (ko
Inventor
히데카주 미야이리
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가부시키가이샤 한도오따이 에네루기 켄큐쇼
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/425—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer having different crystal properties in different TFTs or within an individual TFT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
  • Element Separation (AREA)
KR20080047895A 2007-06-01 2008-05-23 반도체장치의 제조방법 Expired - Fee Related KR101492464B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007146540 2007-06-01
JPJP-P-2007-00146540 2007-06-01

Publications (2)

Publication Number Publication Date
KR20080106017A KR20080106017A (ko) 2008-12-04
KR101492464B1 true KR101492464B1 (ko) 2015-02-11

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KR20080047895A Expired - Fee Related KR101492464B1 (ko) 2007-06-01 2008-05-23 반도체장치의 제조방법

Country Status (3)

Country Link
US (2) US7745268B2 (https=)
JP (1) JP5331381B2 (https=)
KR (1) KR101492464B1 (https=)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
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US7960262B2 (en) * 2007-05-18 2011-06-14 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device by applying laser beam to single-crystal semiconductor layer and non-single-crystal semiconductor layer through cap film
US8236668B2 (en) * 2007-10-10 2012-08-07 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP5503876B2 (ja) * 2008-01-24 2014-05-28 株式会社半導体エネルギー研究所 半導体基板の製造方法
JP2009260315A (ja) * 2008-03-26 2009-11-05 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法及び半導体装置の作製方法
JP5654206B2 (ja) * 2008-03-26 2015-01-14 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法及び該ｓｏｉ基板を用いた半導体装置
JP5552276B2 (ja) * 2008-08-01 2014-07-16 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
SG161151A1 (en) * 2008-10-22 2010-05-27 Semiconductor Energy Lab Soi substrate and method for manufacturing the same
SG162675A1 (en) * 2008-12-15 2010-07-29 Semiconductor Energy Lab Manufacturing method of soi substrate and manufacturing method of semiconductor device
JP2010177391A (ja) * 2009-01-29 2010-08-12 Sony Corp 固体撮像装置、電子機器、固体撮像装置の製造方法
TWI500118B (zh) 2010-11-12 2015-09-11 半導體能源研究所股份有限公司 半導體基底之製造方法
EP2637210A1 (en) * 2012-03-05 2013-09-11 ABB Technology AG Power semiconductor device and method for manufacturing thereof
JP6076068B2 (ja) * 2012-12-17 2017-02-08 ルネサスエレクトロニクス株式会社 半導体集積回路装置
CN104538354B (zh) * 2014-12-31 2018-01-09 深圳市华星光电技术有限公司 一种ltps tft像素单元及其制造方法
US10246772B2 (en) * 2015-04-01 2019-04-02 Applied Materials, Inc. Plasma enhanced chemical vapor deposition of films for improved vertical etch performance in 3D NAND memory devices
KR20250083279A (ko) 2023-11-30 2025-06-10 삼성디스플레이 주식회사 표시 장치의 제조 장치

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010039810A (ko) * 1999-08-19 2001-05-15 아끼구사 나오유끼 반도체 장치의 제조방법
KR20030026908A (ko) * 2001-09-25 2003-04-03 샤프 가부시키가이샤 결정성 반도체막, 그의 제조방법, 반도체장치 및 그의제조방법
JP2003282885A (ja) * 2002-03-26 2003-10-03 Sharp Corp 半導体装置およびその製造方法
JP2005252244A (ja) * 2004-02-03 2005-09-15 Ishikawajima Harima Heavy Ind Co Ltd 半導体基板の製造方法

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JPS61142738A (ja) * 1984-12-17 1986-06-30 Toshiba Corp 単結晶基体へのイオン注入方法
JPH03252393A (ja) * 1990-03-02 1991-11-11 Nec Corp 表面プロセス制御方法及び装置
JP3431033B2 (ja) 1993-10-29 2003-07-28 株式会社半導体エネルギー研究所 半導体作製方法
US5923962A (en) 1993-10-29 1999-07-13 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
TW264575B (https=) 1993-10-29 1995-12-01 Handotai Energy Kenkyusho Kk
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2000068520A (ja) * 1997-12-17 2000-03-03 Matsushita Electric Ind Co Ltd 半導体薄膜、その製造方法、および製造装置、ならびに半導体素子、およびその製造方法
US6855584B2 (en) * 2001-03-29 2005-02-15 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
US7253032B2 (en) 2001-04-20 2007-08-07 Semiconductor Energy Laboratory Co., Ltd. Method of flattening a crystallized semiconductor film surface by using a plate
TW544938B (en) 2001-06-01 2003-08-01 Semiconductor Energy Lab Method of manufacturing a semiconductor device
JP2003142402A (ja) * 2001-08-10 2003-05-16 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP4772258B2 (ja) * 2002-08-23 2011-09-14 シャープ株式会社 Ｓｏｉ基板の製造方法
US7119365B2 (en) * 2002-03-26 2006-10-10 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
JP4759919B2 (ja) * 2004-01-16 2011-08-31 セイコーエプソン株式会社 電気光学装置の製造方法
US20070117287A1 (en) 2005-11-23 2007-05-24 Semiconductor Energy Laboratory Co., Ltd. Laser irradiation apparatus
US7579654B2 (en) * 2006-05-31 2009-08-25 Corning Incorporated Semiconductor on insulator structure made using radiation annealing
KR101457656B1 (ko) * 2007-05-17 2014-11-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치의 제조방법, 표시장치의 제조방법, 반도체장치,표시장치 및 전자기기

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010039810A (ko) * 1999-08-19 2001-05-15 아끼구사 나오유끼 반도체 장치의 제조방법
KR20030026908A (ko) * 2001-09-25 2003-04-03 샤프 가부시키가이샤 결정성 반도체막, 그의 제조방법, 반도체장치 및 그의제조방법
JP2003282885A (ja) * 2002-03-26 2003-10-03 Sharp Corp 半導体装置およびその製造方法
JP2005252244A (ja) * 2004-02-03 2005-09-15 Ishikawajima Harima Heavy Ind Co Ltd 半導体基板の製造方法

Also Published As

Publication number Publication date
US20080299743A1 (en) 2008-12-04
US7745268B2 (en) 2010-06-29
US20100221858A1 (en) 2010-09-02
JP5331381B2 (ja) 2013-10-30
US8053333B2 (en) 2011-11-08
KR20080106017A (ko) 2008-12-04
JP2009010365A (ja) 2009-01-15

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