KR101324855B1 - 수퍼접합 전력 ｍｏｓｆｅｔ - Google Patents

수퍼접합 전력 ｍｏｓｆｅｔ Download PDF

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Publication number
KR101324855B1
KR101324855B1 KR1020087014424A KR20087014424A KR101324855B1 KR 101324855 B1 KR101324855 B1 KR 101324855B1 KR 1020087014424 A KR1020087014424 A KR 1020087014424A KR 20087014424 A KR20087014424 A KR 20087014424A KR 101324855 B1 KR101324855 B1 KR 101324855B1
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South Korea
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regions
doped region
conductivity type
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KR20080084967A (ko
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에두아르드 디. 더 프레사트
로버트 더블유. 베어드
간밍 친
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프리스케일 세미컨덕터, 인크.
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0293—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using formation of insulating sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/663—Vertical DMOS [VDMOS] FETs having both source contacts and drain contacts on the same surface, i.e. up-drain VDMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156—Drain regions of DMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156—Drain regions of DMOS transistors
    • H10D62/157—Impurity concentrations or distributions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/663—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020087014424A 2005-12-14 2006-11-13 수퍼접합 전력 ｍｏｓｆｅｔ Expired - Fee Related KR101324855B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/304,196 US7378317B2 (en) 2005-12-14 2005-12-14 Superjunction power MOSFET
US11/304,196 2005-12-14
PCT/US2006/060826 WO2007133280A2 (en) 2005-12-14 2006-11-13 Superjunction power mosfet

Publications (2)

Publication Number Publication Date
KR20080084967A KR20080084967A (ko) 2008-09-22
KR101324855B1 true KR101324855B1 (ko) 2013-11-01

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KR1020087014424A Expired - Fee Related KR101324855B1 (ko) 2005-12-14 2006-11-13 수퍼접합 전력 ｍｏｓｆｅｔ

Country Status (5)

Country Link
US (2) US7378317B2 (enExample)
JP (1) JP2009520365A (enExample)
KR (1) KR101324855B1 (enExample)
TW (1) TWI414067B (enExample)
WO (1) WO2007133280A2 (enExample)

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* Cited by examiner, † Cited by third party
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US7679146B2 (en) * 2006-05-30 2010-03-16 Semiconductor Components Industries, Llc Semiconductor device having sub-surface trench charge compensation regions
US7504676B2 (en) * 2006-05-31 2009-03-17 Alpha & Omega Semiconductor, Ltd. Planar split-gate high-performance MOSFET structure and manufacturing method
US7670914B2 (en) * 2006-09-28 2010-03-02 Globalfoundries Inc. Methods for fabricating multiple finger transistors
CN102299073A (zh) * 2010-06-25 2011-12-28 无锡华润上华半导体有限公司 Vdmos器件及其制作方法
TWI405271B (zh) * 2010-12-30 2013-08-11 Anpec Electronics Corp 製作具有超級介面之功率半導體元件之方法
CN102737990A (zh) * 2011-04-12 2012-10-17 北大方正集团有限公司 处理半导体器件的方法、装置和系统
JP5745974B2 (ja) * 2011-09-05 2015-07-08 三菱電機株式会社 半導体装置およびその製造方法
US8841718B2 (en) * 2012-01-16 2014-09-23 Microsemi Corporation Pseudo self aligned radhard MOSFET and process of manufacture
US8895394B2 (en) 2012-06-20 2014-11-25 Freescale Semiconductor, Inc. Trench FET with source recess etch
KR101369973B1 (ko) * 2013-03-28 2014-03-06 메이플세미컨덕터(주) 전력용 센스 모스펫 제조 방법
CN104810397B (zh) * 2014-01-26 2018-01-09 国家电网公司 一种超级结碳化硅mosfet器件及其制作方法
US9553184B2 (en) * 2014-08-29 2017-01-24 Nxp Usa, Inc. Edge termination for trench gate FET
US9397213B2 (en) 2014-08-29 2016-07-19 Freescale Semiconductor, Inc. Trench gate FET with self-aligned source contact
US9680003B2 (en) 2015-03-27 2017-06-13 Nxp Usa, Inc. Trench MOSFET shield poly contact
CN106298892A (zh) * 2015-05-27 2017-01-04 北大方正集团有限公司 Vdmos器件的制作方法
CN107545076A (zh) * 2016-06-23 2018-01-05 上海北京大学微电子研究院 一种超结mos器件终端仿真方法
CN112864221B (zh) * 2019-11-27 2022-04-15 苏州东微半导体股份有限公司 半导体超结功率器件
CN116137283B (zh) * 2021-11-17 2025-09-12 苏州东微半导体股份有限公司 半导体超结功率器件

Citations (2)

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JPH05160407A (ja) * 1991-12-09 1993-06-25 Nippondenso Co Ltd 縦型絶縁ゲート型半導体装置およびその製造方法
US20040113200A1 (en) * 2000-10-31 2004-06-17 Fuji Electric Co., Ltd. Semiconductor device

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JPH0324737A (ja) * 1989-06-22 1991-02-01 Nissan Motor Co Ltd 半導体装置およびその製造方法
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JP3161767B2 (ja) * 1991-08-13 2001-04-25 沖電気工業株式会社 半導体素子の製造方法
JP3259330B2 (ja) * 1992-06-19 2002-02-25 株式会社日立製作所 半導体装置の製造方法
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US20040113200A1 (en) * 2000-10-31 2004-06-17 Fuji Electric Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
JP2009520365A (ja) 2009-05-21
US20070132020A1 (en) 2007-06-14
WO2007133280A2 (en) 2007-11-22
US7378317B2 (en) 2008-05-27
WO2007133280A3 (en) 2008-04-10
TWI414067B (zh) 2013-11-01
US7602014B2 (en) 2009-10-13
KR20080084967A (ko) 2008-09-22
US20080197409A1 (en) 2008-08-21
TW200746418A (en) 2007-12-16

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