KR101189270B1 - Panel and liquid crystal display includig the same - Google Patents

Abstract

The display panel according to the present invention includes a substrate and a pixel electrode formed on the substrate and having a pair of first peripheral sides facing each other and a pair of second peripheral sides facing each other and facing each other. The second peripheral portion of the pixel electrode includes a sawtooth protrusion.

LCD, domain control means, texture, incision

Description

Display panel and liquid crystal display including the same {PANEL AND LIQUID CRYSTAL DISPLAY INCLUDIG THE SAME}

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a layout view of a thin film transistor array panel for the liquid crystal display of FIG. 1.

FIG. 3 is a layout view of a common electrode display panel for the liquid crystal display of FIG. 1.

4 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along the line IV-IV.

FIG. 5 is a layout view of a common electrode and a pixel electrode in FIG. 1.

FIG. 6 is an enlarged view of pixel electrodes adjacent to each other in FIG. 1.

7 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 8 is a layout view of the thin film transistor array panel for the liquid crystal display of FIG. 7.

FIG. 9 is a layout view of a common electrode display panel for the liquid crystal display of FIG. 7.

FIG. 10 is a cross-sectional view of the liquid crystal display of FIG. 7 taken along the line X-X. FIG.

FIG. 11 is a cross-sectional view taken along line XI-XI of FIG. 6.

12 is a cross-sectional view taken along line XII-XII of FIG. 7.

13 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

14 is a cross-sectional view of the liquid crystal display of FIG. 13 taken along the line XIV-XIV.

FIG. 15 is a cross-sectional view taken along line IV-IV of FIG. 1 with a liquid crystal display according to another exemplary embodiment of the present invention.

16 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

17 is a layout view of a thin film transistor array panel for a liquid crystal display device of FIG. 16.

18 is a layout view of a common electrode display panel for the liquid crystal display of FIG. 16.

19 and 20 are cross-sectional views of the liquid crystal display of FIG. 16 taken along lines XIX-XIX and XX-XX, respectively.

21 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 22 is an enlarged view of XXII in FIG. 21.

FIG. 23 is a cross-sectional view taken along the line XXIII-XXIII of FIG. 21.

24 is a cross-sectional view taken along the line XXIV-XXIV of FIG. 21.

FIG. 25 is a schematic equivalent circuit diagram of one pixel of the liquid crystal display shown in FIG. 21.

26 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 27 is an enlarged view of XXVII of FIG. 26.

FIG. 28 is a cross-sectional view taken along the line XXVIII-XXVIII of FIG. 2.

FIG. 29 is a cross-sectional view taken along the line XXIX-XXIX of FIG. 26.

30 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 31 is an enlarged view of XXXI of FIG. 30.

32 and 33 are cross-sectional views of the liquid crystal display of FIG. 30 taken along lines XXXII-XXXII and XXXIII-XXXIII, respectively.

<Description of Drawing Major Symbols>

11, 21: alignment film 12, 22: polarizer

71, 72a, 72b, 73a, 73b, 74a, 74b, 75: incision of the common electrode

81, 81a, 81b, 82, 82a, 82b: contact auxiliary member

91, 92, 92a, 92b, 93, 94a, 94b: cutout of the pixel electrode

110, 210: substrate

121, 121a, 121b, 129a, 129b, 129: gate line

124, 124a, and 124b: gate electrode 140: gate insulating film

151, 154, 154a, and 154b: semiconductor

161, 163, 163a, 163b, 165, 165a, 165b, 166: resistive contact member

171, 171a, 171b, 179, 179a, 179b: data line

173, 173a, and 173b: source electrode

175, 175a, and 175b: drain electrode 180: protective film

181, 181a, 181b, 182, 182a, 182b, 183a, 183b, 185, 185a, 185b: contact hole

191: pixel electrode 230: color filter

250: overcoat 270: common electrode

The present invention relates to a liquid crystal display device.

Liquid crystal displays are one of the most widely used flat panel display devices. Two liquid crystal display panels in which field generating electrodes, such as a pixel electrode and a common electrode, are formed, and a liquid crystal layer interposed therebetween It includes a polarizer attached. The liquid crystal display generates an electric field in the liquid crystal layer by applying a voltage to the field generating electrode, thereby determining the direction of the liquid crystal molecules of the liquid crystal layer and controlling the polarization of incident light to display an image.

Among such liquid crystal displays, a liquid crystal display having a vertically aligned mode in which the long axis of the liquid crystal molecules is perpendicular to the display panel without an electric field applied to the liquid crystal display is attracting attention due to its high contrast ratio and wide reference viewing angle.

Specific methods for implementing a wide reference viewing angle in a vertical alignment liquid crystal display include a method of forming a cutout in the field generating electrode and a method of forming a protrusion on the field generating electrode. Since the cutout and the protrusion determine the tilt direction of the liquid crystal molecules, the reference viewing angle can be widened by appropriately arranging them to disperse the inclined directions of the liquid crystal molecules in various directions.

On the other hand, the inclination direction of the liquid crystal molecules is known to have the best light efficiency to form a 45 ° polarization direction of the polarizer and the polarizer is generally attached so that the polarization direction is parallel or perpendicular to the gate line or data line. As a result, the cutout and the protrusion are formed to extend at 45 ° with the gate line and the data line.

However, in a liquid crystal display device in which the pixel electrode is in a rectangular shape parallel to the gate line and the data line, an array of liquid crystal molecules is disturbed due to an electric field generated between adjacent pixel electrodes, thereby resulting in a texture, thereby reducing transmittance.

In addition, in order to reduce the texture, a portion overlapping the edge of the pixel electrode may be disposed in the cutout of the common electrode, in which case the aperture ratio may be reduced.

The technical problem to be achieved by the present invention is to increase the aperture ratio and transmittance.

The display panel according to the present invention for achieving the above object is formed on the substrate and the substrate, a pair of first peripheral sides and a pair of second peripheral surfaces facing each other and connected to each other And a pixel electrode having a side, and the second peripheral side of the pixel electrode includes a sawtooth protrusion.

Alternatively, the display panel may include a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines orthogonal to the gate lines, a plurality of thin film transistors connected to the gate lines and the data lines, and a plurality of pixel electrodes connected to the thin film transistors. Each of the pixel electrodes has a pair of first peripheral sides that are parallel to the gate line and face each other, and a pair of second peripheral sides that are connected to the first edge and that face each other and include a jagged protrusion. .

The pixel electrode may include a plurality of cutouts forming an oblique angle with the first peripheral portion.

The protrusion may have a first side that makes an angle greater than 135 ° or less than 45 ° with the incision.

The protrusion may further have a second side parallel to the incision.

The second side of the protrusion may be located on an extension line of one side of the incision.

The envelope and the first peripheral edge of the protrusion may form a rectangle.

At least one of the corners of the rectangle may be chamfered to form a hypotenuse.

The rectangular chamfered hypotenuse may be 45 ° with the first perimeter.

The protrusion may overlap the data line.

The protruding portions of the adjacent second peripheral portions of the adjacent pixel electrodes may be disposed to be engaged with each other.

Opposite sides of the protrusions arranged to engage each other may be parallel to each other.

According to another aspect of the present invention, there is provided a liquid crystal display device including: a pixel electrode, a common electrode facing the pixel electrode, a liquid crystal layer positioned between the pixel electrode and the common electrode, and a first electrode partitioning the pixel electrode into a plurality of subregions. And a second partition member, wherein each of the subregions has a pair of peripheral sides facing each other and a plurality of secondary sides connected thereto, and peripheral portions of the two subregions included in two adjacent pixel electrodes are shifted from each other.

The perimeter may be oblique with the first and second partition members.

At least one of the side edges of each subregion may meet the edge side at an angle greater than 135 degrees.

The periphery of each subregion includes a first periphery and a second periphery shorter than the second periphery, and the first periphery may be formed by combining one side of the first or second partition member and a part of the side of the pixel electrode. have.

The second peripheral side of each subregion may be formed of one side of the second partition member or a corner of the pixel electrode.

The first partition member may be formed in the pixel electrode, and the second partition member may be formed in the common electrode.

Some of the sides of the pixel electrode form a side of the subregion, and the second partition member may not overlap with some of the sides of the pixel electrode forming the side of the subregion.

The first and second partition members may comprise an incision.

The common electrode may have a connection cutout facing the gap of the neighboring pixel electrode, and the connection cutout may connect the neighboring second partition members.

The connection cutout and the second partition member may be obtuse and the connection cutout width may be wider than the gap width.

The first and second partition members may be parallel and the connection cutout may be parallel to the side of the subregion.

The connection incision width may be about 8 μm larger than the gap width.

The display device may further include a data line overlapping the side of the sub region, and the connection cutout may face the data line.

The light blocking member may further include a light blocking member facing the data line, and the width of the light blocking member may be equal to the width of the data line.

Some of the sub-regions of the sub-region do not overlap the data line, and the light blocking member may further include an extension that covers some of the sub-sides of the sub-region that do not overlap the data line.

The pixel electrode may include at least two subpixel electrodes physically separated from each other by some of the first partition members.

Voltages of at least two subpixel electrodes may be different from each other, and at least two subpixel electrodes may be capacitively coupled.

The subpixel electrodes may be connected to the thin film transistors, respectively.

Each subpixel electrode in one pixel electrode may be connected to a different data line, and each subpixel electrode in one pixel electrode may be connected to the same gate line.

Each subpixel electrode in one pixel electrode may be connected to a different gate line, and each subpixel electrode in one pixel electrode may be connected to the same data line.

Alternatively, the liquid crystal display device includes a first and second substrates facing each other, a plurality of pixel electrodes formed on the first substrate, a common electrode formed on the second substrate, and a liquid crystal layer formed between the first and second substrates. The common electrode may include a first cutout that faces a gap between neighboring pixel electrodes.

The common electrode may have a second cutout facing the pixel electrode, and the first cutout may connect a neighboring second cutout.

The first cutout and the second cutout may form an obtuse angle, and the first cutout width may be wider than the gap width.

The first incision width may be about 8 μm larger than the gap width.

The pixel electrode may include a third cutout disposed alternately with the first cutout, and the first cutout and the third cutout may be parallel to each other.

A portion of the boundary line of the pixel electrode may be parallel to the boundary line of the first cutout.

The first substrate may include a gate line and a data line insulated and intersected on the first substrate, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor.

The gate line may form 45 ° with the first cutout, and the boundary line of the pixel electrode may partially overlap the data line.

The first cutout may face the data line, and one side of the second cutout may be open.

Then, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

In the drawings, the thickness is enlarged to clearly represent the layers and regions. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle.

A liquid crystal display according to an exemplary embodiment of the present invention will now be described in detail with reference to FIGS. 1 to 5.

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention, FIG. 2 is a layout view of a thin film transistor array panel for the liquid crystal display of FIG. 1, and FIG. 3 is a layout view of the common electrode display panel for the liquid crystal display of FIG. 1. 4 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along a line IV-IV, FIG. 5 is a layout view of a common electrode and a pixel electrode in FIG. 1, and FIG. Figure is an enlarged view.

The liquid crystal display according to the present exemplary embodiment includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other, and a liquid crystal layer 3 interposed between the two display panels 100 and 200.

First, the thin film transistor array panel 100 will be described in detail with reference to FIGS. 1, 2, and 4.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits the gate signal and extends mainly in the horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding upward and downward and a wide end portion 129 for connection with another layer or an external driving circuit. A gate driving circuit (not shown) for generating a gate signal may be mounted on a flexible printed circuit film (not shown) attached on the substrate 110, directly mounted on the substrate 110, And may be integrated on the substrate 110. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend and be directly connected thereto.

The storage electrode line 131 receives a predetermined voltage and has a stem line extending substantially in parallel with the gate line 121 and a plurality of first, second, third and fourth storage electrodes 133a, 133b, 133c, 133d) a set and a plurality of connections 133e. Each of the storage electrode lines 131 is positioned between two adjacent gate lines 121, and the stem line is closer to the upper side of the two gate lines 121.

The first and second storage electrodes 133a and 133b extend in the vertical direction and face each other. The first storage electrode 133a has a fixed end connected to the stem line and a free end opposite thereto, and the free end includes a protrusion. The third and fourth storage electrodes 133c and 133d extend obliquely from the center of the first storage electrode 133a to the lower end and the upper end of the second storage electrode 133b. The connecting portion 133e is connected between adjacent sets of sustain electrodes 133a to 133d. However, the shape and arrangement of the sustain electrode lines 131 can be variously modified.

The gate line 121 and the storage electrode line 131 may be formed of a metal such as aluminum (Al) or an aluminum alloy, a metal such as silver (Ag) or silver alloy, a copper metal such as copper or copper alloy, Such as molybdenum metal, chromium (Cr), tantalum (Ta), and titanium (Ti), such as molybdenum (Mo) or molybdenum alloy. However, they may have a multi-film structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having a low resistivity, for example, an aluminum-based metal, a silver-based metal, or a copper-based metal to reduce signal delay and voltage drop. Alternatively, the other conductive film is made of a material having excellent physical, chemical and electrical contact properties with other materials, particularly indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum metal, chromium, tantalum and titanium. A good example of such a combination is a chromium bottom film, an aluminum (alloy) top film, an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate line 121 and the sustain electrode line 131 may be made of various other metals or conductors.

Side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30-80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate line 121 and the storage electrode line 131.

A plurality of linear semiconductors 151 made of hydrogenated amorphous silicon (hereinafter referred to as a-Si) or polysilicon are formed on the gate insulating layer 140. The linear semiconductor 151 mainly extends in the longitudinal direction and includes a plurality of projections 154 extending toward the gate electrode 124. The width of the linear semiconductor 151 in the vicinity of the gate line 121 and the storage electrode line 131 is widened to cover them extensively.

On the semiconductor 151, a plurality of linear and island-shaped ohmic contacts 161 and 165 are formed. The resistive contact members 161 and 165 may be made of a material such as n + hydrogenated amorphous silicon, or may be made of silicide, which is heavily doped with phosphorous n-type impurities. The linear ohmic contact 161 has a plurality of protrusions 163, and the protrusion 163 and the island-type ohmic contact 165 are paired and disposed on the protrusion 154 of the semiconductor 151.

Side surfaces of the semiconductor 151 and the ohmic contacts 161 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 ° to 80 °.

On the ohmic contacts 161 and 165 and the gate insulating layer 140, a plurality of data lines 171, a plurality of drain electrodes 175, and a plurality of isolated metal pieces ( 178 is formed.

The data line 171 transmits a data voltage and mainly extends in a vertical direction to intersect the gate line 121, the stem line of the storage electrode line 131, and the connection portion 133e. Each data line 171 includes a plurality of source electrodes 173 extending toward the gate electrode 124 and bent in a C-shape and a wide end portion 179 for connection with another layer or an external driving circuit. do. A data driving circuit (not shown) for generating a data voltage is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or integrated in the substrate 110. Can be. When the data driving circuit is integrated on the substrate 110, the data line 171 can extend and be directly connected thereto.

The drain electrode 175 is separated from the data line 171 and faces the source electrode 173 with the gate electrode 124 as a center. Each drain electrode 175 has one wide end and the other end having a rod shape, and the rod end portion is partially surrounded by the source electrode 173.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the protrusion 154 of the semiconductor form one thin film transistor (TFT), and a channel of the thin film transistor. A channel is formed in the protrusion 154 between the source electrode 173 and the drain electrode 175.

The isolated metal piece 178 is positioned on the gate line 121 near the first storage electrode 133a.

The data line 171, the drain electrode 175, and the metal piece 178 are preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and a refractory metal film (not shown). And a low resistance conductive film (not shown). Examples of the multi-layer structure include a double layer of chromium or molybdenum (alloy) lower layer and an aluminum (alloy) upper layer, a triple layer of molybdenum (alloy) lower layer and aluminum (alloy) interlayer and molybdenum (alloy) upper layer. However, the data line 171, the drain electrode 175, and the metal piece 178 may be made of various other metals or conductors.

The side of the data line 171, the drain electrode 175, and the metal piece 178 may be inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The resistive contact members 161 and 165 are present only between the semiconductor 151 under the resistive contact members 161 and 165 and the data line 171 and the drain electrode 175 thereon and lower the contact resistance therebetween. Although the linear semiconductor 151 is narrower than the data line 171 in most places, as described above, the width of the linear semiconductor 151 is widened at the portion where it meets the gate line 121 to smooth the profile of the surface, thereby disconnecting the data line 171. prevent. The semiconductor 151 has an exposed portion between the source electrode 173 and the drain electrode 175, and not covered by the data line 171 and the drain electrode 175.

A passivation layer 180 is formed on the data line 171, the drain electrode 175, the metal piece 178, and the exposed semiconductor 151. The protective film 180 is made of an inorganic insulating material or an organic insulating material and may have a flat surface. Examples of the inorganic insulating material include silicon nitride and silicon oxide. The organic insulating material may have photosensitivity and its dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 151 while maintaining excellent insulating properties of the organic layer.

In the passivation layer 180, a plurality of contact holes 182 and 185 exposing the end portion 179 and the drain electrode 175 of the data line 171 are formed, respectively, and the passivation layer 180 and the gate insulating layer are formed. 140, a plurality of contact holes 181 exposing the end portion 129 of the gate line 121, a plurality of contact holes 183a exposing protrusions of the free end of the first storage electrode 133a, and a first holding portion. A plurality of contact holes 183b exposing a part of the sustain electrode line 131 near the fixed end of the electrode 133a are formed.

A plurality of pixel electrodes 191, a plurality of overpasses 83, and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

The pixel electrode 191 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage from the drain electrode 175. The pixel electrode 191 to which the data voltage is applied is formed between the two electrodes 191 and 270 by generating an electric field together with the common electrode 270 of the common electrode display panel 200 to which the common voltage is applied. The direction of the liquid crystal molecules 31 of the liquid crystal layer 3 is determined. The polarization of light passing through the liquid crystal layer 3 varies according to the direction of the liquid crystal molecules 31 determined as described above. The pixel electrode 191 and the common electrode 270 form a capacitor (hereinafter referred to as a &quot; liquid crystal capacitor &quot;) to maintain the applied voltage even after the thin film transistor is turned off.

The pixel electrode 191 overlaps the storage electrode line 131 including the storage electrodes 133a-133d. A capacitor formed by the pixel electrode 191 and the drain electrode 175 electrically connected to the pixel electrode 191 overlapping the storage electrode line 131 is called a storage capacitor, and the storage capacitor enhances the voltage holding capability of the liquid crystal capacitor.

A central cutout 91, a lower cutout 92a, and an upper cutout 92b are formed in the pixel electrode 191, and the pixel electrode 191 includes a plurality of regions by the cutouts 91-92b. It is divided into partitions. The cutouts 91-92b are almost inverted symmetric with respect to an imaginary transverse centerline that bisects the pixel electrode 191.

The lower and upper cutouts 92a and 92b extend obliquely from the right side to the left side of the pixel electrode 191 and overlap the third and fourth sustain electrodes 133c and 133d, respectively. The lower and upper cutouts 92a and 92b are positioned at the lower half and the upper half with respect to the horizontal center line of the pixel electrode 191, respectively. The lower and upper cutouts 92a and 92b extend perpendicular to each other at an angle of about 45 ° with respect to the gate line 121.

The central cutout portion 91 extends along the horizontal center line of the pixel electrode 191 and has an opening on the right side. The inlet of the central incision 91 has a pair of hypotenuses substantially parallel to the lower incision 92a and the upper incision 92b, respectively.

Therefore, the lower half of the pixel electrode 191 is divided into two regions by the lower cutout 92a, and the upper half is also divided into two regions by the upper cutout 92b.

Referring to FIG. 5, each pixel electrode 191 has a pair of first peripheral sides 193 and 194 facing each other and a pair of second peripheral sides 195 and 196 connected thereto. The first and second edges 193 and 194 are substantially parallel to the gate line 121, and the second and second edges 195 and 196 are substantially parallel to the data line 171. 952, 961, 962 and the inner or outer envelopes 951, 961, 952, 962 of the first periphery 193, 194 and the second perimeter 195, 196 are approximately rectangular. The left corner of the pixel electrode 191 is chamfered to form hypotenuses 193c and 194c, and the angular hypotenuses 193c and 194c form an angle of about 45 ° with respect to the gate line 121.

The second peripheral portions 195 and 196 of the pixel electrode 191 may include a plurality of vertical segments 915 and 925 positioned on the inner envelopes 951 and 961 and a plurality of teeth 910 and 920 protruding outwardly therefrom. ) And is substantially symmetrical with respect to the horizontal center line of the pixel electrode 191.

Each tooth 910, 920 has a first hypotenuse 911, 921 and a second hypotenuse 912, 922 facing each other, and an upper side 913, which connects them and is located on the outer envelope 952, 962. 923). The first hypotenuse 911, 921 meets an obtuse angle greater than about 135 ° with the longitudinal segments 915, 925, and the second hypotenuse 912, 922 has an angle of about 45 ° with the longitudinal segments 915, 925. The extension lines of the first hypotenuse 911 and 921 and the second hypotenuse 912 and 922 meet with each other at an acute angle smaller than about 45 °. In addition, the second hypotenuse 912, 922 is substantially parallel to the lower and upper incisions 92a, 92b and is on the extension of the incisions 92a, 92b, and the first hypotenuse 911, 921 is defined by the lower and upper incisions 92a, 92b. Make an angle with the upper incisions 92a, 92b less than about 45 ° or greater than 135 °.

The upper portions of the teeth 910 and 920, that is, the vicinity of the upper sides 913 and 923, overlap the data line 171, and the right side 196 of the pixel electrode 191 positioned on the left side of the data line 171 is located. The teeth 920 and the teeth 910 of the pixel electrode 191 positioned on the right side are arranged to be engaged. In addition, opposite sides of the teeth 910 and 920 meshing with each other are parallel to each other.

The number of teeth 910 and 920 is closely related to the number of the pixel electrode 191 divided by the cutouts 91-92b or the number of the cutouts. The number of pixels 920 may vary depending on the size of the pixel electrode 191, the ratio of the length of the horizontal side and the vertical side of the pixel electrode 191, and the type or characteristics of the liquid crystal layer 3.

The connecting leg 83 crosses the gate line 121, and exposes the first portion and the first holding portion of the storage electrode line 131 through contact holes 183a and 183b positioned on opposite sides with the gate line 121 interposed therebetween. The electrode 133a is connected to the exposed end of the free end. The storage electrode lines 131 including the storage electrodes 133a and 133b may be used together with the connecting legs 83 to repair defects in the gate line 121, the data line 171, or the thin film transistor.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact assistants 81 and 82 complement and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

Next, the common electrode display panel 200 will be described with reference to FIGS. 1, 3, and 4.

A light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 is called a black matrix and blocks light leakage between the pixel electrodes 191. The light blocking member 220 has a plurality of openings 225 facing the pixel electrode 191 and having a substantially rectangular shape. The width W of the portion 221 of the light blocking member 220 corresponding to the data line 171 is substantially the same as the width of the data line 171 (however, alignment errors of the display panels 100 and 200 may be taken into consideration. Yes], the light blocking member 220 includes an extension portion 222 to cover the space between the meshing teeth 910, 920 protruding out of the data line 171. The light blocking member 220 may further include a portion corresponding to the thin film transistor.

A plurality of color filters 230 are further formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The cover film 250 can be made of (organic) insulation and prevents the color filter 230 from being exposed and provides a flat surface. The overcoat 250 may be omitted.

A common electrode 270 is formed on the lid 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO, and the plurality of cutouts 71, 72a, and 72b are formed in the common electrode 270.

One set of cutouts 71-72b faces one pixel electrode 191 and includes a central cutout 71, a lower cutout 72a, and an upper cutout 72b. Each of the cutouts 71-72b is disposed between the adjacent cutouts 91-92b of the pixel electrode 191 or between the cutouts 92a and 92b and the concave hypotenuse of the pixel electrode 191. In addition, each cutout 71-72b extends substantially in parallel with the lower cutout 92a or the upper cutout 92b of the pixel electrode 191, and includes at least one oblique line, and each recess has a depression fan. There is at least one notch 7. The cutouts 71-72b are almost inverted symmetric with respect to the horizontal center line of the pixel electrode 191.

Each of the lower and upper cutouts 72a and 72b includes an oblique portion and a horizontal portion. The diagonal portion extends from the upper side or the lower side of the pixel electrode 191 to the left side, and overlaps the vertical side of the pixel electrode 191. The opposing long sides of the oblique portions substantially meet or extend with the first and second hypotenuse sides 911, 912, 921, and 922 of the protrusions of the pixel electrode 191 or the extension lines thereof. The horizontal portion extends along the horizontal side of the pixel electrode 191 from each end of the diagonal portion and overlaps with the horizontal side to form an obtuse angle with the diagonal portion.

The central cutout 71 includes a central cross section and a pair of diagonal lines. The central horizontal portion extends from the left side of the pixel electrode 191 to the right along the horizontal center line of the pixel electrode 191. The pair of oblique portions extends in parallel with the lower and upper cutouts 72a and 72b while forming an obtuse angle with the central horizontal portion from the end of the central horizontal portion toward the right side of the pixel electrode 191.

The number of the cutouts 71-72b may also vary according to design factors, and the light blocking member 220 may overlap the cutouts 71-72b to block light leakage near the cutouts 71-72b. An insulating material is formed on the common electrode 270, and a spacer 320 for maintaining a constant gap between the two display panels 100 and 200 is formed.

Alignment layers 11 and 21 are applied to the inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers. Polarizers 12 and 22 are provided on the outer surfaces of the display panels 100 and 200, and the polarization axes of the two polarizers 12 and 22 are orthogonal, and diagonal cutouts 92a and 92b and cutouts 71 are provided. It is desirable to make an angle of approximately 45 ° with the oblique portion of -72b). In the case of a reflective liquid crystal display, one of the two polarizers 12 and 22 may be omitted.

The liquid crystal display according to the present exemplary embodiment may further include a phase retardation film (not shown) for compensating for the delay of the liquid crystal layer 3. The liquid crystal display device may also include a polarizer 12, a retardation film, a display panel 100, and a backlight unit (not shown) that supplies light to the liquid crystal layer 3.

The liquid crystal layer 3 has a negative dielectric anisotropy and the liquid crystal molecules 31 of the liquid crystal layer 3 are oriented such that their long axes are substantially perpendicular to the surfaces of the two display panels 100 and 200 in the absence of an electric field have. Therefore, incident light does not pass through the quadrature polarizers 12 and 22 and is blocked.

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the pixel electrode 191, a primary electric field substantially perpendicular to the surfaces of the display panels 100 and 200 is generated. [Hereinafter, the pixel electrodes 191 and the common electrode 270 will be referred to as electric field generating electrodes.] The liquid crystal molecules 31 will change directions so that their major axes are perpendicular to the direction of the electric field in response to the electric field.

1 and 5, one set of cutouts 71-72b and 91-92b divides the pixel electrode 191 into a plurality of sub-areas, and each of the sub-regions includes a pixel electrode ( Two primary edges that form an oblique angle with the first peripheral sides 193 and 194 of 191 and a secondary side that is a part of the sides 193-196 of the pixel electrode 191. One of the periphery of each subregion is formed by combining one side of the cutouts 91-92b of the pixel electrode 191 and the second hypotenuse 912, 922 of the teeth 910, 920, or the oblique side 193c, 194c. The other one of the periphery is made of one side of the oblique portion of the cut-out portion 71-72b of the common electrode 270 alone or of the oblique portion and the teeth 910 and 920 of the cut-out portion 71-72b. The second hypotenuse 912 and 922 are combined. Therefore, the lengths of the periphery of each subarea are different, and the periphery of the adjacent subarea is shifted from each other. One side of each sub region is the first hypotenuse 911 and 921 of the teeth 910 and 920 of the pixel electrode 191, and meets the peripheral side at an angle greater than 135 °. The periphery is approximately 45 ° with the polarization axes of the polarizers 12 and 22, in order to maximize the light efficiency.

However, since the periphery is much longer than the periphery and at least one of the periphery meets the periphery at an angle greater than 135 °, the main electric field above these subareas has a horizontal component perpendicular to the periphery. Very large compared to Therefore, the liquid crystal molecules 31 on each subregion are inclined in a direction perpendicular to the surroundings.

Since most of the liquid crystal molecules 31 on each subregion are inclined in a direction perpendicular to the periphery thereof, the inclination direction is approximately four directions. The diagonal direction of the liquid crystal molecules 31 increases the reference viewing angle of the liquid crystal display device.

As shown in FIG. 6, the direction of secondary electric fields (lateral fields) E1 and E2 generated by the voltage difference between the pixel electrodes 191 is mainly one side of the subregion, that is, It is perpendicular to the first hypotenuse 911, 921 of the teeth 910, 920. Thus, the directions of the subfields E1 and E2 form an angle less than about 15 ° with the direction of the horizontal component of the main field. As a result, the negative electric field between the pixel electrodes 191 acts to strengthen the crystal in the oblique direction of the liquid crystal molecules 31.

Thus, the pixel electrode 191 is provided on the horizontal side of the pixel electrode 191 by providing the teeth 910 and 920 having the cutouts 911 and 921 having an angle greater than 135 ° with the cutouts 91-92b and 71-72b. The direction of the horizontal component of the main electric field and the direction of the negative electric field in the vicinity of the vertical sides 195 and 196 of the same as the direction of the horizontal component of the main electric field at the center of the subregion, and the distance between the adjacent pixel electrode 191 When the intensity of the negative electric field is increased by making it close, the inclination direction of the liquid crystal molecules positioned near the teeth 910 and 920 of the pixel electrode 191 almost coincides with the inclination direction of the liquid crystal molecules at the center of the negative region. The vicinity of 920 can also be utilized as an effective display area.

Therefore, the effective display area is wider and the transmittance is higher than when the teeth 910 and 920 are not provided, and the cutouts 71-72b of the common electrode 270 do not have a portion overlapping the vertical side of the pixel electrode 191. Since it is not necessary, an opening ratio becomes high.

On the other hand, the liquid crystal molecules positioned in the oblique cutouts of the cutouts of the pixel electrode 191 may not be able to determine the alignment direction quickly, but texture may occur, but the third and fourth sustain electrodes 133c and 133d extending in the oblique directions. Can act as a control electrode for controlling the liquid crystal in this portion, thereby reducing the texture occurring at the center of the diagonal cutouts 92a and 92b.

The width of the cutouts 71-72b and 91-92b is preferably about 9 μm to about 12 μm.

The notch 7 of the cutout 71-72b of the common electrode 270 determines the inclination direction of the liquid crystal molecules 31 positioned on the cutout 71-72b. The notch 7 may also be formed in the cutouts 91-92b of the pixel electrode 191.

The shape and arrangement of the cutouts 71-72b, 91-92b and the notch 7 can be variously modified.

At least one cutout 71-72b, 91-92b may be replaced by a protrusion (not shown) or depression (not shown). The protrusions may be made of organic or inorganic materials and may be disposed above or below the field generating electrodes 191 and 270.

FIG. 7 is a layout view of a liquid crystal display according to another exemplary embodiment. FIG. 8 is a layout view of a thin film transistor array panel for the liquid crystal display of FIG. 7, and FIG. 9 is a layout view of a common electrode display panel for the liquid crystal display of FIG. 7. FIG. 10 is a cross-sectional view of the liquid crystal display of FIG. 7 taken along the line XX. FIG.

7 to 10, a liquid crystal display according to an exemplary embodiment of the present invention includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other and between the two display panels 100 and 200. The liquid crystal layer 3 is included.

First, the thin film transistor array panel 100 will be described with reference to FIGS. 7, 8, and 10.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits the gate signal and extends mainly in the horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding upwards and a wide end portion 129 for connection with another layer or an external driving circuit. A gate driving circuit (not shown) that generates a gate signal is mounted on a flexible printed circuit film (not shown) attached over the substrate 110, directly mounted on the substrate 110, or integrated into the substrate 110. Can be. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend and be directly connected thereto.

The storage electrode line 131 receives a predetermined voltage and almost extends in parallel with the gate line 121. Each storage electrode line 131 is positioned between two adjacent gate lines 121 and is substantially equal to the two gate lines 121. The storage electrode line 131 includes a storage electrode 137 extending up and down. However, the shape and arrangement of the sustain electrode lines 131 can be variously modified.

The gate line 121 and the storage electrode line 131 may be formed of a metal such as aluminum (Al) or an aluminum alloy, a metal such as silver (Ag) or silver alloy, a copper metal such as copper or copper alloy, Such as molybdenum metal, chromium (Cr), tantalum (Ta), and titanium (Ti), such as molybdenum (Mo) or molybdenum alloy. However, they may have a multilayer structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having a low resistivity, for example, an aluminum-based metal, a silver-based metal, or a copper-based metal to reduce signal delay and voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with ITO and IZO, such as molybdenum-based metals, chromium, tantalum, titanium, and the like. A good example of such a combination is a chromium bottom film, an aluminum (alloy) top film, an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate line 121 and the sustain electrode line 131 may be made of various other metals or conductors.

Side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 to 80 °.

A gate insulating layer 140 made of silicon nitride (SiN _x ) or silicon oxide (SiOx) is formed on the gate line 121 and the storage electrode line 131.

A plurality of island-like semiconductors 154 made of hydrogenated amorphous silicon, polycrystalline silicon, or the like are formed on the gate insulating layer 140. The semiconductor 154 is positioned on the gate electrode 124 and includes an extension covering the boundary of the gate line 121. A plurality of island type ohmic contact members 163 and 165 are formed on the semiconductor 154. The ohmic contacts 163 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped or made of silicide. The ohmic contacts 163 and 165 are paired and disposed on the semiconductor 154.

Side surfaces of the semiconductor 154 and the ohmic contacts 163 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 to 80 °.

A plurality of data lines 171 and a plurality of drain electrodes 175 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140.

The data line 171 transmits a data voltage and mainly extends in the vertical direction to cross the gate line 121 and the storage electrode line 131. Each data line 171 includes a plurality of source electrodes 173 extending toward the gate electrode 124 and a wide end portion 179 for connection with another layer or an external driving circuit. A data driving circuit (not shown) for generating a data voltage is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or integrated in the substrate 110. Can be. When the data driving circuit is integrated on the substrate 110, the data line 171 can extend and be directly connected thereto.

The drain electrode 175 is separated from the data line 171 and faces the source electrode 173 with the gate electrode 124 as a center. Each drain electrode 175 has one wide end portion 177 and the other end having a rod shape. The rod-shaped end portion is partially surrounded by the source electrode 173 formed in a U shape.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the protrusion 154 of the semiconductor 151 form one thin film transistor, and the channel of the thin film transistor is a source electrode ( It is formed in the protrusion 154 between the 173 and the drain electrode 175.

The data line 171 and the drain electrode 175 are preferably made of a refractory metal such as molybdenum, chromium, tantalum and titanium, or an alloy thereof, and a refractory metal film (not shown) and a low resistance conductive film (not shown). It may have a multi-layer structure including). Examples of the multilayer structure include a double film of a chromium or molybdenum (alloy) lower film and an aluminum (alloy) upper film, a molybdenum (alloy) lower film, an aluminum (alloy) intermediate film and a molybdenum (alloy) upper film. However, in addition to the data line 171 and the drain electrode 175, it may be made of various metals or conductors.

It is preferable that the side surfaces of the data line 171 and the drain electrode 175 are inclined at an inclination angle of about 30 to 80 degrees with respect to the surface of the substrate 110.

The ohmic contacts 163 and 165 exist only between the semiconductor 151 below and the data line 171 and the drain electrode 175 thereon, thereby lowering the contact resistance.

The passivation layer 180 is formed on the data line 171, the drain electrode 175, and the exposed semiconductor 151. The protective film 180 is made of an inorganic insulating material or an organic insulating material and may have a flat surface. Examples of the inorganic insulating material include silicon nitride and silicon oxide. The organic insulator may have photosensitivity and its dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 154 while maintaining excellent insulating properties of the organic layer.

In the passivation layer 180, a plurality of contact holes 182 and 185 exposing the end portion 179 and the drain electrode 175 of the data line 171 are formed, respectively, and in the passivation layer 180 and the gate insulating layer 140. A plurality of contact holes 181 exposing the end portion 129 of the gate line 121 is formed.

A plurality of pixel electrodes 191 and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. These may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum or silver alloy.

The pixel electrode 191 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage from the drain electrode 175. The pixel electrode 191 overlaps the storage electrode line 131 including the storage electrode 137.

Each pixel electrode 191 is connected to a pair of first peripheral sides 193 and 194 facing each other and the first peripheral sides 193 and 194 and between the plurality of teeth 90 and the teeth 90. It has a second peripheral side including the bottom side (90c) connecting the. Here, the tooth 90 connects the first hypotenuse 90a and the second hypotenuse 90d and the first hypotenuse 90a and the second hypotenuse 90d that are inclined with respect to the first peripheral sides 193 and 194. It has an upper side 90b. The first peripheral sides 193 and 194 are parallel to the gate line 121. The first peripheries 193 and 194 and the second periphery form a substantially rectangular shape, and four corners of the pixel electrode 191 are chamfered to form an angle of about 45 ° with respect to the gate line 121.

The first hypotenuse 90a partially overlaps the data line 171, and the first hypotenuse 90a of the two neighboring pixel electrodes 191 faces each other and is parallel to each other.

The pixel electrode 191 includes first and second center cutouts 91 and 92, lower diagonal cutouts 93a, 94a and 95a, and upper diagonal cutouts 93b, 94b and 95b. 191 is divided into a plurality of subregions by these cutouts 91 to 95b. The cutouts 91 to 95b have almost inverted symmetry with respect to the sustain electrode line 131. The lower and upper diagonal cutouts 93a to 95a and 93b to 95b extend obliquely from the right side of the pixel electrode 191 to the left side, the upper side, or the lower side. The lower and upper diagonal cutouts 93a to 95a and 93b to 95b are located at the lower half and the upper half with respect to the sustain electrode line 131, respectively. The lower and upper diagonal cutouts 93a to 95a and 93b to 95b extend perpendicular to each other at an angle of about 45 ° with respect to the gate line 121. The lower and upper diagonal cutouts 93a to 95a and 93b to 95b have an inlet at a left side or a right side of the pixel electrode 191, and the inlet may be connected to the recess 90c.

The first hypotenuse 90a constituting the tooth 90 around the second periphery forms an obtuse angle with the oblique cut portions 93a to 95a and 93b to 95b of the pixel electrode 191, and the second hypotenuse 90d is an oblique cut portion ( 93a-95a, 93b-95b).

The first central cutout 91 extends along the storage electrode line 131 and has an inlet at the left side. In addition, the second center cutout 92 has a polygon, and upper and lower corners protruding from the left side of the pixel electrode 191 protrude.

Therefore, the lower half of the pixel electrode 191 is divided into four regions by the lower cutouts 93a to 95a, and the upper half is also divided into four regions by the upper cutouts 92b to 95b. In this case, the number of regions or the number of cutouts may vary depending on the size of the pixel, the ratio of the length of the horizontal side to the vertical side of the pixel electrode, and the type or characteristics of the liquid crystal layer 3.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 compensate for and protect the adhesion between the end portions 179 and 129 of the data line 171 and the gate line 121 and the external device.

Next, the common electrode display panel 200 will be described with reference to FIGS. 7, 9, and 10.

The light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 includes a linear portion 221 corresponding to the data line 171, an extended portion 222 extending in a portion, and a planar portion 223 corresponding to the thin film transistor, and between the pixel electrodes 191. An opening region is formed to block light leakage of the light and face the pixel electrode 191. However, the light blocking member 220 may have a plurality of openings (not shown) facing the pixel electrode 191 and having substantially the same shape as the pixel electrode 191.

A plurality of color filters 230 are further formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The overcoat 250 may be made of an (organic) insulator and prevents the color filter 230 from being exposed and provides a flat surface. The overcoat 250 may be omitted.

A common electrode 270 is formed on the lid 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO.

The plurality of cutouts 71, 72a, 72b, 73a, 73b, 74a, 74b, and 75 are formed in the common electrode 270.

One set of cutouts 71 to 75 faces the pixel electrode 191 and faces the center cutout 71, the first to third lower diagonal cutouts 72a, 72b, and 72c, and the first to third cutouts. Upper oblique cutouts 72b, 73b, 74b and a connection 75. Each of the cutouts 71 to 74b is disposed between the adjacent cutouts 91, 92, 93a, 93b, 94a, 94b, 95a and 95b of the pixel electrode 191 or the cutouts 91, 92, 93a, 93b, 94a, 94b, 95a, 95b and the chamfered hypotenuse of the pixel electrode 191. In addition, each cutout 71 to 74b includes at least one diagonal line extending in parallel with the lower cutouts 93a, 94a and 95a or the upper cutouts 93b, 94b and 95b of the pixel electrode 191.

The first lower and first upper diagonal cutouts 72a and 72b extend from the right side of the pixel electrode 191 to the left side of the pixel electrode 191, and the second lower and second upper diagonal cutouts 73a. , 73b extends from the right side of the pixel electrode 191 to the upper left or lower corner of the pixel electrode 191. The third lower and third upper oblique cutouts 74a and 74b extend from the right side of the pixel electrode 191 to the upper or lower side of the pixel electrode 191, and the third lower and third upper oblique cutouts. It includes a terminal horizontal portion extending while overlapping along the sides of the pixel electrode 191 from each end of (74a, 74b). The longitudinal cross section forms an obtuse angle with the diagonal cutouts 74a and 74b.

The central cutout 71 includes a central horizontal portion and a pair of diagonal lines. The central horizontal portion extends from the right side of the pixel electrode 191 to the left along the storage electrode line 131, and the pair of diagonal portions respectively form the lower and upper diagonal lines toward the left side of the pixel electrode 191 at the end of the central horizontal portion. It extends almost parallel with the incisions 72a-74b.

One end of the oblique portion of the center cutout 71 and one end of the second lower cutout 73a of the neighboring pixel electrode, the other end of the oblique portion of the central cutout 71 and the second upper cutout of the neighboring pixel electrode. One end of 73b, one end of the first lower oblique cutout 72a, one end of the third lower oblique cutout 74a of the neighboring pixel electrode, and one end of the first upper oblique cutout 72b; One end of the third upper oblique cut portion 74b of the neighboring pixel electrode is connected to the connection portion 75, respectively. The connection part 75 is positioned at a portion parallel to the first hypotenuse 90a of the pixel electrode 191 and corresponding to the data line 171. The width of the connection part 75 is about 8 μm wider than the distance between the pixel electrode 191 and the pixel electrode 191, and the extension part 222 of the light blocking member 220 corresponds to the connection part 75. It can be wider than that.

As described above, when the side adjacent to the data line 171 of the side of the pixel electrode 191 is serrated, it is formed between neighboring pixel electrodes 191 as described in the embodiments of FIGS. 1 to 4. The negative electric field becomes a direction for enhancing the orientation of the liquid crystal in the negative region. In addition, by arranging the connection portion 75 at a position corresponding to the region where the first hypotenuse 90a of the two neighboring pixel electrodes 191 faces, the alignment of the liquid crystal in the subregion may be further enhanced.

This effect will be described with reference to FIGS. 11 and 12.

FIG. 11 is a cross-sectional view taken along line XI-XI of FIG. 6, and FIG. 12 is a cross-sectional view taken along line XII-XII of FIG. 7.

Referring to FIG. 11, an electric field formed between the pixel electrode 191 and the common electrode 270 has a negative electric field in a direction that prevents uniform alignment of the liquid crystal in the subregion at the boundary of the neighboring pixel electrode 191. . Therefore, a collision of the liquid crystal may occur inside the subregion, and thus the liquid crystal alignment may be disturbed.

However, as in the exemplary embodiment of the present invention, when the connecting portion 75 is formed at a position corresponding to an area where the first hypotenuse 90a of the two pixel electrodes 191 face each other, as shown in FIG. 12, the common electrode ( Due to the connection portion 75 of the 270, the direction of the electric field formed between the common electrode 270 and the pixel electrode 191 is changed to form a negative electric field in a direction that reinforces uniform alignment of the liquid crystal in the subregion. Therefore, liquid crystal collision does not occur as shown in FIG. 11, resulting in a decrease in texture.

Each cutout 71-74b may have a plurality of concave notches 7 regularly arranged at regular distances.

The number and direction of the cutouts 71 to 75 may also vary depending on design factors.

Alignment layers 11 and 21 are coated on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers. Polarizers (not shown) are provided on the outer surfaces of the display panels 100 and 200, and the transmission axes of the two polarizers are orthogonal to each other, and one of the transmission axes is parallel to the gate line 121. In the case of a reflective liquid crystal display, one of two polarizers may be omitted.

The liquid crystal display may include a polarizer, display panels 100 and 200, and an illumination unit (not shown) that supplies light to the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels 100 and 200 in the absence of an electric field. Therefore, incident light does not pass through the orthogonal polarizer and is blocked.

The above embodiments can be equally used in the following embodiments.

Next, a liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 13 and 14.

FIG. 13 is a layout view of a liquid crystal display according to another exemplary embodiment. FIG. 14 is a cross-sectional view of the liquid crystal display of FIG. 13 taken along the line XIV-XIV.

As shown in FIG. 13 and FIG. 14, the liquid crystal display according to the exemplary embodiment of the present invention also includes the thin film transistor array panel 100 and the common electrode panel 200 facing each other, and the display panels 100 and 200. A liquid crystal layer 3 and a pair of polarizers 12 and 22 attached to the outer surfaces of the display panels 100 and 200.

The layered structure of the display panels 100 and 200 according to the present embodiment is generally the same as that shown in FIGS. 1 to 4.

In the thin film transistor array panel 100, a plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on the substrate 110. The gate line 121 includes a plurality of gate electrodes 124 and end portions 129, and the storage electrode line 131 includes a plurality of storage electrodes 133a-133d and a plurality of connection portions 133e. On the gate line 121 and the storage electrode line 131, the gate insulating layer 140, the plurality of linear semiconductors 151 including the protrusions 154, the plurality of linear ohmic contacts 161 including the protrusions 163, and A plurality of island type ohmic contact members 165 are formed in sequence.

A plurality of data lines 171 including a source electrode 173 and an end portion 179, a plurality of drain electrodes 175, and a plurality of isolated metal pieces 178 are formed on the ohmic contacts 161 and 165. The passivation layer 180 is formed thereon. A plurality of contact holes 181, 182, 183a, 183b, and 185 are formed in the passivation layer 180 and the gate insulating layer 140. A plurality of pixel electrodes 191, a plurality of connection legs 83, and a plurality of contact auxiliary members 81 and 82 having cutouts 91-92b are formed on the passivation layer 180, and the alignment layer 11 is disposed thereon. ) Is formed.

Referring to the common electrode display panel 200, the light blocking member 220, the plurality of color filters 230, the overcoat 250, and the common electrode 270 having the cutouts 71-72b and the alignment layer 21 are described. It is formed on this insulating substrate 210.

However, unlike the liquid crystal display shown in FIGS. 1 to 4, the linear semiconductor 151 has a planar shape substantially the same as that of the data line 171, the drain electrode 175, and the ohmic contacts 161 and 165 thereunder. to be. However, the linear semiconductor 151 has an exposed portion between the source electrode 173 and the drain electrode 175, and not covered by the data line 171 and the drain electrode 175.

In addition, a resistive contact member (not shown) and an island-like semiconductor (not shown) having substantially the same planar shape as the isolated metal piece 178 are formed below the isolated metal piece 178.

The thin film transistor array panel 100 is manufactured by forming the data line 171, the drain electrode 175, the metal piece 178, the semiconductor 151, and the ohmic contact members 161 and 165 in one photolithography process.

That is, a semiconductor layer, an ohmic contact layer, and a data metal layer are successively deposited on the gate insulating layer 140, and a photoresist film having a different thickness is formed on the gate insulating layer 140, and then the semiconductor layer, the ohmic contact layer, and the data metal layer are formed as an etching mask. By etching, the thin film transistor array panel illustrated in FIGS. 13 and 14 is manufactured. Here, the photosensitive film having different thicknesses according to the position includes the first portion and the second portion in the order of decreasing thickness, and the first portion includes a wiring area occupied by the data line 171, the drain electrode 171, and the metal piece 178. The second portion is located in the channel region of the thin film transistor.

There may be various methods of varying the thickness of the photoresist film according to the position. For example, a method of providing a translucent area in addition to a light transmitting area and a light blocking area in a photomask is possible. have. The semitransparent region is provided with a slit pattern, a lattice pattern, or a thin film having a medium transmittance or an intermediate thickness. When using the slit pattern, it is preferable that the width of the slits and the interval between the slits are smaller than the resolution of the exposure machine used for the photographic process. Another example is to use a photoresist film that can be reflowed. That is, a thin portion is formed by forming a photoresist film that can be reflowed with a conventional exposure mask having only a light transmitting region and a light shielding region and then reflowing so that the photoresist film flows into an area where no photoresist remains.

Using the photoresist as an etching mask, the data metal layer, the ohmic contact layer, and the semiconductor layer are continuously etched to form an approximate shape of the data line. Next, the photosensitive film is ashed to remove the second portion, and the exposed data metal layer and the ohmic contact layer are etched using the remaining first portion as an etch mask to form a channel portion of the thin film transistor.

In this way, a one-time photographic process can be reduced, thereby simplifying the manufacturing method.

Many features of the liquid crystal display shown in FIGS. 1 to 12 may also be applied to the liquid crystal display shown in FIGS. 13 and 14.

Next, a liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIG. 15.

15 is a cross-sectional view taken along line IV-IV of FIG. 1 with a liquid crystal display according to another exemplary embodiment of the present invention.

As shown in FIG. 15, the liquid crystal display according to the exemplary embodiment of the present invention also includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other, and a liquid crystal layer interposed between the display panels 100 and 200. (3) and a pair of polarizers 12 and 22 attached to the outer surfaces of the display panels 100 and 200.

The layered structure of the display panels 100 and 200 according to the present embodiment is generally the same as that shown in FIGS. 1 to 4.

In the thin film transistor array panel 100, a plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on the substrate 110. The gate line 121 includes a plurality of gate electrodes 124 and end portions 129, and the storage electrode line 131 includes a plurality of storage electrodes 133a-133d and a plurality of connection portions 133e. On the gate line 121 and the storage electrode line 131, the gate insulating layer 140, the plurality of linear semiconductors 151 including the protrusions 154, the plurality of linear ohmic contacts 161 including the protrusions 163, and A plurality of island type ohmic contact members 165 are formed in sequence. On the ohmic contacts 161 and 165 and the gate insulating layer 140, a plurality of data lines 171 including a source electrode 173 and an end portion 179, a plurality of drain electrodes 175, and a plurality of isolated metal pieces ( 178 is formed and a passivation layer 180 is formed thereon. A plurality of contact holes 181, 182, 183a, 183b, and 185 are formed in the passivation layer 180 and the gate insulating layer 140. A plurality of pixel electrodes 191, a plurality of connection legs 83, and a plurality of contact auxiliary members 81 and 82 having cutouts 91-92b are formed on the passivation layer 180, and the alignment layer 11 is disposed thereon. ) Is formed.

Referring to the common electrode display panel 200, the light blocking member 220, the overcoat 250, the common electrode 270 having the cutouts 71-72b, and the alignment layer 21 are formed on the insulating substrate 210. It is.

However, unlike the liquid crystal display illustrated in FIGS. 1 to 4, there is no color filter in the common electrode display panel 200, and instead, a plurality of color filters 230 are disposed below the passivation layer 180 of the thin film transistor array panel 100. Formed.

The color filter 230 extends vertically in the form of a band along the column of the pixel electrodes 191, and the boundary between two adjacent color filters 230 coincides on the data line 171. However, the color filters 230 may be separated from each other, or may overlap each other to serve as a light blocking member that prevents light leakage between the pixel electrodes 191. When the color filters 230 overlap each other, the light blocking member 220 may be omitted on the common electrode display panel 200.

The color filter 230 has a through hole 235 through which the contact hole 185 passes, and the through hole 235 is larger than the contact hole 185. The color filter 230 does not exist in the peripheral area where the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 are located.

The liquid crystal display illustrated in FIG. 15 may share many features with the liquid crystal display illustrated in FIGS. 1 to 14.

Meanwhile, the features of the exemplary embodiment of the present invention may also be applied to a liquid crystal display having a structure in which two pixel electrodes are applied to different voltages.

FIG. 16 is a layout view of a liquid crystal display according to another exemplary embodiment. FIG. 17 is a layout view of a thin film transistor array panel for a thin film transistor array panel of FIG. 16. FIG. 18 is a common view of the liquid crystal display of FIG. 16. 19 and 20 are cross-sectional views illustrating the liquid crystal display of 16 cut along the XIX-XIX line and the XX-XX line, respectively.

The liquid crystal display according to the present exemplary embodiment includes a thin film transistor array panel 100, a common electrode display panel 200, and a liquid crystal layer 3 interposed between the two display panels 100 and 200.

First, the thin film transistor array panel 100 will be described in detail with reference to FIGS. 16, 17, 19, and 20.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits the gate signal and extends mainly in the horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding upward and downward and a wide end portion 129 for connection with another layer or an external driving circuit. A gate driving circuit (not shown) that generates a gate signal is mounted on a flexible printed circuit film (not shown) attached over the substrate 110, directly mounted on the substrate 110, or integrated into the substrate 110. Can be. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend and be directly connected thereto.

The storage electrode line 131 receives a predetermined voltage and has a stem line extending substantially in parallel with the gate line 121 and a plurality of first, second, third and fourth storage electrodes 133a, 133b, 133c, 133d) an assembly and a plurality of connecting portions 133e. Each of the storage electrode lines 131 is positioned between two adjacent gate lines 121, and the stem line is closer to the upper side of the two gate lines 121.

The first and second storage electrodes 133a and 133b extend in the vertical direction and face each other. The first storage electrode 133a has a fixed end connected to the stem line and a free end opposite thereto, and the free end includes a protrusion. The third and fourth storage electrodes 133c and 133d extend obliquely from the center of the first storage electrode 133a to the lower end and the upper end of the second storage electrode 133b. The connecting portion 133e is connected between adjacent sets of sustain electrodes 133a to 133d. However, the shape and arrangement of the sustain electrode lines 131 can be variously modified.

The gate line 121 and the storage electrode line 131 may be formed of a metal such as aluminum (Al) or an aluminum alloy, a metal such as silver (Ag) or silver alloy, a copper metal such as copper or copper alloy, Such as molybdenum metal, chromium (Cr), tantalum (Ta), and titanium (Ti), such as molybdenum (Mo) or molybdenum alloy. However, they may have a multi-film structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having a low resistivity, for example, an aluminum-based metal, a silver-based metal, or a copper-based metal to reduce signal delay and voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with ITO and IZO, such as molybdenum-based metals, chromium, tantalum, titanium, and the like. A good example of such a combination is a chromium bottom film, an aluminum (alloy) top film, an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate line 121 and the sustain electrode line 131 may be made of various other metals or conductors.

Side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30-80 °.

A gate insulating film 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate line 121 and the storage electrode line 131.

A plurality of linear semiconductors 151 made of hydrogenated amorphous silicon, polycrystalline silicon, or the like are formed on the gate insulating layer 140. The linear semiconductor 151 mainly extends in the vertical direction and includes a plurality of protrusions 154 extending toward the gate electrode 124. The width of the linear semiconductor 151 in the vicinity of the gate line 121 and the storage electrode line 131 is widened to cover them extensively.

A plurality of linear and island resistive contact members 161 and 165 are formed on the semiconductor 151. The ohmic contacts 161 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped or made of silicide. The linear ohmic contact 161 has a plurality of protrusions 163, and the protrusion 163 and the island-type ohmic contact 165 are paired and disposed on the protrusion 154 of the semiconductor 151.

Side surfaces of the semiconductor 151 and the ohmic contacts 161 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 ° to 80 °.

A plurality of data lines 171, a plurality of drain electrodes 175, and a plurality of isolated metal pieces 178 are formed on the ohmic contacts 161 and 165 and the gate insulating layer 140.

The data line 171 transmits a data voltage and mainly extends in a vertical direction to intersect the gate line 121, the stem line of the storage electrode line 131, and the connection portion 133e. Each data line 171 includes a plurality of source electrodes 173 extending toward the gate electrode 124 and bent in a C-shape and a wide end portion 179 for connection with another layer or an external driving circuit. A data driving circuit (not shown) for generating a data voltage is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or mounted on the substrate 110. Can be integrated. When the data driving circuit is integrated on the substrate 110, the data line 171 can extend and be directly connected thereto.

The drain electrode 175 is separated from the data line 171 and includes a rod portion facing the source electrode 173 and a capacitive coupling electrode 176 extending from the rod portion with respect to the gate electrode 124. . The bar portion of each drain electrode 175 is partially surrounded by the source electrode 173, and the capacitive coupling electrode 176 is connected to each other and two diagonal lines parallel to the third and fourth sustain electrodes 133c and 133d, respectively. It has the parts 176a and 176b.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the protrusion 154 of the semiconductor form one thin film transistor, and the channel of the thin film transistor is connected to the source electrode 173. The protrusion 154 is formed between the drain electrodes 175.

The metal piece 178 is positioned on the gate line 121 near the first storage electrode 133a.

The data line 171, the drain electrode 175, and the metal piece 178 are preferably made of a refractory metal such as molybdenum, chromium, tantalum, titanium, or an alloy thereof, and include a refractory metal film (not shown) and a low resistance conductive material. It may have a multilayer structure including a film (not shown). Examples of the multilayer structure include a double film of a chromium or molybdenum (alloy) lower film and an aluminum (alloy) upper film, a molybdenum (alloy) lower film, an aluminum (alloy) intermediate film and a molybdenum (alloy) upper film. However, the data line 171, the drain electrode 175, and the metal piece 178 may be made of various other metals or conductors.

The side of the data line 171, the drain electrode 175, and the metal piece 178 may be inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The resistive contact members 161 and 165 are present only between the semiconductor 151 under the resistive contact members 161 and 165 and the data line 171 and the drain electrode 175 thereon and lower the contact resistance therebetween. Although the linear semiconductor 151 is narrower than the data line 171 in most places, as described above, the width of the linear semiconductor 151 is widened at the portion where it meets the gate line 121 to smooth the profile of the surface, thereby disconnecting the data line 171. prevent. The semiconductor 151 has an exposed portion between the source electrode 173 and the drain electrode 175, and not covered by the data line 171 and the drain electrode 175.

The passivation layer 180 is formed on the data line 171, the drain electrode 175, the metal piece 178, and the exposed semiconductor 151. The protective film 180 is made of an inorganic insulating material or an organic insulating material and may have a flat surface. Examples of the inorganic insulating material include silicon nitride and silicon oxide. The organic insulator may have photosensitivity and its dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 151 while maintaining excellent insulating properties of the organic layer.

In the passivation layer 180, a plurality of contact holes 182 and 185 exposing the end portion 179 and the drain electrode 175 of the data line 171 are formed, respectively, and in the passivation layer 180 and the gate insulating layer 140. A plurality of contact holes 181 exposing the end portion 129 of the gate line 121, a plurality of contact holes 183a exposing a protrusion of the free end of the first sustain electrode 133a, and a first sustain electrode 133a. A plurality of contact holes 183b exposing a part of the sustain electrode line 131 near the fixed end are formed. The contact holes 181, 182, 183a, 183b, and 185 may be made in various shapes such as polygons or circles. Sidewalls of the contact holes 181, 182, 183a, 183b, 185 may be inclined or stepped at an angle of 30 ° to 85 °.

A plurality of pixel electrodes 191 including the first and second subpixel electrodes 191a and 191b, a plurality of connection legs 83, and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer 180. have. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

The first subpixel electrode 191a is physically and electrically connected to the drain electrode 175 through the contact hole 185 to receive a data voltage from the drain electrode 175.

The first subpixel electrode 191a and the second subpixel electrode 191b are separated from each other with a gap 92 interposed therebetween, and the gap 92 diagonally extends obliquely from the left side to the right side. It has a vertical part connecting the part. The oblique portion forms an angle of about 45 ° with respect to the gate line 121.

Among the subpixel electrodes 191a and 191b divided by the gap 92, the first subpixel electrode 191a is positioned above and below the second subpixel electrode 191b, and the second subpixel electrode 191b is disposed. The second subpixel electrode 191b is sandwiched between two portions of the first subpixel electrode 191a. The first subpixel electrode 191a and the second subpixel electrode 191b face each other and have sides that are inclined by 45 ° with respect to the gate line 121, thereby inverting symmetry with respect to an imaginary horizontal centerline of the pixel electrode 191. It has a structure.

The second subpixel electrode 191b has a central cutout 91, and the central cutout 91 extends along a horizontal center line and has an inlet at the right side thereof. The inlet of the central incision 91 has a pair of hypotenuses parallel to the gap 92.

Here, each of the first sub pixel electrodes 191a is connected to the drain electrode 175 through the contact hole 185 to receive a data voltage directly therefrom, whereas the second sub pixel electrode 191b is the first pixel electrode. The capacitor overlaps the capacitive coupling electrode 176 connected to 191a. Therefore, the second pixel electrode 191b is electromagnetically coupled (capacitive) to the first pixel electrode 191a.

The pixel electrode 191 is divided into four regions by the gap 92 and the central cutout 91.

5 and 16, each pixel electrode 191 has a pair of first peripheral sides 193 and 194 facing each other and a pair of second peripheral sides 195 and 196 connected thereto. . The first peripheral sides 193 and 194 have substantially parallel to the gate line 121, and the second peripheral sides 195 and 196 have inner and outer envelopes substantially parallel to the data line 171, and the first primary The inner or outer envelope of sides 193 and 194 and the second perimeter 195 and 196 are approximately rectangular. The left corner of the pixel electrode 191 is chamfered to form hypotenuses 193c and 194c, and the other hypotenuses 193c and 194c form an angle of about 45 ° with respect to the gate line 121.

The second peripheral portions 195 and 196 of the pixel electrode 191 may include a plurality of vertical segments 915 and 925 positioned on the inner envelopes 951 and 961 and a plurality of teeth 910 and 920 protruding outwardly therefrom. ) And is substantially symmetrical with respect to the horizontal center line of the pixel electrode 191.

Each tooth 910, 920 has a first hypotenuse 911, 921 and a second hypotenuse 912, 922 facing each other, and an upper side 913, which connects them and is located on the outer envelope 952, 962. 923). The first hypotenuse 911, 921 meets an obtuse angle greater than about 135 ° with the longitudinal segments 915, 925, and the second hypotenuse 912, 922 has an angle of about 45 ° with the longitudinal segments 915, 925. The extension lines of the first hypotenuse 911 and 921 and the second hypotenuse 912 and 922 meet with each other at an acute angle smaller than about 45 °. Further, the second hypotenuse 912, 922 is substantially parallel to the gap 92 and on the extension of the gap 92, and the first hypotenuse 911, 921 is less than about 45 ° with the gap 92. Or at an angle greater than 135 °.

The upper portion of the teeth 910 and 920, that is, the vicinity of the upper sides 913 and 923 overlaps the data line 171, and the right side 196 of the pixel electrode 191 positioned on the left side of the data line 171 is positioned. The teeth 920 and the teeth 910 of the pixel electrode 191 positioned on the right side are arranged to be engaged. In addition, opposite sides of the teeth 910 and 920 meshing with each other are parallel to each other.

The number of teeth 910, 920 is closely related to the number of cutouts and the number of cutouts or areas of the pixel electrode 191 divided by the gaps 91, 92, and the number of teeth and the sawtooth ( The number of 910 and 920 may vary depending on design elements such as the size of the pixel electrode 191, the length ratio of the horizontal side and the vertical side of the pixel electrode 191, and the type or characteristics of the liquid crystal layer 3.

The pixel electrode 191 may also overlap the neighboring gate line 121 or the data line 171 to increase the aperture ratio.

The connecting leg 83 crosses the gate line 121, and exposes the first portion and the first holding portion of the storage electrode line 131 through contact holes 183a and 183b positioned on opposite sides with the gate line 121 interposed therebetween. The electrode 133a is connected to the exposed end of the free end. The storage electrode lines 131 including the storage electrodes 133a and 133b may be used together with the connecting legs 83 to repair defects in the gate line 121, the data line 171, or the thin film transistor.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact assistants 81 and 82 complement and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

Next, the common electrode display panel 200 will be described with reference to FIGS. 16, 18, 19, and 20.

The light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 has a plurality of openings 225 facing the pixel electrode 191 and having a substantially rectangular shape. In the light blocking member 220, the width of the portion 221 corresponding to the data line 171 is substantially the same as the width of the data line 171 (however, alignment errors of the display panels 100 and 200 may be considered). The light blocking member 220 includes an extension 222 that covers a space between the interlocking teeth 910 and 920 that protrude out of the data line 171. The light blocking member 220 may further include a portion corresponding to the thin film transistor.

A plurality of color filters 230 are further formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The cover film 250 can be made of (organic) insulation and prevents the color filter 230 from being exposed and provides a flat surface. The overcoat 250 may be omitted.

A common electrode 270 is formed on the lid 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO, and the plurality of cutouts 71, 72a, and 72b are formed in the common electrode 270.

The common electrode 270 has a plurality of sets of cutouts 71, 72a, and 72b.

One set of cutouts 71-72b faces one pixel electrode 191 and includes a central cutout 71, a lower cutout 72a, and an upper cutout 72b. Each of the cutouts 71-72b is disposed between adjacent cutouts 91-92b of the pixel electrode 191 or between cutouts 92a and 92b and the hypotenuse of the pixel electrode 191. In addition, each cutout 71-72b extends substantially in parallel with the lower cutout 92a or the upper cutout 92b of the pixel electrode 191 and includes at least one diagonal line. The cutouts 71-72b are almost inverted symmetric with respect to the horizontal center line of the pixel electrode 191.

Each of the lower and upper cutouts 72a and 72b includes an oblique portion and a horizontal portion. The diagonal portion extends from the upper side or the lower side of the pixel electrode 191 to the left side and overlaps the vertical side of the pixel electrode 191. The opposing long sides of the oblique portions substantially meet or extend with the first and second hypotenuses 911, 912, 921, and 922 of the teeth of the pixel electrode 191 or an extension thereof. The horizontal portion extends along the horizontal side of the pixel electrode 191 from each end of the diagonal portion and overlaps with the horizontal side to form an obtuse angle with the diagonal portion.

The central cutout 71 includes a central cross section and a pair of diagonal lines. The central horizontal portion extends from the left side of the pixel electrode 191 to the right along the horizontal center line of the pixel electrode 191. The pair of oblique portions extends in parallel with the lower and upper cutouts 72a and 72b while forming an obtuse angle with the central horizontal portion from the end of the central horizontal portion toward the right side of the pixel electrode 191.

The number of the cutouts 71-72b may also vary according to design factors, and the light blocking member 220 may overlap the cutouts 71-72b to block light leakage near the cutouts 71-72b.

An insulating material is formed on the common electrode 270, and a spacer (not shown) is formed to maintain a constant gap between the two display panels 100 and 200.

The light blocking member 220 may overlap the cutouts 71, 72a and 72b to block light leakage near the cutouts 71, 72a and 72b. In this embodiment, the oblique portions 17a and 176b of the capacitive coupling electrode 176 overlap the cut portions 71, 72a and 72b to block light leakage near the cut portions 71, 72a and 72b.

In this case, the inclination angles of the teeth 910 and 920 of the pixel electrode 191 may be 1 ° to 15 ° greater than the inclination angle of the oblique portion of the central cutout 71 of the common electrode 270. Vertical alignment layers 11 and 21 are coated on the inner surfaces of the display panels 100 and 200, respectively, and polarizers 12 and 22 are provided on the outer surfaces thereof.

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the pixel electrode 191, an electric field almost perpendicular to the surface of the display panel is generated. The liquid crystal molecules 310 attempt to change the direction of the long axis perpendicular to the direction of the electric field in response to the electric field. Meanwhile, hypotenuses of the cutouts 71, 72a, 72b, 91, 92a, and 92b of the common electrode 270 and the pixel electrode 191 and the pixel electrode 191a distort the electric field to determine the inclination direction of the liquid crystal molecules. Create a horizontal component. The horizontal component of the electric field is perpendicular to the sides of the cutouts 71, 72a, 72b, 91, 92a, 92b and the hypotenuse of the pixel electrode 191a. In addition, the horizontal components of the main electric field at two opposite sides of the cutouts 71, 72a, 72b, 91, 92a, and 92b are opposite to each other.

Through these electric fields, the cutouts 71, 72a, 72b, 91, 92a, and 92b control the direction in which the liquid crystal molecules of the liquid crystal layer 3 are inclined. Within each domain defined by adjacent incisions 71, 72a, 72b, 91, 92a, 92b or defined by right and left hypotenuses of the incisions 72a, 72b and subpixel electrodes 191a, 191b. The liquid crystal molecules are inclined in a direction perpendicular to the longitudinal direction of the cutouts 71, 72a, 72b, 91, 92a, and 92b. The two longest sides of each domain are substantially parallel to each other and form a 45 ° angle with the gate line 121. Most of the liquid crystal molecules in the domain are inclined in four directions, thereby extending the viewing angle.

In addition, when the side adjacent to the data line 171 of the side of the pixel electrodes 191a and 191b is formed in a sawtooth shape, as described in the embodiments of FIGS. 1 to 4, a sub-electric field formed between neighboring pixel electrodes is formed. Enhances the orientation of the liquid crystal in the minor region.

The width of the cutouts 71, 72a, 72b, 91, 92a, 92b is preferably about 9 μm to about 12 μm.

At least one cutout 71, 72a, 72b, 91, 92a, 92b may be replaced by a protrusion (not shown) or a depression (not shown). The protrusions may be made of organic or inorganic materials and may be disposed above or below the field generating electrodes 191a, 191b, and 270, and the width thereof is preferably about 5 μm to about 10 μm.

Meanwhile, when the inclination direction of the liquid crystal molecules 31 and the transmission axis of the polarizers 12 and 22 are 45, the highest luminance can be obtained. In the present embodiment, the inclination direction of the liquid crystal molecules 31 in all domains is the gate line ( The gate line 121 is perpendicular or horizontal to the edges of the display panels 100 and 200 at an angle of 45 ° with the 121. Therefore, in the present exemplary embodiment, when the transmission axes of the polarizers 12 and 22 are attached to be perpendicular or parallel to the edges of the display panels 100 and 200, the highest luminance can be obtained and the polarizers 12 and 22 can be manufactured at low cost. Can be.

In the liquid crystal display according to the exemplary embodiment of the present invention, as described above, the second subpixel electrode 191b is electromagnetically coupled (capacitively coupled) to the first subpixel electrode 191a. While the first pixel electrode 191a is directly connected to the thin film transistor Q through the drain electrode 175 and receives an image signal voltage transmitted through the data line 171 through the thin film transistor, the second portion The voltage of the pixel electrode 191b is changed by capacitive coupling with the first sub pixel electrode 191a. In this embodiment, the voltage of the second subpixel electrode 191b is always lower than the voltage of the first subpixel electrode 191a.

The structure having the above capacitive bond may have a structure as follows.

FIG. 21 is a layout view of a liquid crystal display according to another exemplary embodiment, FIG. 22 is an enlarged view of XXII of FIG. 21, FIG. 23 is a cross-sectional view taken along the line XXIII-XXIII of FIG. 21, and FIG. 24. 21 is a cross-sectional view taken along the line XXIV-XXIV of FIG. 21, and FIG. 25 is a schematic equivalent circuit diagram of one pixel of the liquid crystal display shown in FIG. 21.

21 to 24, a liquid crystal display according to an exemplary embodiment of the present invention includes a thin film transistor array panel 100, a common electrode display panel 200, and a liquid crystal layer interposed between the two display panels 100 and 200. It includes (3).

The thin film transistor array panel 100 will be described in detail.

A plurality of gate conductors including a plurality of gate lines 121, a plurality of storage electrode lines 131, and a plurality of capacitive electrodes 136 are formed on an insulating substrate 110 made of transparent glass or plastic. have.

The gate line 121 transmits the gate signal and extends mainly in the horizontal direction. Each gate line 121 includes an end portion 129 having a large area for connecting a plurality of gate electrodes 124 protruding upward and another layer or an external driving circuit. A gate driving circuit (not shown) for generating a gate signal is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or mounted on the substrate 110. Can be integrated. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend and be directly connected thereto.

The storage electrode line 131 receives a predetermined voltage and includes lower and upper stem lines 131a1 and 131a2 extending substantially in parallel with the gate line 121. Each storage electrode line 131 is positioned between two adjacent gate lines 121, and the lower stem line 131a1 is closer to the bottom of the two gate lines 121, and the upper stem line 131a2 is closer to the upper side. The lower and upper stem lines 131a1 and 131a2 include lower and upper sustain electrodes 137a1 and 137a2 extending up and down, respectively.

The capacitor electrode 136 has a rectangular shape that is long in the horizontal direction and is separated from the gate line 121 and the storage electrode line 131. The capacitor electrode 136 is positioned between the pair of lower and upper storage electrodes 137a1 and 137a2, and is substantially equal to the two storage electrodes 137a1 and 137a2, and is substantially the same distance from two adjacent gate lines 121. Leave. However, the shape and arrangement of the sustain electrode lines 131 can be variously modified.

The gate conductors 121, 131, and 136 may be formed of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, and molybdenum (Mo). ) And molybdenum-based metals such as molybdenum alloys, chromium (Cr), tantalum (Ta) and titanium (Ti). However, they may have a multi-film structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having low resistivity, such as aluminum-based metal, silver-based metal, or copper-based metal, so as to reduce signal delay or voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with ITO and IZO, such as molybdenum-based metals, chromium, tantalum, titanium, and the like. A good example of such a combination is a chromium bottom film, an aluminum (alloy) top film, an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate conductors 121, 131, and 136 may be made of various metals or conductors.

Side surfaces of the gate conductors 121, 131, and 136 are inclined with respect to the surface of the substrate 110, and an inclination angle thereof is preferably about 30 ° to about 80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate conductors 121, 131, and 136.

On the gate insulating layer 140, a plurality of island-like semiconductors 154 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si), polycrystalline silicon, or the like are formed. The semiconductor 154 is positioned on the gate electrode 124 and includes an extension part covering a boundary of the gate line 121. In addition, a separate island-type semiconductor covering the boundary of the storage electrode line 131 may be formed.

A plurality of island type ohmic contact members 163 and 165 are formed on the semiconductor 154. The ohmic contacts 163 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped or made of silicide. The ohmic contacts 163 and 165 are paired and disposed on the semiconductor 154.

Side surfaces of the semiconductor 154 and the ohmic contacts 163 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 ° to 80 °.

A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contacts 163 and 165 and the gate insulating layer 140.

The data line 171 transmits a data signal and extends mainly in the vertical direction and crosses the gate line 121 and the sustain electrode line 131. Each data line 171 includes a plurality of source electrodes 173 extending toward the gate electrode 124 and an end portion 179 having a large area for connection with another layer or an external driving circuit. A data driving circuit (not shown) for generating a data signal is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or integrated in the substrate 110. Can be. When the data driving circuit is integrated on the substrate 110, the data line 171 can extend and be directly connected thereto.

The drain electrode 175 is separated from the data line 171 and includes a rod-shaped end portion facing the source electrode 173 around the gate electrode 124. The rod-shaped end portion is partially surrounded by the source electrode 173 bent in a U shape.

Each drain electrode 175 also includes bottom, top and center extensions 177a1, 177a2, 176 and a pair of connections 178a1, 178a2 connecting them. The extensions 177a1, 177a2, 176 are long rectangular in the transverse direction, and the connections 178a1, 178a2 connect them with each other on both sides of the extensions 177a1, 177a2, 176 and are substantially parallel to the data line 171. .

The lower and upper extensions 177a1 and 177a2 overlap the lower and upper sustain electrodes 137a1 and 137a2, respectively.

The central extension 176 overlaps the capacitive electrode 136 and forwardly the central extension 176 is referred to as a "coupled electrode." A contact hole 176H is formed near the right end of the coupling electrode 176. The coupling electrode 176 is made almost the same as the shape of the capacitor electrode 136.

One gate electrode 124, one source electrode 173, and one drain electrode 175 form a thin film transistor together with the semiconductor 154, and the channels of the thin film transistor are the source electrode 173 and the drain electrode. It is formed in the semiconductor 154 between the (175).

The data conductors 171, 175, and 176 are preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and include a refractory metal film (not shown) and a low resistance conductive film (not shown). It may have a multilayer structure comprising a. Examples of the multilayer structure include a double film of a chromium or molybdenum (alloy) lower film and an aluminum (alloy) upper film, a molybdenum (alloy) lower film, an aluminum (alloy) intermediate film and a molybdenum (alloy) upper film. However, the data conductors 171 and 175 may be made of various other metals or conductors.

The data conductors 171, 175, and 176 also preferably have their side surfaces inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The ohmic contacts 163 and 165 exist only between the semiconductor 154 below and the entire data 171 and 175 thereon, thereby lowering the contact resistance therebetween. An extension of the semiconductor 154 positioned on the gate line 121 may soften the profile of the surface to prevent the data line 171 from being disconnected. The semiconductor 154 has a substantially planar shape with the data line 171, the drain electrode 175, and the ohmic contacts 161 and 165 thereunder. However, the semiconductor 154 may have portions exposed between the source electrodes 173 and the drain electrodes 175 and not covered by the data conductors 171 and 175.

The passivation layer 180 is formed on the data conductors 171 and 175 and the exposed portion of the semiconductor 154. The protective film 180 is made of an inorganic insulating material or an organic insulating material and may have a flat surface. Examples of the inorganic insulating material include silicon nitride and silicon oxide. The organic insulator may have photosensitivity and its dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 154 while maintaining excellent insulating properties of the organic layer.

The passivation layer 180 may include a plurality of contact holes 182 exposing the end portion 179 of the data line 171 and a plurality of contact holes exposing lower and upper extensions 177a1 and 177a2 of the drain electrode 175, respectively. 185a1 and 185a2 are formed. In the passivation layer 180 and the gate insulating layer 140, the capacitive electrode 136 passes through the plurality of contact holes 181 exposing the end portion 129 of the gate line 121 and the contact holes 176H of the coupling electrode 176. Are formed with a plurality of contact holes 186.

A plurality of pixel electrodes 191 and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

Each pixel electrode 191 is connected to a pair of first peripheral sides 193 and 194 facing each other and the first peripheral sides 193 and 194 and between the plurality of teeth 90 and the teeth 90. It has a second peripheral side including the bottom side (90c) connecting the. Here, the tooth 90 connects the first hypotenuse 90a and the second hypotenuse 90d and the first hypotenuse 90a and the second hypotenuse 90d that are inclined with respect to the first peripheral sides 193 and 194. It has an upper side 90b. The first peripheral sides 193 and 194 are parallel to the gate line 121. The first peripheries 193 and 194 and the second periphery form a substantially rectangular shape, and four corners of the pixel electrode 191 are chamfered to form an angle of about 45 ° with respect to the gate line 121. The first hypotenuse 90a partially overlaps the data line 171, and the first hypotenuse 90a of the two neighboring pixel electrodes 191 faces each other and is parallel to each other.

Each pixel electrode 191 includes lower, upper, and center subpixel electrodes 191a1, 191a2, and 191b that are divided with lower and upper gaps 93a and 93b interposed therebetween. The lower and upper gaps 93a and 93b extend obliquely from the left side of the pixel electrode 191 to the right side, whereby the central subpixel electrode 191b becomes an isosceles trapezoid which is rotated approximately by right angles and the lower and upper gaps. The subpixel electrodes 191a1 and 191a2 become rectangular trapezoids that are rotated by approximately right angles. The lower and upper gaps 93a and 93b form an angle of about 45 ° with respect to the gate line 121 and are perpendicular to each other.

The lower and upper subpixel electrodes 191a1 and 191a2 are connected to the lower and upper extensions 177a1 and 177a2 of the drain electrode 175 through contact holes 185a1 and 185a2, respectively.

The central subpixel electrode 191b is connected to the capacitive electrode 136 through the contact hole 186 and overlaps the coupling electrode 176. The central subpixel electrode 191b and the capacitor electrode 136 together with the coupling electrode 176 form a "coupled capacitor".

A central cutout 91 and first upper and lower diagonal cutouts 92a and 92b are formed in the central subpixel electrode 191b, and a second lower diagonal cutout 94a is provided in the lower subpixel electrode 191a1. Is formed, and a second upper oblique cut portion 94b is formed in the upper subpixel electrode 191a2. These cutouts 91, 92a, 92b, 94a, and 94b divide the subpixel electrodes 191b, 191a1, and 191a2 into a plurality of subregions. The pixel electrode 191 including the cutouts 91, 92a, 92b, 94a and 94b and the gaps 93a and 93b (the gap is also referred to as the cutout in the future) is almost inverted symmetric with respect to the capacitor electrode 136.

The lower and upper diagonal cutouts 92a-94b extend obliquely from the left corner, the lower side, or the upper side of the pixel electrode 191 to the right side. The lower and upper diagonal cutouts 92a-94b extend perpendicular to each other at an angle of about 45 ° with respect to the gate line 121. The lower and upper diagonal cutouts 92a, 92b, 94a, and 94b have an inlet at a left side or a right side of the pixel electrode 191, and the inlet may be connected to the recess 90c.

The first hypotenuse 90a constituting the tooth 90 around the second periphery forms an obtuse angle with the diagonal cutouts 92a to 94a of the pixel electrode 191, and the second hypotenuse 90d is the oblique cutout 92a to 94b. Almost parallel to)

The central cutout 91 extends along the storage electrode line 131 and has an inlet at the left side. The inlet of the central incision 91 has a pair of hypotenuses substantially parallel to the lower incisions 92a-94a and the upper incisions 92b-94b, respectively.

In this case, the number of cutouts or the number of regions may include the size of the pixel electrodes 191a1, 191a2, and 191b, the ratio of the lengths of the horizontal and vertical sides of the pixel electrodes 191a1, 191a2, and 191b, and the type and characteristics of the liquid crystal layer 3. Etc., depending on design factors.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact assistants 81 and 82 complement and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

The common electrode display panel 200 will be described.

The light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 includes a linear portion 221 corresponding to the data line 171, an extended portion 222 extending in a portion, and a planar portion 223 corresponding to the thin film transistor, and between the pixel electrodes 191. An opening region is formed to block light leakage of the light and face the pixel electrode 191. However, the light blocking member 220 may have a plurality of openings (not shown) facing the pixel electrode 191 and having substantially the same shape as the pixel electrode 191.

A plurality of color filters 230 are further formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The cover film 250 can be made of (organic) insulation and prevents the color filter 230 from being exposed and provides a flat surface. The overcoat 250 may be omitted.

A common electrode 270 is formed on the lid 250.

The plurality of cutouts 71, 72a, 72b, 73a, 73b, 74a, 74b, and 75 are formed in the common electrode 270.

One set of cutouts 71 to 75 faces the pixel electrode 191 and faces the center cutout 71, the first to third lower diagonal cutouts 72a, 72b, and 72c, and the first to third cutouts. Upper oblique cutouts 72b, 73b, 74b and a connection 75. Each of the cutouts 71 to 74b is disposed between the adjacent cutouts 91, 92, 93a, 93b, 94a, 94b, 95a and 95b of the pixel electrode 191 or the cutouts 91, 92, 93a, 93b, 94a, 94b, 95a, 95b and the chamfered hypotenuse of the pixel electrode 191. In addition, each cutout 71 to 74b includes at least one diagonal line extending in parallel with the lower cutouts 93a, 94a and 95a or the upper cutouts 93b, 94b and 95b of the pixel electrode 191.

The first lower and first upper diagonal cutouts 72a and 72b extend from the right side of the pixel electrode 191 to the left side of the pixel electrode 191, and the second lower and second upper diagonal cutouts 73a. , 73b extends from the right side of the pixel electrode 191 to the upper left or lower corner of the pixel electrode 191. The third lower and third upper oblique cutouts 74a and 74b extend from the right side of the pixel electrode 191 to the upper or lower side of the pixel electrode 191, and the third lower and third upper oblique cutouts. It includes a terminal horizontal portion extending while overlapping along the sides of the pixel electrode 191 from each end of (74a, 74b). The longitudinal cross section forms an obtuse angle with the diagonal cutouts 74a and 74b.

The central cutout 71 includes a central horizontal portion and a pair of diagonal lines. The central horizontal portion extends from the right side of the pixel electrode 191 to the left along the storage electrode line 131, and the pair of diagonal portions respectively form the lower and upper diagonal lines toward the left side of the pixel electrode 191 at the end of the central horizontal portion. It extends almost parallel with the incisions 72a-74b.

One end of the oblique portion of the center cutout 71 and one end of the second lower cutout 73a of the neighboring pixel electrode, the other end of the oblique portion of the central cutout 71 and the second upper cutout of the neighboring pixel electrode. One end of 73b, one end of the first lower oblique cutout 72a, one end of the third lower oblique cutout 74a of the neighboring pixel electrode, and one end of the first upper oblique cutout 72b; One end of the third upper oblique cut portion 74b of the neighboring pixel electrode is connected to the connection portion 75, respectively. The connection part 75 is positioned at a portion parallel to the first hypotenuse 90a of the pixel electrode 191 and corresponding to the data line 171. The width of the connection part 75 is about 8 μm wider than the distance between the pixel electrode 191 and the pixel electrode 191, and the extension part 222 of the light blocking member 220 corresponds to the connection part 75. It can be wider than that.

Each of the cutouts 71 to 74b is provided with a plurality of concave notches 7 regularly arranged at regular distances.

Alignment layers 11 and 21 are coated on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers. Polarizers (not shown) are provided on the outer surfaces of the display panels 100 and 200, and polarization axes of the two polarizers are orthogonal to each other, and one polarization axis thereof is parallel to the gate line 121. In the case of a reflective liquid crystal display, one of two polarizers may be omitted.

The liquid crystal display according to the present exemplary embodiment may further include a phase delay film (not shown) for compensating for the delay value of the liquid crystal layer 3. The phase retardation film has birefringence and reversely compensates for the phase retardation of the liquid crystal layer 3.

The liquid crystal display may include a polarizer, a phase retardation film, display panels 100 and 200, and an illumination unit (not shown) that supplies light to the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels in the absence of an electric field. Therefore, incident light does not pass through the orthogonal polarizer and is blocked.

In the liquid crystal display illustrated in FIGS. 21 through 25, opaque members such as the storage electrode line 131, the capacitor electrode 136, the extended portions 177a1, 177a2 and 176, and the connection portions 178a1 and 178a2 of the drain electrode 175 are provided. And transparent members such as the pixel electrode 191 and the common electrode 270 having the cutouts 91-94b and 71-75 are symmetric about the capacitor electrode 136 equidistant from two adjacent gate lines 121. It is arranged.

Such a liquid crystal display will be further described with reference to FIG. 25.

Referring to FIG. 25, one pixel of a liquid crystal display includes a first subpixel and a second liquid crystal capacitor C _LC including a thin film transistor Q, a first liquid crystal capacitor C _LC a, and a storage capacitor C _ST . a second subpixel comprising b), and a coupling capacitor (Ccp).

The first liquid crystal capacitor C _LC a includes lower and upper subpixel electrodes 191a1 and 191a2 as one terminal, and includes a corresponding portion of the common electrode 270 as another terminal, and a liquid crystal layer between the two terminals. (3) The part is included as a dielectric. Similarly, the second liquid crystal capacitor C _LC b includes a central subpixel electrode 191b as one terminal, a corresponding portion of the common electrode 270 as the other terminal, and includes a liquid crystal layer between the two terminals ( 3) Include the part as a dielectric.

The storage capacitor C _ST includes lower and upper extension portions 177a1 and 177a2 of the drain electrode 175 as one terminal, and lower and upper sustain electrodes 137a1 and 137a2 as the other terminal, and two terminals. A portion of the gate insulating film 140 therebetween is included as the dielectric. The coupling capacitor Ccp includes a central subpixel electrode 191b and a capacitor electrode 136 as one terminal, and a coupling electrode 176 as another terminal, and a passivation layer 180 and a gate insulating film between the two terminals. Portion 140 as the dielectric.

The first liquid crystal capacitor C _LC a and the storage capacitor C _ST are connected to the drain of the thin film transistor Q, and the coupling capacitor Ccp is the thin film transistor Q and the second liquid crystal capacitor C _LC b. It is connected between. The common voltage Vcom is applied to the common electrode 270, and the common voltage Vcom may be applied to the sustain electrode line 131.

The thin film transistor Q applies the data voltage from the data line 171 to the first liquid crystal capacitor C _LC a and the coupling capacitor Ccp according to the gate signal from the gate line 121, and the coupling capacitor Ccp. ) Transfers this voltage to the second liquid crystal capacitor C _LC b.

When the common voltage Vcom is applied to the storage electrode line 131 and the capacitors C _LC a, C _ST , C _LC b, and Ccp are represented by the same reference numerals, the first liquid crystal capacitor C _LC a The voltage Va charged to and the voltage Vb charged to the second liquid crystal capacitor C _LC b have the following relationship.

Vb = Va [Ccp / (Ccp + C _LC b)]

Since the value of Ccp / (Ccp + C _LC b) is less than 1, the voltage Vb charged in the second liquid crystal capacitor C _LC b is equal to the voltage Va charged in the first liquid crystal capacitor C _LC a. Always small compared to This relationship holds true even when the voltage of the sustain electrode line 131 is not the common voltage Vcom.

As such, when a potential difference occurs between both ends of the first or second liquid crystal capacitors C _LC a and C _LC b, an electric field substantially perpendicular to the surfaces of the display panels 100 and 200 is generated in the liquid crystal layer 3. Then, the liquid crystal molecules of the liquid crystal layer 3 are inclined so that their major axis is perpendicular to the direction of the electric field in response to the electric field. Different. This change in polarization is represented by a change in transmittance by the polarizers 12 and 22, through which the liquid crystal display displays an image.

The angle at which the liquid crystal molecules are inclined depends on the intensity of the electric field. The voltage Va of the first liquid crystal capacitor C _LC a and the voltage Vb of the second liquid crystal capacitor C _LC b are different from each other. The inclination angles of the liquid crystal molecules in the pixel and the second subpixel are different, and thus, the luminance of the two subpixels is different. Therefore, by properly matching the voltage Va of the first liquid crystal capacitor C _LC a and the voltage Vb of the second liquid crystal capacitor C _LC b, the image viewed from the side can be as close as possible to the image viewed from the front. In this way, side visibility can be improved.

The ratio of the first liquid crystal capacitor C _LC a voltage Va and the second liquid crystal capacitor C _LC b voltage Vb can be adjusted by changing the capacitance of the coupling capacitor Ccp, and the coupling capacitor Ccp The capacitance of can be changed by adjusting the overlapping area and distance of the second subpixel electrode 191b and the capacitor electrode 136 and the coupling electrode 176. For example, when the capacitor electrode 136 is removed and the coupling electrode 176 is brought into place, the distance between the coupling electrode 176 and the second pixel electrode 191b may be increased. The second liquid crystal capacitor C _LC b voltage Vb is preferably 0.6 to 0.8 times the first liquid crystal capacitor C _LC a voltage Va.

Alternatively, the voltage Vb of the second liquid crystal capacitor C _LC b may be higher than the voltage Va of the first liquid crystal capacitor C _LC a, which causes the second liquid crystal capacitor C _LC b to be the common voltage. By precharging to a predetermined voltage such as

The area ratio between the lower and upper pixel electrodes 191a1 and 191a2 of the first subpixel and the center pixel electrode 191b of the second subpixel may be in a range of 1: 0.85-1: 1.15, and each subpixel The number of electrodes can vary.

In addition, by forming the side of the pixel electrode 191 adjacent to the data line 171 adjacent to the sawtooth 90 shape, the negative electric field formed between the neighboring pixel electrodes 191 enhances the alignment of the liquid crystal in the negative region. It is formed in the direction to make. In addition, the alignment portion 75 may be disposed at a position corresponding to a region where the first hypotenuse 90a of two neighboring pixel electrodes 191 face each other, thereby further enhancing the alignment of the liquid crystal in the subregion.

FIG. 26 is a layout view of a liquid crystal display according to another exemplary embodiment. FIG. 27 is an enlarged view of XXVII of FIG. 26, and FIG. 28 is a cross-sectional view taken along the line XXVIII-XXVIII of FIG. 26, and FIG. 29. Is a cross-sectional view taken along the line XXIX-XXIX in FIG. 26.

26 to 29, a liquid crystal panel assembly according to an exemplary embodiment of the present invention may include a thin film transistor array panel 100, a common electrode display panel 200, and a liquid crystal layer interposed between the two display panels 100 and 200. Include 3).

The thin film transistor array panel 100 will be described in detail.

A plurality of gate conductors including a plurality of pairs of first and second gate lines 121a and 121b and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or plastic.

The first and second gate lines 121a and 121b transmit gate signals and extend mainly in the horizontal direction, and are positioned above and below the storage electrode line 131, respectively.

The first gate lines 121a and 121b have a large area for connecting the plurality of first gate electrodes 124a protruding downward from another layer or an external driving circuit and are disposed at the left end portions 129a respectively. It includes.

The second gate line 121b includes end portions 129a and 129b having a large area and arranged on the left side for connecting the plurality of second gate electrodes 124b protruding upward from another layer or an external driving circuit. do.

However, these ends 129a and 129b may both be disposed on the right side and may be disposed on different sides. A gate driving circuit (not shown) that generates a gate signal is mounted on a flexible printed circuit film (not shown) attached over the substrate 110, directly mounted on the substrate 110, or integrated into the substrate 110. Can be. When the gate driving circuit is integrated on the substrate 110, the gate lines 121a and 121b may extend to be directly connected to the gate driving circuit.

The storage electrode line 131 receives a predetermined voltage and mainly extends in the horizontal direction. Each storage electrode line 131 is positioned between the first and second gate lines 121a and 121b, and is slightly closer to the first gate line 121a than the second gate line 121b, and two adjacent second gate lines are disposed. The distance is substantially the same as that of 121b. Each storage electrode line 131 includes a storage electrode 137 extending up and down, and the storage electrode 137 is approximately rectangular and symmetric to the storage electrode line 131. The shape and arrangement of the storage electrode line 131 including the storage electrode 137 may be modified in various forms.

The gate conductors 121a, 121b, and 131 may be formed of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, and molybdenum (Mo). ) And molybdenum-based metals such as molybdenum alloys, chromium (Cr), tantalum (Ta) and titanium (Ti). However, they may have a multi-film structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having a low resistivity, for example, an aluminum-based metal, a silver-based metal, or a copper-based metal to reduce signal delay and voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with ITO and IZO, such as molybdenum-based metals, chromium, tantalum, titanium, and the like. A good example of such a combination is a chromium bottom film, an aluminum (alloy) top film, an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate conductors 121a, 121b, and 131 may be made of various other metals or conductors.

Side surfaces of the gate conductors 121a, 121b, and 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 ° to about 80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate conductors 121a, 121b, and 131.

On the gate insulating layer 140, a plurality of island-like semiconductors 154a, 154b, 156, 157a, and 157b made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si) or polycrystalline silicon are formed. . The semiconductors 154a and 154b are positioned on the gate electrodes 124a and 124b, respectively. The semiconductor 156 covers the boundary of the storage electrode line 131. The semiconductors 157a and 157b partially overlap the boundaries of the sustain electrodes 137.

A plurality of island-like ohmic contacts 163a, 163b, 165a, 165b, and 167b are formed on the semiconductors 154a, 154b, and 157b, and island-like ohmic contacts (not shown) are also formed on the semiconductors 156, 157a. . The ohmic contacts 163a, 163b, 165a, 165b, and 167b may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped, or made of silicide. The ohmic contacts 163a and 165a and the ohmic contacts 163b and 165b are paired and disposed on the semiconductors 154a and 154b, respectively.

Side surfaces of the semiconductors 154a, 154b, 156, 157a, and 157b and the ohmic contacts 163a, 163b, 165a, 165b, and 167b are also inclined with respect to the substrate 110 surface, and the inclination angle is about 30 ° to 80 °.

A data conductor including a plurality of data lines 171 and a plurality of pairs of first and second drain electrodes 175a and 175b is formed on the ohmic contacts 163a, 163b, 165a, 165b, and 167b and the gate insulating layer 140. Formed.

The data line 171 transmits a data signal and mainly extends in the vertical direction to cross the gate lines 121a and 121b and the storage electrode line 131. Each data line 171 has an area for connection with a plurality of first and second source electrodes 173a and 173b extending toward the first and second gate electrodes 124a and 124b and another layer or an external driving circuit. Wide end portion 179. A data driving circuit (not shown) for generating a data signal is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or mounted on the substrate 110. Can be integrated. When the data driving circuit is integrated on the substrate 110, the data line 171 can extend and be directly connected thereto.

The first and second drain electrodes 175a and 175b are separated from each other and also separated from the data line 171.

The first drain electrode 175a has a bar-shaped end portion 176a facing the first source electrode 173a around the first gate electrode 124a and a wide rectangle at the opposite end of the rod-shaped end portion 176a. The extension part 177a and the linear connection part 176aa which connect the extension part 177a and the end part 176a are included. The extension 177a overlaps the storage electrode 137, and the rod-shaped end portion 176a overlaps the first gate electrode 124a and is partially surrounded by the first source electrode 173a bent in a U shape. The connection part 176aa of the first drain electrode 175a is mostly positioned above the extension part 139, extends in parallel with the extension part 139, and is located in a vertical boundary of the extension part 139.

Similarly, the second drain electrode 175b is disposed at the opposite end of the bar end portion 176b and the bar end portion 176b facing the second source electrode 173b with respect to the second gate electrode 124b. Wide rectangular shaped extension 177b, and a linear connection 176bb connecting the extension 177b and the end portion 176b. The extension 177b overlaps the storage electrode 137, and the rod-shaped end portion 176b overlaps the second gate electrode 124b and is partially surrounded by the second source electrode 173b bent in a U shape. The area of the second drain electrode 175b extension 177b is smaller than the area of the first drain electrode extension 177a.

As described above, since the extension portion 139 may be provided under the connection portion 176aa of the first drain electrode 175a, the storage capacitance may be increased, thereby reducing the area of the storage electrode 137 to increase the aperture ratio.

The first and second gate electrodes 124a and 124b, the first and second source electrodes 173a and 173b, and the first and second drain electrodes 175a and 175b are formed of the first and second semiconductors 154a and 154b. Together with the first and second thin film transistors Qa and Qb, and the channels of the first and second thin film transistors Qa and Qb are connected to the first and second source electrodes 173a and 173b and the first and second electrodes. It is formed in the first and second semiconductors 154a and 154b between the drain electrodes 175a and 175b.

The data conductors 171, 175a, and 175b are preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and include a refractory metal film (not shown) and a low resistance conductive film (not shown). It may have a multilayer structure comprising a. Examples of the multilayer structure include a double film of a chromium or molybdenum (alloy) lower film and an aluminum (alloy) upper film, a molybdenum (alloy) lower film, an aluminum (alloy) intermediate film and a molybdenum (alloy) upper film. However, the data conductors 171, 175a, and 175b may be made of various other metals or conductors.

The data conductors 171, 175a, and 175b also preferably have their side surfaces inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The ohmic contacts 163a, 163b, 165a, 165b, and 167b exist only between the semiconductors 154a, 154b, and 157b below and the data conductors 171, 175a, and 175b thereon, and have contact resistance therebetween. Lower it. The semiconductors 156, 157a, and 157b disposed on the gate lines 121a and 121b and the storage electrode line 131 soften the profile of the surface to prevent disconnection of the data line 171 and the drain electrodes 175a and 175b. The island semiconductors 154a and 154b have portions exposed between the source electrodes 173a and 173b and the drain electrodes 175a and 175b and not covered by the data conductors 171, 175a and 175b.

The passivation layer 180 is formed on the data conductors 171, 175a, and 175b and the exposed semiconductors 154a and 154b. The protective film 180 is made of an inorganic insulating material or an organic insulating material and may have a flat surface. Examples of the inorganic insulating material include silicon nitride and silicon oxide. The organic insulator may have photosensitivity and its dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portions of the semiconductors 154a and 154b while maintaining excellent insulating properties of the organic layer.

The passivation layer 180 has a plurality of contact holes 182, 185a, and 185b exposing the end portions 179 of the data line 171 and the extension portions 177a and 177b of the first and second drain electrodes 175a and 175b, respectively. ) Is formed, and a plurality of contact holes 181a and 181b exposing end portions 129a and 129b of the gate lines 121a and 121b are formed in the passivation layer 180 and the gate insulating layer 140.

A plurality of pixel electrodes 191 including the first and second subpixel electrodes 191a and 191b and a plurality of contact auxiliary members 81a, 81b, and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

Each pixel electrode 191 has a substantially rectangular shape in which four corners are chamfered, and the chamfered hypotenuse forms an angle of about 45 ° with respect to the gate lines 121a and 121b.

The pair of first and second subpixel electrodes 191a and 191b constituting each pixel electrode 191 are engaged with each other with a gap 92 and 93 interposed therebetween. The second subpixel electrode 191b is a substantially rotated equilateral trapezoid, and the base is recessed in a trapezoidal shape, and most of the second subpixel electrode 191b is surrounded by the first subpixel electrode 191a. The first subpixel electrode 191a includes upper, lower and center trapezoidal parts connected to each other at the left side.

Each pixel electrode 191 is connected to a pair of first peripheral sides 193 and 194 facing each other and the first peripheral sides 193 and 194 and between the plurality of teeth 90 and the teeth 90. It has a second peripheral side including the bottom side (90c) connecting the. Here, the tooth 90 connects the first hypotenuse 90a and the second hypotenuse 90d and the first hypotenuse 90a and the second hypotenuse 90d that are inclined with respect to the first peripheral sides 193 and 194. It has an upper side 90b. The first peripheral sides 193 and 194 are parallel to the gate line 121. The first peripheries 193 and 194 and the second periphery form a substantially rectangular shape, and four corners of the pixel electrode 191 are chamfered to form an angle of about 45 ° with respect to the gate line 121. The first hypotenuse 90a partially overlaps the data line 171, and the first hypotenuse 90a of the two neighboring pixel electrodes 191 faces each other and is parallel to each other.

The first subpixel electrode 191a has cutouts 94a and 94b extending from the upper side of the upper trapezoid portion and the lower side of the lower trapezoid portion toward the right side. The center trapezoid of the first subpixel electrode 191a is sandwiched in the recessed bottom side of the second subpixel electrode 191b. In addition, the first subpixel electrode 191a has a central cutout 91 including a horizontal portion and a pair of diagonal portions connected thereto. The horizontal portion extends shortly along the horizontal center line of the first subpixel electrode 191a, and the pair of diagonal portions extend toward the left side of the first subpixel electrode 191a in the horizontal portion and with respect to the storage electrode line 131. It is at an angle of about 45 °. The gaps 92 and 93 between the first subpixel electrode 191a and the second subpixel electrode 191b have two pairs of upper and lower oblique portions and the vertical portion forming about 45 ° with the gate lines 121a and 121b. Include. Hereinafter, for convenience of explanation, the gaps 92 and 93 are also referred to as cutouts. The cutouts 91-94b are almost inverted symmetric with respect to the storage electrode lines 131, and they extend perpendicular to each other at an angle of about 45 ° with respect to the gate lines 121a and 121b. The pixel electrode 191 is divided into a plurality of regions by these cutouts 91-94b.

Therefore, the upper half and the lower half of the sustain electrode line 131 which bisects the pixel electrode 191 in the horizontal direction are divided into four regions by the cutouts 91-94b.

In this case, the number of regions or the number of cutouts may vary according to design elements such as the size of the pixel electrode 191, the length ratio of the horizontal side and the vertical side of the pixel electrode 191, and the type or characteristics of the liquid crystal layer 3.

The first and second subpixel electrodes 191a and 191b are connected to the first and second drain electrodes 175a and 175b through the contact holes 185a and 185b, respectively, and the first and second drain electrodes 175a. 175b) is applied to the data voltage. The pair of subpixel electrodes 191a and 191b are applied with different data voltages, which are set in advance with respect to one input image signal, and the size thereof is set according to the size and shape of the subpixel electrodes 191a and 191b. Can be. In addition, the areas of the subpixel electrodes 191a and 191b may be different from each other. For example, the second subpixel electrode 191b receives a higher voltage than the first subpixel electrode 191a and has a smaller area than the first subpixel electrode 191a.

The subpixel electrodes 191a and 191b to which the data voltage is applied and the common electrode 270 to which the common voltage is applied form the first and second liquid crystal capacitors to maintain the applied voltage even after the thin film transistor is turned off. Each liquid crystal capacitor includes a liquid crystal layer 3 portion as a dielectric.

The first and second subpixel electrodes 191a and 191b and the electrodes 177a and 177b electrically connected thereto overlap the storage electrode line 131 including the storage electrode 137 and the extension 139 to form a voltage of the liquid crystal capacitor. Form a retention capacitor that enhances retention capacity.

The contact auxiliary members 81a, 81b, and 82 are end portions 129a and 129b of the gate lines 121a and 121b and end portions 179 of the data line 171 through the contact holes 181a, 181b, and 182, respectively. Connected with The contact auxiliary members 81a, 81b, and 82 compensate for and protect the adhesion between the end portions 129a and 129b of the gate lines 121a and 121b and the end portions 179 of the data line 171 and the external device. do.

Next, the common electrode display panel 200 will be described.

The light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 includes a linear portion corresponding to the data line 171, an extended portion partially extended, and a planar portion corresponding to the thin film transistor, and prevents light leakage between the pixel electrodes 191 and the pixel electrode 191. Define the opening area facing. However, the light blocking member 220 may have a plurality of openings (not shown) facing the pixel electrode 191 and having substantially the same shape as the pixel electrode 191.

A plurality of color filters 230 are further formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The cover film 250 can be made of (organic) insulation and prevents the color filter 230 from being exposed and provides a flat surface. The overcoat 250 may be omitted.

A common electrode 270 is formed on the lid 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO.

A plurality of cutouts 71, 72, 73a, 73b, 74a, 74b, and 75 are formed in the common electrode 270.

One set of cutouts 71 to 75 faces the pixel electrode 191 and faces the center cutout 71, the first to third lower diagonal cutouts 72, 73a, and 74a and the first to third cutouts. Upper diagonal cutouts 72, 73b, 74b and a connection 75. Each of the cutouts 71 to 74b is disposed between adjacent cutouts 91, 92, 93, 94a, and 94b of the pixel electrode 191 or between the cutouts 91, 92, 93, 94a and 94b and the pixel electrode 191. It is placed between the chamfered hypotenuses. In addition, each cutout 71 to 74b includes at least one diagonal line extending in parallel with the lower cutouts 93 and 94a or the upper cutouts 93 and 94b of the pixel electrode 191.

The first lower and first upper diagonal cutouts 72 extend from the right side of the pixel electrode 191 to the left side of the pixel electrode 191, and the second lower and second upper diagonal cutouts 73a and 73b. ) Extends from the right side of the pixel electrode 191 to the upper left or lower corner of the pixel electrode 191. The third lower and third upper oblique cutouts 74a and 74b extend from the right side of the pixel electrode 191 to the upper or lower side of the pixel electrode 191, and the third lower and third upper oblique cutouts. It includes a terminal horizontal portion extending while overlapping along the sides of the pixel electrode 191 from each end of (74a, 74b). The longitudinal cross section forms an obtuse angle with the diagonal cutouts 74a and 74b.

The central cutout 71 includes a central horizontal portion and a pair of diagonal lines. The central horizontal portion extends from the right side of the pixel electrode 191 to the left along the storage electrode line 131, and the pair of diagonal portions respectively form the lower and upper diagonal lines toward the left side of the pixel electrode 191 at the end of the central horizontal portion. It extends almost parallel to the incisions 72-74b.

One end of the oblique portion of the center cutout 71 and one end of the second lower cutout 73a of the neighboring pixel electrode, the other end of the oblique portion of the central cutout 71 and the second upper cutout of the neighboring pixel electrode. One end of 73b, one end of the first lower oblique cut 72, one end of the third lower oblique cut 74a of the neighboring pixel electrode, and one end of the first upper oblique cut 72 One end of the third upper oblique cut portion 74b of the neighboring pixel electrode is connected to the connection portion 75, respectively. The connection part 75 is positioned at a portion parallel to the first hypotenuse 90a of the pixel electrode 191 and corresponding to the data line 171. The width of the connection part 75 is about 8 μm wider than the distance between the pixel electrode 191 and the pixel electrode 191, and the extension part 222 of the light blocking member 220 corresponds to the connection part 75 to another part. It can be wider than that.

The notch 7 of a triangular shape is formed in the diagonal part of cutouts 71-74b. Such notches may have a rectangular, trapezoidal or semicircular shape and may be convex or concave. This notch determines the alignment direction of the liquid crystal molecules 3 located at the region boundary corresponding to the cutouts 71-74b.

The number and direction of the cutouts 71-75 may also vary according to design elements, and the light blocking member 220 may overlap the cutouts 71 to 75 to block light leakage near the cutouts 71-75. .

Alignment layers 11 and 21 are coated on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers.

Polarizers (not shown) are provided on the outer surfaces of the display panels 100 and 200, and the polarization axes of the two polarizers are orthogonal to each other, and one polarization axis is parallel to the gate lines 121a and 121b. In the case of a reflective liquid crystal display, one of two polarizers may be omitted.

The liquid crystal display according to the present exemplary embodiment may further include a phase delay film for compensating the delay value of the liquid crystal layer 3. The phase retardation film has birefringence and reversely compensates for the phase retardation of the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels 100 and 200 in the absence of an electric field. Therefore, incident light does not pass through the orthogonal polarizer and is blocked.

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the pixel electrode 191 to generate a potential difference between both ends of the first or second liquid crystal capacitor, an electric field almost perpendicular to the surfaces of the display panels 100 and 200 is formed. Is produced in layer (3). Then, the liquid crystal molecules of the liquid crystal layer 3 are inclined so that their major axis is perpendicular to the direction of the electric field in response to the electric field, and the degree of change in the polarization of the light incident on the liquid crystal layer 3 depends on the degree of tilt of the liquid crystal molecules. Different. This change in polarization is represented by a change in transmittance by the polarizer, through which the liquid crystal display displays an image.

The angle at which the liquid crystal molecules are inclined depends on the intensity of the electric field. When a low voltage is applied to the first subpixel electrode and a high voltage is applied to the second subpixel electrode, the voltage Va of the first liquid crystal capacitor becomes the second liquid crystal capacitor. Since the angle of the liquid crystal molecules in the first subpixel and the second subpixel are different from each other since the voltage Vb is greater than, the luminance of the two subpixels is different. Therefore, when the voltage Va of the first liquid crystal capacitor and the voltage Vb of the second liquid crystal capacitor are properly adjusted, the image viewed from the side can be as close as possible to the image viewed from the front, thereby improving side visibility. .

The direction in which the liquid crystal molecules are inclined is determined by the horizontal components of the cutouts 71-74b and 91-94b of the field generating electrodes 191 and 270 and the hypotenuse of the pixel electrode 191 distorting the electric field. The horizontal component of the electric field is perpendicular to the sides of the cutouts 71-74b and 91-94b and the sides of the pixel electrode 191.

Referring to FIG. 26, one cut set 71-74b and 91-94b is a plurality of sub-areas having pixel electrodes 191 having two inclined major edges, respectively. In addition, the inclination direction of the liquid crystal molecules of each subregion is determined by the direction determined by the horizontal component of the electric field, and the inclination direction is approximately four directions. When the direction in which the liquid crystal molecules are tilted is varied in this way, the reference viewing angle of the liquid crystal display device is increased.

In addition, by forming the side of the pixel electrode 191 adjacent to the data line 171 adjacent to each other in a sawtooth shape, the negative electric field formed between the neighboring pixel electrodes 191 has a direction in which the orientation of the liquid crystal in the secondary region is enhanced. do. In addition, the alignment portion 75 may be disposed at a position corresponding to a region where the first hypotenuse 90a of two neighboring pixel electrodes 191 face each other, thereby further enhancing the alignment of the liquid crystal in the subregion.

The shape and arrangement of the cutouts 71-74b and 91-94b for determining the inclination direction of the liquid crystal molecules may be changed, and the at least one cutout 71-74b and 91-94b may be a protrusion (not shown). B may be replaced by a depression (not shown). The protrusions may be made of organic or inorganic materials and may be disposed above or below the field generating electrodes 191 and 270.

In addition, since the area of the second subpixel electrode 191b to which a high voltage is applied is smaller than the area of the first subpixel electrode 191a, the distortion of the side gamma curve may be reduced. In particular, when the area ratio of the first and second subpixel electrodes 191a and 191b is approximately 2: 1, the side gamma curve is closer to the front gamma curve, so that side visibility is better.

A liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 28 to 30.

30 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention, FIG. 31 is an enlarged view of XXXI of FIG. 30, and FIGS. 32 and 33 are XXXII-XXXII and XXXIII- views of the liquid crystal display of FIG. 30, respectively. It is sectional drawing cut along the XXXIII line.

30 to 33, the liquid crystal display according to the present exemplary embodiment includes a thin film transistor array panel 100, a common electrode display panel 201, and a liquid crystal layer 3 therebetween.

First, the thin film transistor array panel 100 will be described in detail.

A plurality of gate conductors including a plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction. Each gate line 121 includes an end portion 129 having a large area for connecting the first and second gate electrodes 124a and 124b protruding upward from another layer or an external driving circuit.

The storage electrode line 131 receives a predetermined voltage and mainly extends in the horizontal direction. Each storage electrode line 131 is positioned between two adjacent gate lines 121 and is disposed at substantially the same distance from the two gate lines 121. Each storage electrode line 131 includes a storage electrode 137 extending up and down and a rod-shaped extension 139 extending downward from the storage electrode 137. The storage electrode 137 is substantially rectangular and symmetric to the storage electrode line 131, and the extension 139 extends to the vicinity of the first gate electrode 124a. However, the shape and arrangement of the storage electrode line 131 including the storage electrode 137 may be modified in various forms.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate conductors 121 and 131.

A plurality of island-like semiconductors 154a, 154b, 157a, and 157b made of hydrogenated amorphous silicon, polycrystalline silicon, or the like are formed on the gate insulating layer 140. The semiconductors 154a and 154b are positioned on the gate electrodes 124a and 124b, respectively.

A plurality of island type ohmic contact members 163a, 163b, 165a, 165b, 167a, and 167b are formed on the semiconductors 154a, 154b, 157a, and 157b. The ohmic contacts 163a-167b may be made of a material such as n + hydrogenated amorphous silicon doped with a high concentration of n-type impurities such as phosphorus or made of silicide. The ohmic contacts 163a and 165a and the ohmic contacts 163b and 165b are paired and positioned on the semiconductors 154a and 154b, respectively. The ohmic contacts 167a and 167b are positioned on the semiconductors 157a and 157b, respectively. .

The gate insulating layer 140 and the ohmic contacts 163a, 163b, 165a, 165b, 167a, and 167b include a plurality of data lines 171a and 171b and a plurality of pairs of first and second drain electrodes 173a and 173b. A data conductor is formed.

The data lines 171a and 171b transmit data signals and mainly extend in the vertical direction to cross the gate lines 121 and the storage electrode lines 131. Each data line 171a and 171b may be connected to a plurality of first and second source electrodes 173a and 173b extending toward the first and second gate electrodes 124a and 124b and another layer or an external driving circuit. It includes a wide end portion 179a, 179b.

The first and second drain electrodes 173a and 173b are separated from each other and also separated from the data lines 171a and 171b. Each of the drain electrodes 173a and 173b faces the first and second source electrodes 173a and 173b around the gate electrodes 124a and 124b and has a rectangular extension portion 177a and 177b having a wide area at one end thereof. ), Other end portions 176a and 176b that are rod-shaped, and connecting portions 176aa and 176bb connecting the extension portions 177a and 177b and the end portions 176a and 176b. Each of the extensions 177a and 177b overlaps the storage electrode 137, and the rod-shaped ends 176a and 176b overlap the gate electrodes 124a and 124b and are formed by the source electrodes 173a and 173b bent in a U shape. Some are surrounded.

The connection part 176aa of the first drain electrode 173a is mostly positioned above the extension part 139, extends in parallel with the extension part 139, and is located in a vertical boundary of the extension part 139. The area of the extension 177b of the second drain electrode 173b is smaller than the area of the extension 177a of the first drain electrode 173a.

The first and second gate electrodes 124a and 124b, the first and second source electrodes 173a and 173b, and the first and second drain electrodes 173a and 173b together with the semiconductors 154a and 154b. A second thin film transistor Qa / Qb is formed, and a channel of the thin film transistor Qa / Qb is a semiconductor between the first / second source electrode 173a / 173b and the first / second drain electrode 173a / 173b. It is formed at 154a / 154b.

The ohmic contacts 163a-167b exist only between the semiconductors 154a, 154b, 157a, and 157b thereunder and the data lines 171a and 171b and the drain electrodes 173a and 173b thereon and the contact resistance therebetween. Lowers. The island-like semiconductors 154a and 154b include portions exposed between the source electrodes 173a and 173b and the drain electrodes 173a and 173b and not covered by these.

The passivation layer 180 is formed on the data lines 171a and 171b, the drain electrodes 173a and 173b, and the exposed portions of the semiconductors 154a and 154b.

The passivation layer 180 has a plurality of contact holes 185a, 185b, 182a, and 177b that expose the extension portions 177a and 177b of the drain electrodes 173a and 173b and the end portions 179a and 179b of the data lines 171a and 171b, respectively. 182b is formed, and a plurality of contact holes 181 exposing the end portion 129 of the gate line 121 are formed in the passivation layer 180 and the gate insulating layer 140.

A plurality of pixel electrodes 191 including the first and second subpixel electrodes 191a and 191b and a plurality of contact auxiliary members 81, 82a and 82b are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

Each pixel electrode 191 has a substantially rectangular shape having four corners chamfered, and the chamfered hypotenuse forms an angle of about 45 ° with respect to the gate line 121.

The pair of first and second subpixel electrodes 191a and 191b constituting each pixel electrode 191 are engaged with each other with a gap 92 and 93 interposed therebetween. The second subpixel electrode 191b is a substantially rotated equilateral trapezoid, and the base is recessed in a trapezoidal shape, and most of the second subpixel electrode 191b is surrounded by the first subpixel electrode 191a. The first subpixel electrode 191a includes upper, lower and center trapezoidal parts connected to each other at the left side.

Each pixel electrode 191 is connected to a pair of first peripheral sides 193 and 194 facing each other and the first peripheral sides 193 and 194 and between the plurality of teeth 90 and the teeth 90. It has a second peripheral side including the base side (90c) connecting. Here, the tooth 90 connects the first hypotenuse 90a and the second hypotenuse 90d and the first hypotenuse 90a and the second hypotenuse 90d that are inclined with respect to the first peripheral sides 193 and 194. It has an upper side 90b. The first peripheral sides 193 and 194 are parallel to the gate line 121. The first peripheries 193 and 194 and the second periphery form a substantially rectangular shape, and four corners of the pixel electrode 191 are chamfered to form an angle of about 45 ° with respect to the gate line 121. The first hypotenuse 90a partially overlaps the data line 171, and the first hypotenuse 90a of the two neighboring pixel electrodes 191 faces each other and is parallel to each other.

The first subpixel electrode 191a has cutouts 94a and 94b extending from the upper side of the upper trapezoid portion and the lower side of the lower trapezoid portion toward the right side. The center trapezoid of the first subpixel electrode 191a is sandwiched in the recessed bottom side of the second subpixel electrode 191b. In addition, the first subpixel electrode 191a has a central cutout 91 including a horizontal portion and a pair of diagonal portions connected thereto. The horizontal portion extends shortly along the horizontal center line of the first subpixel electrode 191a, and the pair of diagonal portions extend toward the left side of the first subpixel electrode 191a in the horizontal portion and is about the storage electrode line 131. It is 45 degrees. The gaps 92 and 93 between the first subpixel electrode 191a and the second subpixel electrode 191b include two pairs of upper and lower oblique portions and a vertical portion forming about 45 ° with the gate line 121. .

The cutouts 91-94b have almost inverted symmetry with respect to the storage electrode line 131, and they extend perpendicular to each other at an angle of about 45 ° with respect to the gate line 121. The pixel electrode 191 is divided into a plurality of regions by these cutouts 91-94b.

Therefore, the upper half and the lower half of the sustain electrode line 131 which bisects the pixel electrode 191 in the horizontal direction are divided into four regions by the cutouts 91-94b.

In this case, the number of regions or the number of cutouts may vary according to design elements such as the size of the pixel electrode 191, the length ratio of the horizontal side and the vertical side of the pixel electrode 191, and the type or characteristics of the liquid crystal layer 3.

The first and second subpixel electrodes 191a and 191b are connected to the first and second drain electrodes 175a and 175b through the contact holes 185a and 185b, respectively, and the first and second drain electrodes 175a. 175b) is applied to the data voltage. Different data voltages, which are set in advance with respect to one input image signal, are applied to the pair of subpixel electrodes 191a and 191b, the size of which is set according to the size and shape of the subpixel electrodes 191a and 191b. Can be. In addition, the areas of the subpixel electrodes 191a and 191b may be different from each other. For example, the second subpixel electrode 191b receives a higher voltage than the first subpixel electrode 191a and has a smaller area than the first subpixel electrode 191a.

The first and second subpixel electrodes 191a and 191b are physically and electrically connected to the first and second drain electrodes 173a and 173b through the contact holes 185a and 185b to form the first and second drain electrodes ( 173a / 173b). The pair of subpixel electrodes 191a and 191b are applied with different data voltages, which are set in advance with respect to one input image signal, and the size thereof is set according to the size and shape of the subpixel electrodes 191a and 191b. Can be. In addition, the areas of the subpixel electrodes 191a and 191b may be different from each other. For example, the second subpixel electrode 191b receives a higher voltage than the first subpixel electrode 191a and has a smaller area than the first subpixel electrode 191a.

The subpixel electrodes 191a and 191b to which the data voltage is applied, the common electrode 270 to which the common voltage is applied, form first and second liquid crystal capacitors to maintain the applied voltage even after the thin film transistor is turned off. Each liquid crystal capacitor includes a liquid crystal layer 3 portion as a dielectric.

The first and second subpixel electrodes 191a and 191b and the extension parts 177a and 177b of the drain electrodes 173a and 173b electrically connected to the first and second subpixel electrodes 191a and 191b are extended with the storage electrode 137 and the gate insulating layer 140 therebetween. Overlapping with the storage electrode line 131 including the unit 139 forms a storage capacitor that enhances the voltage holding capability of the liquid crystal capacitor.

The contact auxiliary members 81, 82a, and 82b are the end portions 129 of the gate lines 121 and the end portions 179a and 179b of the data lines 171a and 171b through the contact holes 181, 182a, and 182b, respectively. Connected with The contact auxiliary members 81, 82a, and 82b compensate for and protect the adhesion between the end portion 129 of the gate line 121 and the end portions 179a and 179b of the data lines 171a and 171b and the external device. do.

Next, the common electrode display panel 200 will be described in detail.

The light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 includes a linear portion corresponding to the data line 171, an extended portion partially extended, and a planar portion corresponding to the thin film transistor, and prevents light leakage between the pixel electrode 191 and prevents the pixel electrode 191. Define an opening area facing). However, the light blocking member 220 may have a plurality of openings (not shown) facing the pixel electrode 191 and having substantially the same shape as the pixel electrode 191.

A plurality of color filters 230 are further formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The cover film 250 can be made of (organic) insulation and prevents the color filter 230 from being exposed and provides a flat surface. The overcoat 250 may be omitted.

A common electrode 270 is formed on the lid 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO.

A plurality of cutouts 71, 72, 73a, 73b, 74a, 74b, and 75 are formed in the common electrode 270.

One set of cutouts 71 to 75 faces the pixel electrode 191 and faces the center cutout 71, the first to third lower diagonal cutouts 72, 73b, and 74b and the first to third cutouts. Upper diagonal cutouts 72, 73b, 74b and a connection 75. Each of the cutouts 71 to 74b is disposed between adjacent cutouts 91, 92, 93, 94a, and 94b of the pixel electrode 191 or between the cutouts 91, 92, 93, 94a and 94b and the pixel electrode 191. It is placed between the chamfered hypotenuses. In addition, each cutout 71 to 74b includes at least one diagonal line extending in parallel with the lower cutouts 92, 93, and 94a or the upper cutouts 92, 93 and 94b of the pixel electrode 191.

The first lower and first upper diagonal cutouts 72 extend from the right side of the pixel electrode 191 to the left side of the pixel electrode 191, and the second lower and second upper diagonal cutouts 73a and 73b. ) Extends from the right side of the pixel electrode 191 to the upper left or lower corner of the pixel electrode 191. The third lower and third upper oblique cutouts 74a and 74b extend from the right side of the pixel electrode 191 to the upper or lower side of the pixel electrode 191, and the third lower and third upper oblique cutouts. It includes a terminal horizontal portion extending while overlapping along the sides of the pixel electrode 191 from each end of (74a, 74b). The longitudinal cross section forms an obtuse angle with the diagonal cutouts 74a and 74b.

The central cutout 71 includes a central horizontal portion and a pair of diagonal lines. The central horizontal portion extends from the right side of the pixel electrode 191 to the left along the storage electrode line 131, and the pair of diagonal portions respectively form the lower and upper diagonal lines toward the left side of the pixel electrode 191 at the end of the central horizontal portion. It extends almost parallel to the incisions 72-74b.

One end of the oblique portion of the center cutout 71 and one end of the second lower cutout 73a of the neighboring pixel electrode, the other end of the oblique portion of the central cutout 71 and the second upper cutout of the neighboring pixel electrode. One end of 73b, one end of the first lower oblique cut 72, one end of the third lower oblique cut 74a of the neighboring pixel electrode, and one end of the first upper oblique cut 72 One end of the third upper oblique cut portion 74b of the neighboring pixel electrode is connected to the connection portion 75, respectively. The connection part 75 is positioned at a portion parallel to the first hypotenuse 90a of the pixel electrode 191 and corresponding to the data line 171. The width of the connection part 75 is about 8 μm wider than the distance between the pixel electrode 191 and the pixel electrode 191, and the extension part 222 of the light blocking member 220 corresponds to the connection part 75. It can be wider than that.

The notch 7 of a triangular shape is formed in the diagonal part of cutouts 71-74b. Such notches may have a rectangular, trapezoidal or semicircular shape and may be convex or concave. This notch determines the alignment direction of the liquid crystal molecules 3 located at the region boundary corresponding to the cutouts 71-74b.

The number and direction of the cutouts 71-75 may also vary according to design elements, and the light blocking member 220 may overlap the cutouts 71 to 75 to block light leakage near the cutouts 71-75. .

In addition, by forming the side of the pixel electrode 191 adjacent to the data line 171 adjacent to each other in a sawtooth shape, the negative electric field formed between the neighboring pixel electrodes 191 has a direction in which the orientation of the liquid crystal in the secondary region is enhanced. do. In addition, the alignment portion 75 may be disposed at a position corresponding to a region where the first hypotenuse 90a of two neighboring pixel electrodes 191 face each other, thereby further enhancing the alignment of the liquid crystal in the subregion.

Alignment layers 11 and 21 are coated on the inner surfaces of the display panels 101 and 201, and polarizers (not shown) are provided on the outer surfaces thereof.

In the liquid crystal display according to the present invention, the vertical portion of the cutout of the common electrode may be removed, and the removed region may be used as the transmission region. In addition, by forming a connection portion corresponding to the gap of the pixel electrode in the common electrode, the negative electric field formed in the gap enhances the alignment of the liquid crystal in the negative area, thereby reducing the texture and forming a liquid crystal display having a high aperture ratio and a high transmittance. have.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. Accordingly, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention.

Claims (52)

Substrate, and A pair of first peripheries formed on the substrate and facing each other, a pair of second peripheries connected to the first periphery and facing each other, and an incision formed at an oblique angle with the first periphery; Pixel electrode / RTI &gt; The second peripheral side of the pixel electrode includes a sawtooth protrusion, The protrusion has a first side having an angle greater than 135 degrees or an angle smaller than 45 degrees with the cutout, and a second side parallel to the cutout, The angle formed by the first side and the second side of the protrusion is less than 45 degrees Display panel. Board, A plurality of gate lines formed on the substrate, A plurality of data lines orthogonal to the gate line, A plurality of thin film transistors connected to the gate line and the data line, and A plurality of pixel electrodes connected to the thin film transistors / RTI &gt; Each of the pixel electrodes, A pair of first peripheral sides parallel to the gate line and facing each other, A pair of second perimeters connected to said first perimeter and facing each other and comprising a serrated protrusion, and Has an incision formed at an oblique angle with the first peripheral, The protrusion has a first side having an angle greater than 135 degrees or an angle smaller than 45 degrees with the cutout, and a second side parallel to the cutout, The angle formed by the first side and the second side of the protrusion is less than 45 degrees Display panel. delete delete delete The method of claim 1 or 2, And a second side of the protrusion is positioned on an extension line of one side of the cutout. The method of claim 1 or 2, The envelope of the protrusion and the first peripheral portion form a rectangle. 8. The method of claim 7, At least one of the corners of the rectangle is chamfered to form a hypotenuse. In claim 8, The rectangular chamfered hypotenuse forms a 45 ° angle with the first peripheral side. 3. The method of claim 2, The protrusion overlaps the data line. 3. The method of claim 2, 2. The display panel of claim 2, wherein the protrusions of the adjacent second peripheral portion of the adjacent pixel electrode are engaged with each other. 12. The method of claim 11, The opposite sides of the protrusions disposed to engage with each other are parallel to each other. delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete

Images