KR20060082315A - Thin film transistor array panel - Google Patents

Abstract

A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate and intersecting the gate lines, a gate electrode connected to the gate line, and a data line. A plurality of thin film transistors including source and drain electrodes, a light blocking member covering at least a portion of the thin film transistor and the gate line, a color filter formed on a substrate not covered by the light blocking member, and It is formed on the color filter, and includes a pixel electrode connected to the drain electrode.

LCD, thin film transistor, data line, light blocking member, color filter

Description

Thin Film Transistor Display Panels {THIN FILM TRANSISTOR ARRAY PANEL}

1 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a layout view illustrating a structure of a common electrode display panel for a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a layout view illustrating a structure of a liquid crystal display according to an exemplary embodiment including the two display panels of FIGS. 1 and 2.

4 is a cross-sectional view of the liquid crystal display of FIG. 3 taken along the line IV-IV ';

FIG. 5 is a cross-sectional view of a liquid crystal display according to another exemplary embodiment, taken along the line IV-IV ′ of FIG. 3.

6 is a layout view illustrating a structure of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view of the liquid crystal display of FIG. 6 taken along the line VII′-VII ′. FIG.

FIG. 8 is a cross-sectional view illustrating a structure of a liquid crystal display according to another exemplary embodiment of the present invention taken along the line VII-VII ′ of FIG. 6.

Explanation of reference numbers                 

11, 21: alignment film 12, 22: polarizing plate

100, 200: display panel 110, 210: insulating substrate

121: gate line 124: gate electrode

131: sustain electrode line 135: sustain electrode

140: gate insulating film 151, 154: semiconductor

161, 163, and 165: ohmic contact members

171: data line 173: source electrode

175: drain electrode 180: protective film

185: contact hole 190: pixel electrode

220, 231: light blocking member 270: common electrode

71: incision 3: liquid crystal layer 310: liquid crystal molecules

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor array panel and to a thin film transistor array panel used as a substrate of a liquid crystal display device.

The liquid crystal display device is one of widely used flat panel display devices and includes a liquid crystal layer interposed between a pair of display panels provided with field-generating electrodes. When an electric field is generated in the liquid crystal layer using the field generating electrode and the intensity of the electric field is changed to change the arrangement of the liquid crystal molecules in the liquid crystal layer, polarization of light passing through the liquid crystal layer is changed. Proper disposition of the polarizing plate based on such polarization can change the transmittance of light.

One measure of the quality of a liquid crystal display is the viewing angle defined by the angle at which the liquid crystal display exhibits a predetermined contrast ratio. Various methods for widening the viewing angle have been developed. Among them, there are methods of aligning liquid crystal molecules vertically and forming cutouts or protrusions on field generating electrodes such as pixel electrodes and common electrodes.

By the way, the incision or the projection lowers the aperture ratio. In order to increase the aperture ratio, an ultra-high opening ratio structure is proposed in which the pixel electrode is formed as wide as possible. Due to this lateral electric field, the alignment of the liquid crystal molecules is disturbed, resulting in texture or light leakage. In order to block such texture and light leakage, the width of the black matrix can be widened. In this case, the aperture ratio is decreased again.

In addition, the pixel electrode and the data line overlap each other in order to secure an ultra-high opening ratio. Even if an insulating film is interposed therebetween, the parasitic capacitance formed between the pixel electrode and the data line becomes large. At this time, in the manufacturing process of the liquid crystal display device, a single glass is divided into a plurality of regions and a photolithography process is performed to pattern multilayer thin films such as gate lines, data lines, and pixel electrodes. Due to the misalignment between the generated layers, the distance or overlapping width between the adjacent pixel electrodes and the data lines is changed. Due to this misalignment, the parasitic capacitance formed between the data line and the pixel electrode varies between the divided regions. Thus, even when the same voltage is applied to the pixel electrode, the pixel voltage of the pixel electrode is actually changed due to the difference in parasitic capacitance, and thus appears as a spot when an image is displayed.

Also, even though an organic film is interposed between the data line and the common electrode, parasitic electric fields are always formed. When the voltage applied to the data line becomes high, the liquid crystal molecules positioned above the data line are affected by the parasitic electric field, thereby causing The brightness is reduced.

In addition, such a liquid crystal display device is formed by laminating and patterning a thin film of a wiring or an insulating film by a photolithography process using a mask. In order to minimize manufacturing costs, it is preferable to minimize the process of forming a thin film.

The technical problem to be achieved by the present invention is to implement a thin film transistor array panel that can secure an ultra-high opening ratio while stabilizing the liquid crystal alignment.

In addition, another technical problem to be achieved by the present invention is to provide a thin film transistor array panel that can prevent spots even when misalignment occurs in the manufacturing process.

In addition, another technical problem to be achieved by the present invention is to provide a thin film transistor array panel that can ensure excellent brightness.

In addition, another technical problem to be achieved by the present invention is to provide a thin film transistor array panel that can minimize the manufacturing cost.

In order to solve this problem, the pixel electrode completely overlaps with the data line in the present invention. In this case, the data line may overlap a pixel electrode of a corresponding pixel column or two pixel electrodes of a neighboring pixel column, and the light blocking member is disposed on the thin film transistor array panel together with the color filter.

A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate and intersecting the gate lines, a gate electrode connected to the gate line, and a data line. A plurality of thin film transistors including source and drain electrodes, a light blocking member covering at least a portion of the thin film transistor and the gate line, a color filter formed on a substrate not covered by the light blocking member, and It is formed on the color filter, and includes a pixel electrode connected to the drain electrode.

It is preferable to further include a protective film formed between the color filter and the light blocking member and the thin film transistor or between the pixel electrode and the color filter and the light blocking member.

The light blocking member may be formed of the same layer as an organic material or a color filter including a black pigment, and the color filter may be formed of red, green, and blue color filters sequentially formed corresponding to the pixel electrodes. In this case, the light blocking member includes at least two or more color filters of red, green, and blue color filters.

The pixel electrode and the color filter are bent near the center line which bisects the gap between two neighboring gate lines, and the data line preferably overlaps with the pixel electrodes on both neighboring sides.

The data line has a bent portion, and the bent portion is preferably located at the center of the bent pixel electrode.

The storage electrode line may further include a storage electrode line having a storage electrode overlapping the drain electrode, and the storage electrode line may be formed between adjacent pixel electrodes to overlap the edge of the pixel electrode.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Next, a thin film transistor array panel and a liquid crystal display including the same according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 4.                     

FIG. 1 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment. FIG. 2 is a layout view illustrating a structure of a common electrode display panel for a liquid crystal display according to an exemplary embodiment. 3 is a layout view illustrating a structure of a liquid crystal display device including the thin film transistor array panel of FIG. 1 and the thin film transistor array panel of FIG. 2, and FIG. 4 is a cross-sectional view taken along line IV-IV ′ of the liquid crystal display of FIG. 3. to be.

The liquid crystal display according to the present exemplary embodiment includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other, and a liquid crystal layer 3 interposed between the two display panels 100 and 200.

First, the thin film transistor array panel 100 will be described in detail with reference to FIGS. 1, 3, and 4.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on the insulating substrate 110.

The gate lines 121 mainly extend in the horizontal direction and are separated from each other, and transmit gate signals. Each gate line 121 includes a plurality of protrusions forming a plurality of gate electrodes 124. The gate line 121 may include an end portion (not shown) having a large area for connecting another layer or an external device.

Each storage electrode line 131 mainly extends in a horizontal direction, and includes a plurality of protrusions constituting the storage electrode 135 and a plurality of oblique portions 133a (oblique portion). The pair of diagonal lines are connected to each other to form a chevron and extend to the neighboring gate line 121. The sustain electrode 135 is rectangular and is positioned near the gate line 121. A predetermined voltage such as a common voltage applied to the common electrode 270 of the common electrode display panel 200 of the liquid crystal display device is applied to the sustain electrode line 131.

The gate line 121 and the storage electrode line 131 may be formed of a silver series or a copper series such as copper (Cu) or a copper alloy, or an aluminum based metal of aluminum or an aluminum alloy, chromium, molybdenum (Mo), molybdenum alloy, or tantalum (Ta). Or titanium (Ti) or the like. In the case of a double membrane, it includes two membranes having different physical properties, that is, a lower layer and an upper layer thereon. The upper layer may have a low resistivity metal such as aluminum (Al) or an aluminum alloy such as aluminum or aluminum alloy to reduce signal delay or voltage drop between the gate line 121 and the storage electrode line 131. ) Or a silver alloy such as a silver alloy, or a copper-based metal such as copper (Cu) or a copper alloy. In contrast, the underlayer is a material having excellent contact properties with other materials, particularly indium tin oxide (ITO) and indium zinc oxide (IZO), such as chromium, molybdenum (Mo), molybdenum alloys, tantalum (Ta), or titanium (Ti) Or the like.

The gate line 121 and the storage electrode line 131 may have a single layer structure or may include three or more conductive layers.

In addition, the side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30-80 °.                     

A gate insulating layer 140 made of silicon nitride (SiN _x ) is formed on the gate line 121 and the storage electrode line 131.

A plurality of island-like semiconductors 154 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si) and the like are formed on the gate insulating layer 140. Each island-like semiconductor 154 is mainly located above the gate electrode 124 and extends over the gate line 121. Each of the island-like semiconductors 154 may extend up to the storage electrode line 131, and may extend in the vertical direction in a linear manner.

On the semiconductor 154, a plurality of island-like ohmic contacts 163 and 165 made of a material such as n + hydrogenated amorphous silicon doped with a high concentration of n-type impurities such as silicide or phosphorus are formed. It is. The island-like ohmic contacts 163 and 165 are paired and disposed on the semiconductor 154.

Side surfaces of the island-like semiconductor 154 and the ohmic contacts 163 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is 30-80 °.

A plurality of data lines 171 and a plurality of drain electrodes 175 are formed on the ohmic contacts 161 and 165 and the gate insulating layer 140, respectively.

The data line 171 mainly extends in the vertical direction and crosses the gate line 121 and the storage electrode line 131 and transmits a data voltage. Each data line 171 may have a wide end () for connecting to another layer or an external device. Each data line 171 includes a plurality of pairs of oblique portions and a plurality of longitudinal portions and is bent periodically. A pair of diagonal lines are connected to each other to form a chevron shape, and both ends thereof are connected to each longitudinal part. The diagonal portion of the data line 171 forms an angle of about ± 45 ° with respect to the gate line 121, and is positioned at the center between two adjacent gate lines 121, and the diagonal portions of the two storage electrode lines 131 ( 133 parallel to, and positioned between them.

Each drain electrode 175 includes a rectangular extension that overlaps one storage electrode 135. The side of the extension of the drain electrode 175 is substantially parallel to the side of the sustain electrode 135. Each vertical portion of the data line 171 includes a plurality of protrusions, and a portion of the vertical portion including the protrusions forms a source electrode 173 partially surrounding one end of the drain electrode 175. One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the semiconductor 154 form one thin film transistor (TFT), and a channel of the thin film transistor. ) Is formed in the semiconductor 154 between the source electrode 173 and the drain electrode 175.

The data line 171 and the drain electrode 175 may also include a conductive film such as molybdenum (Mo), molybdenum alloy, chromium (Cr), or a conductive film such as copper, silver, or aluminum-based metal.

The data line 171 and the drain electrode 175 may have a single layer structure or may include three or more layers.                     

Similar to the gate line 121 and the storage electrode line 131, the data line 171 and the drain electrode 175 are inclined at an angle of about 30-80 °, respectively.

The ohmic contacts 163 and 165 exist only between the semiconductor 154 below and the data line 171 and the drain electrode 175 thereon, and serve to lower the contact resistance.

A first passivation layer made of silicon nitride or silicon oxide having excellent contact characteristics with the semiconductor 154 is disposed on the data line 171 and the drain electrode 175 and the portion of the semiconductor 154 which is not covered with them. 180p) is formed.

A light blocking member 220 extending in the horizontal direction and made of an organic insulating material including a black pigment is formed on the first passivation layer 180p. The light blocking member 220 is formed along the gate line 121 to cover at least a portion of the gate line 121 and the thin film transistor. In the exemplary embodiment of the present invention, the semiconductor line 154 completely covers the gate line 121 and is not completely covered by the source electrode 173 and the drain electrode 175. The light blocking member 220 may be referred to as a black matrix, and may include a portion positioned between the pixel electrodes 190 adjacent to each other to prevent light leakage between the pixel electrodes 190.

In addition, a color filter is formed on the remaining first passivation layer 180p except for the area occupied by the light blocking member 220. The color filters 230R, 230G, and 230B of the red, green, and blue colors are sequentially disposed. Is made of. The color filters 230R, 230G, and 230B are periodically bent between two adjacent gate lines 121 along the oblique portion 133 of the storage electrode line 131, and the red, green, and blue color filters 230R are respectively. , 230G, 230B boundaries are positioned over the oblique portions 133 of the storage electrode lines 131. Each color filter 230R, 230G, and 230B has an opening that exposes the first passivation layer 180p on the drain electrode 175.

On the light blocking member 220 and the color filters 230R, 230G, and 230B, a- is formed by plasma enhanced chemical vapor deposition (PECVD), an organic material having excellent planarization characteristics, and photosensitivity. A second protective film 180q made of a low dielectric constant insulating material such as Si: C: O, a-Si: O: F, or silicon nitride or silicon oxide as an inorganic material is formed. In the present embodiment, a double film structure of the first passivation layer 180p of the inorganic layer and the second passivation layer 180q of the organic layer is formed.

A plurality of contact holes 185 are formed in the first and second passivation layers 180p and 180q to expose the drain electrode 175, respectively. The contact holes 185 are located in the openings. The first and second passivation layers 180p and 180q and the gate insulating layer 140 may have a plurality of contact holes exposing an end portion of the data line 171 and an end portion of the gate line 121. The contact holes 185 may be made in various shapes such as polygons or circles, and the sidewalls of the contact holes 181, 182, and 185 may be inclined or stepped at an angle of 30 ° to 85 °.

A plurality of pixel electrodes 190 made of ITO or IZO is formed on the second passivation layer 180q. A plurality of contact assistants may be formed on the second passivation layer 180q to be connected to ends of the gate line 121 and the data line 171. Alternatively, the pixel electrode 190 may be made of a transparent conductive polymer, and in the case of a reflective liquid crystal display, the pixel electrode 190 may be made of an opaque reflective metal. In this case, the contact assistant member may be made of a material different from the pixel electrode 190, for example, ITO or IZO.

Each pixel electrode 190 has a boundary line parallel to the oblique portion 133 of the storage electrode line 131 to form a chevron shape. The pixel electrode 190 covers the extension portion of the storage electrode line 131 and the drain electrode 175 including the storage electrode 135, and the boundary line of the pixel electrode 190 is disposed on the oblique portion 133 of the storage electrode line 131. Located. In this case, two neighboring pixel electrodes 190 completely cover the data line 171. Therefore, in the structure according to the present embodiment, the data line 171 is completely overlapped with the pixel electrode 190, so that a misalignment occurs between the pixel electrode 190 and the data line 171 during the manufacturing process. The parasitic capacitance formed between the data line 171 and the data line 171 does not change, and the parasitic electric field formed between the data line 171 and the common electrode 270 of the common electrode display panel 200 may be blocked. Therefore, it is possible to prevent unevenness occurring due to the difference in parasitic capacitance when the image is displayed, and to prevent the luminance from decreasing. In addition, since the pixel electrodes 190 of adjacent pixel columns overlap with the data lines 171, parasitic capacitances formed between the pixel electrodes 190 and the data lines 171 can be compensated for each other, thereby providing cross talk. You can minimize cross talk.

The pixel electrode 190 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage therefrom. The pixel electrode 190 to which the data voltage is applied rearranges the liquid crystal molecules 310 of the liquid crystal layer between the two by generating an electric field together with the common electrode 270.

The pixel electrode 190 and the common electrode 270 form a capacitor (hereinafter referred to as a "liquid crystal capacitor") to maintain the applied voltage even after the thin film transistor is turned off. Another capacitor connected in parallel with the liquid crystal capacitor is provided and is called a storage capacitor, which is formed by the superposition of the pixel electrode 190 and the storage electrode line 131, and the capacitance of the storage capacitor, that is, the storage capacitor. In order to increase the distance, the protrusion 135 is disposed on the storage electrode line 131, and the drain electrode 175 connected to the pixel electrode 190 is extended and extended to overlap each other, thereby making the distance between the terminals close and increasing the overlapping area.

The pixel electrode 190 includes a cutout 91 formed in a horizontal direction at a central portion parallel to the gate line 121. In this case, the cutout 91 is positioned at a left side of the pixel electrode 190, which is divided by an oblique line of the data line 171.

Finally, an alignment layer 11 is formed on the pixel electrode 190 and the passivation layer 180.

Now, the common electrode display panel 200 will be described with reference to FIGS. 2 to 4.

A common electrode 270 made of a transparent conductive material such as ITO or IZO is formed on an insulating substrate 210 such as transparent glass. The common electrode 270 receives a common voltage and has a plurality of chevron cuts 71.                     

Each cutout 71 includes a pair of diagonal portions connected to each other, and a horizontal portion connected to the center of the diagonal portion. The slanted portion of the cutout 71 faces in parallel with the slanted portion 133 of the sustain electrode line 131 so as to overlap the slanted portion of the data line 171, and divides the pixel electrode 190 into two halves. It faces the pixel electrode 190. The horizontal portion of the cutout 71 is positioned on the same line as the cutout 91 of the pixel electrode 190 and is positioned on the pixel electrode 190 parallel to the gate line 121. Here, the cutout 71 is used to control the inclination direction of the liquid crystal molecules 310 of the liquid crystal layer 3, and the width of the cutout 71 is about 9 μm to about 12 μm. The cutout 71 may be replaced with a protrusion made of an organic material or the like, wherein the width of the protrusion is between about 5 μm and about 10 μm.

An insulating material is formed on the common electrode 270, and a substrate spacer 280 is formed to uniformly maintain a distance between the thin film transistor array panel 100 and the common electrode display panel 200. In this case, the substrate spacer 280 is positioned above the light blocking member 220 that is planarized.

The horizontal or vertical alignment layer 21 is formed on the common electrode 270.

A pair of polarizers 12 and 22 are attached to the outer surfaces of the display panels 100 and 200, and their transmission axes are perpendicular to one another, and one of the transmission axes is parallel to the gate line 121.

The liquid crystal display may also include at least one phase retardation film for compensating for the phase delay value of the liquid crystal layer 3 and a backlight unit for supplying light to the liquid crystal display.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules 310 of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels 100 and 200 in the absence of an electric field. .

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the pixel electrode 190, a primary electric field substantially perpendicular to the surfaces of the display panels 100 and 200 is generated. The liquid crystal molecules 310 try to change the direction of the long axis perpendicular to the direction of the electric field in response to the electric field. Meanwhile, the cutout 71 of the common electrode 270 and the edge of the pixel electrode 190 distort the main electric field to form a horizontal component that determines the inclination direction of the liquid crystal molecules 310. The horizontal component of the main electric field is perpendicular to the edge of the cutout 71 and the edge of the pixel electrode 190.

Four subregions having different inclination directions are formed in one pixel region of the liquid crystal layer 3 positioned on one pixel electrode 190. These subregions are edges of the pixel electrode 190 and the pixel electrode 190. Is divided into an imaginary transverse centerline passing through the point where the incision 71 and the oblique portion of the incision 71 meet. Each subregion has two peripheries defined by the hypotenuse of the cutout 71 and the pixel electrode 190, and the distance between the peripheries is preferably between about 10 μm and about 30 μm. The number of subregions contained in one pixel region is four if the planar area of the pixel region is less than about 100 µm x 300 µm, or four or eight otherwise. The number of subregions may be changed by changing the number of cutouts 71 of the common electrode 270, by placing a cutout in the pixel electrode 190, or by changing the number of bending points at the edge of the pixel electrode 190. The subregions are classified into a plurality of domains, preferably four domains, according to the inclination direction.                     

On the other hand, the direction of the secondary electric field generated by the voltage difference between the pixel electrode 190 is perpendicular to the edge of the cutout (71). Therefore, the direction of the negative electric field coincides with the direction of the horizontal component of the main electric field. As a result, the negative field between the pixel electrodes 190 acts to strengthen the crystal in the oblique direction of the liquid crystal molecules 310.

Since liquid crystal displays generally use inversion driving methods such as point inversion and thermal inversion, neighboring pixel electrodes receive a voltage having a polarity opposite to a common voltage. Therefore, a negative field almost always occurs and the direction is to help the stability of the domain.

Meanwhile, when the inclination direction of the liquid crystal molecules 310 and the transmission axis of the polarizers 12 and 22 are 45 degrees, the highest luminance can be obtained. In the present embodiment, the inclination direction of the liquid crystal molecules 310 in all domains is the gate line. The gate line 121 is perpendicular or horizontal to the edges of the display panels 100 and 200 at an angle of 45 ° with the 121. Therefore, in the present exemplary embodiment, when the transmission axes of the polarizers 12 and 22 are attached to be perpendicular or parallel to the edges of the display panels 100 and 200, the highest luminance may be obtained and the polarizing plates may be manufactured at low cost.

The resistance of the wiring, which increases as the data line 171 is bent, can be compensated by increasing the width of the data line 171. The increase in the parasitic capacitance caused by the increase in the width of the data line 171, the distortion of the electric field, and the like are the pixels. The size of the electrode 190 may be maximized and supplemented by using a thick organic second protective layer 180q.                     

The liquid crystal display shown in FIGS. 1 to 4 may be changed in various forms.

For example, like the common electrode 270, the pixel electrode 190 may have a cutout (not shown) for generating a fringe field. In addition, the cutout may be replaced with a protrusion located on the common electrode 270 or the pixel electrode 190.

The shape and arrangement of the cutout or protrusion may also vary depending on design factors such as the size of the pixel, the ratio of the horizontal side to the vertical side of the pixel electrode, and the type and characteristics of the liquid crystal layer.

For another example, cutouts and protrusions for controlling the direction in which the molecules of the liquid crystal layer are inclined may not be provided in the pixel electrode 190 and the common electrode 270.

As another example, the liquid crystal layer 300 may have positive dielectric anisotropy and may be oriented in a twisted nematic manner. In the twisted nematic method, the liquid crystal molecules are arranged in parallel to the surfaces of the display panels 100 and 200, and are twisted at approximately right angles from the thin film transistor array panel 100 to the common electrode display panel 200 when there is no electric field. .

As another example, the pixel electrode 190, the data line 171, the linear semiconductor 151, the linear ohmic contact member 161, the light blocking member 220, and the color filters 230R, 230G, and 230B may be bent. It may be straight or rectangular instead of being inclined, inclined, lozenge or parallelogram.

A method of manufacturing the thin film transistor array panel shown in FIGS. 1 to 4 according to an embodiment of the present invention will be described in detail.

First, a conductive film made of chromium, molybdenum or molybdenum alloy or the like or a conductive film made of an aluminum-based metal or a silver-based metal is sputter deposited on the insulating substrate 110 and wet or dry etched to include a plurality of gate electrodes 124. A storage electrode line 131 including a gate line 121, a plurality of storage electrodes 135, and an oblique portion 133 is formed.

Subsequently, a three-layer film of a gate insulating film 140 of about 1,500-5,000 mW, an intrinsic amorphous silicon layer of about 500-2,000 mW, and an impurity amorphous silicon layer of about 300-600 mW is formed. A plurality of island-like impurity semiconductors and a plurality of island-like intrinsic semiconductors 154 are formed on the gate insulating layer 140 by photolithography of the impurity amorphous silicon layer and the intrinsic amorphous silicon layer by successive deposition such as chemical vapor deposition. do.

Subsequently, a conductive film is deposited to a thickness of 1,500 mV to 3,000 mV by sputtering or the like, and then patterned to form a plurality of data lines 171 and a plurality of drain electrodes 175 including the plurality of source electrodes 173. The conductive film is made of chromium, molybdenum or molybdenum alloy, aluminum-based metal or silver-based metal.

Subsequently, the plurality of island-type ohmic contacts 163 and 165 are completed by removing the exposed impurity semiconductor portions that are not covered by the data line 171 and the drain electrode 175, while the portions of the intrinsic semiconductor 154 thereunder. Expose Oxygen plasma is preferably followed by stabilization of the surface of the exposed intrinsic semiconductor 154 portion.

Next, silicon nitride is laminated to form a first passivation layer 190p, a photosensitive organic material including a black pigment is coated, exposed to light by a photo process, and developed to form a light blocking member 220. The light blocking member 220 may be formed by stacking a metal such as chromium or chromium oxide and then patterning the same by a photolithography process using a mask.

Subsequently, color filters 230R, 230G, and 230B are formed on the first passivation layer 180p covered by the light blocking member 220. In this case, the color filters 230R, 230G, and 230B are sequentially formed on the respective pixels, and the color filters 230R, 230G, and 230B are coated with a negative photosensitive organic layer including red, green, and blue pigments. In the process, the organic film is exposed and developed to form sequentially. In this case, a part of the edges of the color filters 230R, 230G, and 230B may overlap the light blocking member 220, and the step generated due to the overlap is preferably 1,000 mW or less.

Subsequently, the second passivation layer 180q made of the photosensitive organic insulator is coated, and then exposed and developed through a photomask to form a plurality of contact holes 185 exposing a portion of the drain electrode 175. In this case, ends of the data line 171 and the gate line 121 may be exposed.

Finally, a plurality of pixel electrodes 190 are formed on the second passivation layer 180q and the drain electrode 175 by stacking and etching an IZO film or an ITO film having a thickness of about 400-500 Å by sputtering.

Meanwhile, in the method of manufacturing the common electrode display panel 200, an IZO film or an ITO film having a thickness of about 400-500 mW is stacked on the insulating substrate 210 by sputtering, and photo-etched to form the common electrode 270.                     

In this case, since the common electrode display panel 200 does not include the color filter and the light blocking member, a process of forming an overcoat may be omitted, thereby minimizing the manufacturing cost of the liquid crystal display.

FIG. 5 is a cross-sectional view taken along line IV-IV 'of FIG. 3 and illustrates a structure of a liquid crystal display according to another exemplary embodiment of the present invention.

As shown in FIG. 5, the liquid crystal display according to the present exemplary embodiment also includes a thin film transistor array panel 100, a common electrode display panel 200, and a liquid crystal layer 3 inserted between the two display panels 100 and 200. do.

Referring to the thin film transistor array panel 100, a plurality of gate lines 121 including a plurality of gate electrodes 124 and a plurality of storage electrode lines 131 including a plurality of storage electrodes 135 are provided on a substrate 110. ), A plurality of semiconductors 154 and a plurality of island type ohmic contact members 163 and 165 are sequentially formed on the gate insulating layer 140 covering them. A plurality of data lines 171 including a plurality of source electrodes 173 and a plurality of drain electrodes 175 including an extension part are formed on the ohmic contacts 163 and 165, and the first passivation layer 180p is formed. The light blocking member 220 and the color filters 230R, 230G, and 230B are formed thereon. A plurality of contact holes 185 are formed in the first passivation layer 180p, and a plurality of pixel electrodes 190 are formed on the passivation layer 180p. Furthermore, the alignment film 11 is formed on these.

Referring to the common electrode display panel 200, the common electrode 270 having the plurality of cutouts 71 and the upper alignment layer 21 are formed on the insulating substrate 210.                     

However, in the present exemplary embodiment, the second passivation layer 180q (refer to FIG. 4) is omitted, and the pixel electrode 190 is formed on the color filters 230R, 230G, and 230B.

A liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 6 and 7.

6 is a layout view illustrating a structure of a liquid crystal display according to another exemplary embodiment. FIG. 7 is a cross-sectional view of the liquid crystal display of FIG. 6 taken along the line VII-VII ′.

6 and 7, the liquid crystal display according to the present exemplary embodiment also includes a thin film transistor array panel 100, a common electrode display panel 200, and a liquid crystal layer 3 inserted between the two display panels 100 and 200. It includes.

The layered structure of the thin film transistor array panel 100 and the common electrode display panel 200 according to the present exemplary embodiment is substantially the same as those of FIGS. 1 to 4.

Referring to the thin film transistor array panel 100, a plurality of gate lines 121 including a plurality of gate electrodes 124 and a plurality of storage electrode lines including a plurality of sustain electrodes 135 and an oblique portion 133 ( 131 is formed on the substrate 110, and a gate insulating layer 140 is formed thereon, and a plurality of semiconductors 154 and a plurality of ohmic contacts 163 and 165 are sequentially formed thereon. A plurality of data lines 171 including a plurality of source electrodes 173 and a plurality of drain electrodes 175 including an extension part are formed on the ohmic contacts 163 and 165, and the first passivation layer 180p is formed. It is formed on it. A plurality of light blocking members 231 and color filters 230R, 230G, and 230B are formed together on the first passivation layer 180p, and a drain electrode is formed on the first passivation layer 180p and the color filters 230R, 230G, and 230B. The contact hole 185 exposing the 175 is formed, and the pixel electrode 190 connected to the drain electrode 175 through the contact hole 185 is formed on the color filters 230R, 230G, and 230B. Furthermore, the alignment film 11 is formed on these.

Referring to the common electrode display panel 200, the common electrode 270 having the plurality of cutouts 71 and the alignment layer 21 are formed on the insulating substrate 210 on the insulating substrate 210.

Unlike the liquid crystal display of FIGS. 1 to 4, the semiconductor 154 formed in the thin film transistor array panel 100 is a protrusion of the linear semiconductor 151 extending along the data line 171, and the resistive contact member ( 163 is also a protrusion of the linear ohmic contact 161. In this case, the ohmic contacts 161 and 165 may have the same shape as the data line 171 and the drain electrode 175 below, and the linear semiconductor 151 may have the data line 171 and the drain electrode 171 and the same. It has almost the same shape as the resistive contact members 161 and 165 below. However, the protrusion 154 has a portion not covered by the data line 171 and the drain electrode 175, such as a portion between the source electrode 173 and the drain electrode 175.

In addition, as shown in FIG. 5, the color filters 230R, 230G, and 230B replace the second protective film.

However, in the present exemplary embodiment, the thin film transistor array panel 100 does not have the light blocking members 220 (see FIGS. 3 and 5), and at least one of the red, green, and blue color filters 230R, 230G, and 230B may include a trench ( 235, and a portion of the rest is filled in the trench to form the light blocking member 231. Specifically, for example, as shown in FIG. 7, the red color filter 230R has a trench 235, and a portion 231G of the blue color filter 230B and the green color filter 230G is formed in the trench 235. , 231G is filled to form the light blocking member 231 with a portion 231R 'of the red color filter 230R.

In the method of manufacturing the thin film transistor array panel according to the exemplary embodiment of the present invention, the data line 171, the drain electrode 175, the semiconductor 151, and the ohmic contacts 161 and 165 are formed in one photo process. .

The photosensitive film pattern used in such a photo process differs in thickness according to a position, and especially includes a 1st part and a 2nd part in order of decreasing thickness. The first part is located in the wiring area occupied by the data line and the drain electrode, and the second part is located in the channel area of the thin film transistor.

There may be various methods of varying the thickness of the photoresist pattern according to the position. For example, a method of providing a translucent area in addition to the transparent area and the light blocking area in the photomask is possible. have. The translucent region is provided with a slit pattern, a lattice pattern, or a thin film having a medium transmittance or a medium thickness. When using the slit pattern, it is preferable that the width of the slits and the interval between the slits are smaller than the resolution of the exposure machine used for the photographic process. Another example is to use a photoresist film that can be reflowed. That is, a thin portion is formed by forming a reflowable photoresist pattern with a normal exposure mask having only a transparent region and a light shielding region and then reflowing to allow the photoresist film to flow down into a region where no residue is left.

In this way, a one-time photographic process can be reduced, thereby simplifying the manufacturing method.

Many features of the liquid crystal display of FIGS. 1 to 4 described above may also be applied to the liquid crystal display of FIGS. 6 and 7.

A liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIG. 8.

FIG. 8 is a cross-sectional view of the liquid crystal display according to the exemplary embodiment of the present invention taken along the line VII-VII ′ of FIG. 6.

Referring to FIG. 8, the thin film transistor array panel according to the present exemplary embodiment is substantially the same as that of FIGS. 1 to 4.

Referring to the thin film transistor array panel 100, a plurality of gate lines 121 including a plurality of gate electrodes 124 and a plurality of storage electrode lines including a plurality of sustain electrodes 135 and an oblique portion 133 ( 131 is formed on the substrate 110, and the gate insulating layer 140 is formed thereon, and the plurality of island-like semiconductors 154 and the island-like ohmic contacts 163 and 165 are sequentially formed thereon. . A plurality of data lines 171 including a plurality of source electrodes 173 and a plurality of drain electrodes 175 including an extension part are formed thereon, and a plurality of light blocking members 231 are disposed on the first passivation layer 180p. And color filters 230R, 230G, and 230B are formed together, and a second passivation layer 180q is formed on the color filters 230R, 230G, and 230B, and a drain electrode 175 is formed thereon through the contact hole 185. ) Is connected to the pixel electrode 190. Furthermore, the alignment film 11 is formed on these.

Referring to the common electrode display panel 200, the common electrode 270 having the plurality of cutouts 71 and the alignment layer 21 are formed on the insulating substrate 210 on the insulating substrate 210.

Unlike the liquid crystal display of FIGS. 1 to 4, the thin film transistor array panel 100 does not have light blocking members 220 (see FIGS. 3 and 5), and red, green, and blue color filters 230R, 230G, and 230B. At least one has a trench 235, a portion of the rest is filled in the trench to form the light blocking member 231. Specifically, for example, as shown in FIG. 8, the red color filter 230R has a trench 235, and a portion 231G of the blue color filter 230B and the green color filter 230G is formed in the trench 235. , 231G is filled to form the light blocking member 231 with a portion 231R 'of the red color filter 230R.

As described above, in the exemplary embodiment of the present invention, the data line is completely overlapped with the pixel electrode to remove the parasitic capacitance formed therebetween, and the two neighboring pixel electrodes and the data line are overlapped together so that the spot and cross It is possible to prevent the occurrence of torque and to prevent the luminance from decreasing.

In addition, the boundary between the pixel electrode and the data line is parallel to the boundary between the domains, and the data line overlapping the pixel electrode overlaps with the cutout portion, thereby securing an ultra-high opening ratio while stabilizing the liquid crystal alignment.                     

In addition, the color filter and the light blocking member may be disposed on the thin film transistor array panel to minimize the manufacturing cost of the liquid crystal display.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

Claims (12)

Board, A plurality of gate lines formed on the substrate, A plurality of data lines formed on the substrate and crossing the gate lines; A plurality of thin film transistors including a gate electrode connected to the gate line, a source electrode and a drain electrode connected to the data line; A light blocking member formed along the gate line and covering at least a portion of the thin film transistor and the gate line, A color filter formed on the substrate not covered by the light blocking member; and A pixel electrode formed on the color filter and connected to the drain electrode Thin film transistor array panel comprising a. In claim 1, And a passivation layer formed between the color filter and the light blocking member and the thin film transistor. In claim 1, And a passivation layer formed between the pixel electrode, the color filter, and the light blocking member. In claim 1, The light blocking member is a thin film transistor array panel made of an organic material including a black pigment. In claim 1, The light blocking member is formed of the same layer as the color filter. In claim 5, And the color filter comprises red, green, and blue color filters sequentially formed corresponding to the pixel electrodes. In claim 6, The light blocking member may include at least two color filters among red, green, and blue color filters. In claim 1, And the pixel electrode and the color filter are bent near a center line which bisects a gap between two neighboring gate lines. In claim 1, And the data line overlaps the pixel electrodes on both sides adjacent to each other. In claim 1, The data line has a bent portion, wherein the bent portion is positioned at the center of the bent pixel electrode. In claim 1, And a storage electrode line having a storage electrode overlapping the drain electrode. In claim 11, And the sustain electrode line is formed between the adjacent pixel electrodes and overlaps an edge of the pixel electrode.

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