KR20060080763A - Liquid crystal display - Google Patents

Abstract

The liquid crystal display according to the exemplary embodiment of the present invention includes a first electrode, a first signal line, a second signal line insulated from and intersecting the first signal line, a pixel electrode and a first signal line formed in each pixel area surrounded by the first signal line and the second signal line. 2 signal lines, a first display panel including a thin film transistor having three terminals connected to the pixel electrode, a second display panel having a common electrode facing the pixel electrode, a liquid crystal layer formed between the first display panel and the second display panel, and a first display panel. A domain dividing means formed on the display panel or the second display panel and dividing the upper and lower half surfaces of the pixel electrode into a plurality of regions, each of which is divided into a center line parallel to the first signal line, and formed on the first display panel and the second display panel, respectively. And first and second electric field control means overlapping each other and arranged in parallel with the domain dividing means in the center of the region.

Transmittance, discretization, response speed, aperture, domain

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a layout view of a common electrode panel for a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a layout view of a structure of a liquid crystal display including the display panel of FIGS. 1 and 2;

4 and 5 are cross-sectional views of the liquid crystal display of FIG. 3 taken along lines IV-IV 'and V-V', respectively.

6 is a schematic diagram showing in detail the structure of the cutout and the liquid crystal molecules in the liquid crystal display according to the embodiment of the present invention;

7 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display according to another exemplary embodiment of the present invention.

8 is a layout view illustrating a structure of a common electrode display panel for a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 9 is a layout view illustrating a structure of a liquid crystal display including two display panels of FIGS. 7 and 8.                 

FIG. 10 is a cross-sectional view of the liquid crystal display of FIG. 9 taken along the line X-X ', and FIG.

FIG. 11 is a schematic view showing in detail the structure of a cutout and a liquid crystal molecule in a liquid crystal display according to another exemplary embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device in which a pixel is divided into a plurality of domains in order to obtain a wide viewing angle.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two display panels on which field generating electrodes such as a pixel electrode and a common electrode are formed, and a liquid crystal layer interposed therebetween. Is applied to generate an electric field in the liquid crystal layer, thereby determining the orientation of liquid crystal molecules in the liquid crystal layer and controlling the polarization of incident light to display an image.

Among them, the vertical alignment mode liquid crystal display in which the long axis of the liquid crystal molecules are arranged perpendicular to the upper and lower display panels without an electric field applied to the display panel is high in contrast ratio and easy to implement a wide viewing angle.

Means for implementing a wide viewing angle in a vertical alignment mode liquid crystal display include a method of forming a cutout in the field generating electrode and a method of forming a protrusion on the field generating electrode. Since the inclination and the projection can determine the direction in which the liquid crystal molecules are inclined, the wide viewing angle can be secured by dispersing the inclination directions of the liquid crystal molecules in various directions.

However, at the center of the projection or incision pattern, the liquid crystal molecules are arranged and the liquid crystal array is broken so that the arrangement of the liquid crystal molecules is discontinuous, which causes disclination, which causes the pixel transmittance to be reduced or changed irregularly. This decreases or decreases the response speed, resulting in problems such as afterimages.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a liquid crystal display device capable of reliably securing a pixel to maximize a numerical aperture and improving a response speed of a liquid crystal.

In order to solve this problem, the electric field control means of a pixel electrode and a common electrode overlaps each other in this invention.

The liquid crystal display according to the exemplary embodiment of the present invention includes a first electrode, a first signal line, a second signal line insulated from and intersecting the first signal line, a pixel electrode and a first signal line formed in each pixel area surrounded by the first signal line and the second signal line. 2 signal lines, a first display panel including a thin film transistor having three terminals connected to the pixel electrode, a second display panel having a common electrode facing the pixel electrode, a liquid crystal layer formed between the first display panel and the second display panel, and a first display panel. A domain dividing means formed on the display panel or the second display panel and dividing the upper and lower half surfaces of the pixel electrode into a plurality of regions, each of which is divided into a center line parallel to the first signal line, and formed on the first display panel and the second display panel, respectively. And first and second electric field control means overlapping each other and arranged in parallel with the domain dividing means in the center of the region.

The domain dividing means is formed on the first display panel, and the first electric field control means may be disposed farther from the domain dividing means than the second electric field control means.

At this time, the boundary line of the second electric field control means far from the domain dividing means is located in the two boundary lines of the first electric field control means, and the distance between the boundary line of the first electric field means and the second electric field control means far from the domain dividing means is the domain division. Preferably, the distance between the boundary line of the second electric field means far from the means and the boundary line of the first electric field control means adjacent to the domain dividing means is preferred. Preferably, the domain dividing means or the first and second electric field control means are cutouts of the common electrode or the pixel electrode, or boundaries of the pixel electrodes parallel to the cutouts.

The domain dividing means is formed on the second display panel, and the first electric field control means may be disposed closer to the domain dividing means than the second electric field control means. The boundary of the first electric field control means far from the domain dividing means is located in two boundaries of the second electric field control means, and the distance between the boundary of the first electric field means and the second electric field control means far from the domain dividing means is from the domain dividing means. It is preferred to be smaller than the distance between the boundary of the distant first electric field means and the boundary of the second electric field control means adjacent to the domain division means.

Preferably, the domain dividing means or the first and second electric field control means is a boundary between the common electrode or the pixel electrode parallel to the cutout or cutout of the pixel electrode.

It is preferable that the domain dividing means is substantially ± 45 degrees with respect to the first signal line, and the domain dividing means is substantially mirror-symmetrical with respect to the upper and lower bisectors of the pixel.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Next, a display panel according to an exemplary embodiment of the present invention and a multi-domain liquid crystal display including the same will be described with reference to the drawings.

FIG. 1 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment. FIG. 2 is a layout view illustrating a structure of a common electrode display panel for a liquid crystal display according to an exemplary embodiment. 3 is a layout view illustrating a structure of a liquid crystal display according to an exemplary embodiment in which the display panels of FIGS. 1 and 2 are aligned, and FIGS. 4 and 5 are IV- of the liquid crystal display of FIG. 3. FIG. 6 is a cross-sectional view taken along line IV ′ and line VV ′, and FIG. 6 is a schematic diagram illustrating an arrangement structure of cutouts and liquid crystal molecules in the liquid crystal display according to the exemplary embodiment of the present invention.

The liquid crystal display according to the exemplary embodiment of the present invention includes a thin film transistor array panel 100, a common electrode display panel 200, and a liquid crystal layer 3 interposed between the two display panels 100 and 200.

First, the thin film transistor array panel 100 will be described in detail with reference to FIGS. 1 and 3 to 5.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on the insulating substrate 110 to transmit the gate signals.

The gate lines 121 mainly extend in the horizontal direction and are separated from each other, and transmit gate signals. Each gate line 121 has an end portion 129 having a large area for connection between a protrusion forming a plurality of gate electrodes 124 and another layer or an external device.

Each storage electrode line 131 extends in the horizontal direction and includes a plurality of sets of branches forming the first to fourth storage electrodes 133a, 133b, 133c, and 133d. The first storage electrode 133a and the second storage electrode 133b extend in the vertical direction, and the third and fourth storage electrodes 133c and 133d extend in an oblique direction and are disposed at both ends of the second storage electrode 133b. The first sustain electrode 133a is connected to and adjacent to each other. The third and fourth sustain electrodes 133c and 133d have inverted symmetry with respect to the center line between two adjacent gate lines 121. A predetermined voltage such as a common voltage applied to the common electrode 270 of the common electrode display panel 200 of the liquid crystal display device is applied to the sustain electrode line 131. The storage electrode line 131 includes a connection portion 133e that connects a pair of adjacent first to fourth storage electrodes 133a, 133b, 133c, and 133d to each other.

The gate line 121 and the storage electrode line 131 are preferably made of aluminum-based metal, silver-based metal, copper-based metal, molybdenum-based metal, chromium, titanium, tantalum, or the like, and have a single film structure or a multilayer film structure. Can be. It may include a multilayer film, for example, two films of different physical properties, that is, a lower film and an upper film thereon. One conductive film is a low resistivity metal such as aluminum (Al) or an aluminum alloy such as aluminum (Ag) or a silver alloy such as silver (Ag) or silver alloy to reduce signal delay or voltage drop. It may be made of a copper-based metal such as copper (Cu) or a copper alloy. In contrast, other conductive films have excellent contact properties with other materials, particularly indium tin oxide (ITO) and indium zinc oxide (IZO), such as chromium, molybdenum (Mo), molybdenum alloys, tantalum (Ta), or titanium (Ti). ) And the like. Good examples of the two conductive films include chromium / aluminum-neodymium (Nd) alloys or molybdenum or molybdenum alloys / aluminum alloys.

In addition, the side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30-80 °.                     

A gate insulating layer 140 made of silicon nitride (SiN _x ) is formed on the gate line 121 and the storage electrode line 131.

A plurality of linear semiconductors 151 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si) and the like are formed on the gate insulating layer 140. Each linear semiconductor 151 extends mainly in the longitudinal direction from which a plurality of protrusions 154 extend toward the gate electrode 124. The protrusion 154 extends to an upper portion of the gate line 121 and the storage electrode line 131. The linear semiconductor 151 preferably extends wide under the data line 171 through which the connection portion 133e of the storage electrode line 131 passes to completely cover a portion of the storage electrode line 131.

A plurality of linear and island ohmic contacts 161 and 165 made of a material such as n + hydrogenated amorphous silicon doped with a high concentration of n-type impurities such as silicide or phosphorus on the semiconductor 151. Is formed. The linear contact member 161 has a plurality of protrusions 163, and the protrusions 163 and the island-like resistive contact members 165 are paired and disposed on the semiconductor 154, centered on the gate electrode 124. Face each other.

Side surfaces of the semiconductor 151 and the ohmic contacts 161 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is preferably 30 to 80 °.

A plurality of data lines 171 and a plurality of drain electrodes 175 separated therefrom are formed on the ohmic contacts 161 and 165 and the gate insulating layer 140, respectively.

The data line 171 mainly extends in the vertical direction and crosses the gate line 121 and the storage electrode line 131 and transmits a data voltage. Each data line 171 has a wide end portion 179 for connection with another layer or an external device.

Each drain electrode 175 includes an extension that extends wide. Each of the data lines 171 includes a plurality of protrusions, which are bent to partially surround one end portion of the drain electrode 175 positioned on the semiconductor 154 to form the source electrode 173. One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the protrusion 154 of the semiconductor form one thin film transistor (TFT), and a channel of the thin film transistor. A channel is formed in the protrusion 154 between the source electrode 173 and the drain electrode 175.

In addition, a plurality of under-bridge metal pieces 178 positioned on the gate line 121 are formed on the same layer as the data line 171. 121 and overlapped with each other.

The data line 171 and the drain electrode 175 also include a conductive material constituting the gate line 121, and preferably include a refractory metal such as chromium or molybdenum-based metal, tantalum and titanium, and a lower portion of the refractory metal. It may have a multilayer structure consisting of a film (not shown) and an upper film (not shown) of a low resistance material disposed thereon.                     

Similar to the gate line 121 and the storage electrode line 131, the data line 171 and the drain electrode 175 are inclined at an angle of about 30-80 °, respectively.

The ohmic contacts 161 and 165 exist only between the semiconductor 151 below and the data line 171 and the drain electrode 175 above and serve to lower the contact resistance. The linear semiconductor 151 has a portion exposed between the source electrode 173 and the drain electrode 175 and not covered by the data line 171 and the drain electrode 175.

A passivation layer 180 is formed on the data line 171 and the drain electrode 175 and the portion of the semiconductor 151 that is not covered by them. The passivation layer 180 is a-Si: C: O, a-Si: O: F, which is formed of an organic material having excellent planarization characteristics and photosensitivity, and plasma enhanced chemical vapor deposition (PECVD). The low dielectric constant insulating material of 4.0 or less, or an inorganic material, such as silicon nitride and silicon oxide, is preferable.

The passivation layer 180 is formed with a plurality of contact holes 182 and 185 respectively exposing the extension portion of the drain electrode 175 and the end portion 179 of the data line 171, and the gate insulating layer 140. ), A plurality of contact holes 181, 183a, and 183b exposing a portion of the end portion 129 of the gate line 121 and the sustain electrode line 131 are formed. The contact holes 181, 182, 183a, 183b, and 185 may be made in various shapes such as polygons or circles. Sidewalls of the contact holes 181, 182, 183a, 183b, 185 may be inclined or stepped at an angle of 30 ° to 85 °.

A plurality of pixel electrodes 190, sustain electrode line connecting legs 83, and a plurality of contact assistants 81 and 82 made of ITO or IZO are formed on the passivation layer 180. Alternatively, the pixel electrode 190 may be made of a transparent conductive polymer, and in the case of a reflective liquid crystal display, the pixel electrode 190 may be made of an opaque reflective metal. In this case, the contact assistants 81 and 82 may be made of a material different from that of the pixel electrode 190, for example, ITO or IZO.

The storage electrode line connecting leg 83 crosses the gate line 121 and the source electrode 173, and is disposed on the opposite side of the first storage electrode with the gate line 121 interposed therebetween through the contact holes 183a and 183b. It is connected to the exposed end of 133a and the exposed part of sustain electrode line 131. The sustain electrode lines 131 including the sustain electrodes 133a and 133b can be used to repair the defects of the sustain electrode line connecting leg 83 and the metal piece 178 and the gate line 121 or the data line 171 or the thin film transistor. have. When the gate line 121 is repaired, the gate line 121 is electrically connected to the gate line 121 and the storage electrode line connecting leg 83 by laser irradiation at the intersection of the gate line 121 and the storage electrode line connecting leg 83. ) And the storage electrode line 131 are electrically connected to each other. At this time, the metal piece 178 strengthens the electrical connection between the gate line 121 and the sustain wiring connecting bridge 83.

The pixel electrode 190 is physically and electrically connected to the drain electrode 175 through the contact hole 185 to receive a data voltage from the drain electrode 175.

The pixel electrode 190 to which the data voltage is applied rearranges the liquid crystal molecules 310 of the liquid crystal layer 3 by generating an electric field together with the common electrode 270.                     

The pixel electrode 190 and the common electrode 270 form a capacitor (hereinafter referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off. There is another capacitor connected in parallel with the liquid crystal capacitor, which is called a storage capacitor. The storage capacitor is formed by overlapping the pixel electrode 190 and the storage electrode line 131. The storage electrodes 133a, 133b, and 133c are disposed on the storage electrode line 131 to increase the capacitance of the storage capacitor, that is, the storage capacitance. Put it. Although not shown in the drawing, the drain electrode 175 connected to the pixel electrode 190 extends and extends to overlap the storage electrode 131 so that the distance between the terminals of the storage capacitor is close and the overlapping area can be increased.

Each pixel electrode 190 is chamfered at the left corner, and the chamfered hypotenuse forms an angle of about 45 degrees with respect to the gate line 121.

The pixel electrode 190 has a central cutout 91, 92, a lower cutout 93a, 94a, and an upper cutout 93b, 94b, and the pixel electrode 190 has these cutouts 91, 92, 93a. , 93b, 94a, and 94b are divided into a plurality of regions. The cutouts 91, 92, 93a, 93b, 94a, and 94b have almost inverted symmetry with respect to a horizontal centerline that bisects the pixel electrode 190 in parallel with the gate line 121.

The lower and upper cutouts 93a, 93b, 94a, and 94b extend obliquely from the right side to the left side of the pixel electrode 190, respectively, on the lower half and the upper half of the horizontal center line of the pixel electrode 190. Is located. The lower and upper cutouts 93a, 93b, 94a, and 94b extend perpendicularly to each other at an angle of about 45 degrees with respect to the gate line 121.

One central cutout 91 is disposed at the center of the pixel electrode 190 and has an inlet at the right side. The inlet of the central incision 91 has a pair of hypotenuses substantially parallel to the lower incision 92a and the upper incision 92b, respectively. The other central cutout 92 is formed on the lower half and the upper half of the pixel electrode 190 so that two obliquely extending cut portions are connected to each other to form a “<” shape.

Accordingly, the lower half of the pixel electrode is divided into two regions by the lower cutout 93a, and the upper half is also divided into two regions by the upper cutout 93b, and the remaining lower and upper cutouts 92, 94a and 94b are located approximately at the center of the two divided regions, respectively. In this case, the number of regions or the number of cutouts may vary depending on the size of the pixel, the ratio of the length of the horizontal side and the vertical side of the pixel electrode, the type and characteristics of the liquid crystal layer 3, and the inclination direction may also vary.

The contact auxiliary members 81 and 82 are connected to the end portions 129 and 179 of the data line 171 and the gate line 121 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 complement and protect the adhesion between the end portions 179 and 129 of the data line 171 and the gate line 121 and the external device.

Next, the common electrode display panel 200 will be described with reference to FIGS. 2 to 5.

The light blocking member 220 is formed on the insulating substrate 210 made of transparent glass or the like. The light blocking member 220 has a plurality of openings 225 facing the pixel electrode 190 and having substantially the same shape as the pixel electrode 190, and corresponding to the gate line 121 and the data line 171. It is preferable that the portion and the portion correspond to the thin film transistor.

A plurality of color filters 230 are also formed on the substrate 210 and are mostly located in an area surrounded by the light blocking member 230. The color filter 230 may extend in the vertical direction along the pixel electrode 190. The color filter 230 may display one of primary colors such as red, green, and blue.

An overcoat 250 is formed on the color filter 230.

The common electrode 270 formed of a transparent conductor such as ITO or IZO is formed on the overcoat 250.

The common electrode 270 has a plurality of sets of cutouts 71, 72a, and 72b.

The pair of cutouts 71, 72a, and 72b face the one pixel electrode 190 and include a center cutout 71, a lower cutout 72a, and an upper cutout 72b. In this case, the center cutout 71 of the common electrode 270 partially overlaps the center cutout 92 of the pixel electrode 190, and the upper and lower cutouts 72a and 72b of the common electrode 270 are pixels. It partially overlaps the upper and lower cutouts 94a and 94b of the electrode 190 and is positioned between the cutouts 93a and 93b and the chamfered hypotenuse of the pixel electrode 190. In addition, each cutout 71, 72a, and 72b includes at least one diagonal line extending in parallel with the lower cutout 94a or the upper cutout 94b of the pixel electrode.

Each of the lower and upper cutouts 72a and 72b extends from the left side of the pixel electrode toward the top or bottom side and overlaps the side along the side of the pixel electrode from each end of the diagonal line. It includes a horizontal portion and a vertical portion forming an obtuse angle.

The central cutout 71 is a central horizontal portion extending from the left side of the pixel electrode in the horizontal direction, a pair of diagonal portions extending toward the right side of the pixel electrode at an oblique angle with the central horizontal portion at the end of the central horizontal portion, and From each end of the oblique portion, it extends overlapping with the right side along the right side of the pixel electrode and includes a vertical longitudinal portion forming an obtuse angle with the oblique portion.

In this case, the cutouts 71, 72a, and 72b of the common electrode 270 may be formed between the cutouts 91, 94a and 94b of the pixel electrode 190 or the chamfers of the cutouts 93a and 93b and the pixel electrode 190. Disposed between the hypotenuses and overlapping portions 92, 94a, and 94b of the cutouts of the pixel electrode 190. Diagonal boundaries of the cutouts 71, 72a, and 72b of the common electrode 270 located far from the cutouts 93a and 93b that divide the upper and lower half surfaces of the pixel electrode 190 into two regions are divided. It is exposed through the cutouts 92, 94a and 94b of the pixel electrode 190 respectively positioned at the center of the region. As shown in FIG. 6, the incisions 71, 72a, 72b exposed through the boundaries of the incisions 92, 94a, 94b and the incisions 92, 94a, 94b located away from the center of the two divided regions. The spacing a between the boundaries of the cutouts 71, 72a is revealed through the boundaries of the cutouts 92, 94a, 94b and the cutouts 92, 94a, 94b positioned adjacent to the centers of the two divided regions. , It is preferable that the distance b between the boundaries of 72b is smaller than the interval b.

The number and direction of the cutouts 71, 72a, and 72b may also vary depending on the design element, and the light blocking member 220 overlaps the cutouts 71, 72a and 72b to cut the cuts 71, 72a and 72b. Can block nearby light leaks.

Vertical alignment layers 11 and 21 are coated on the inner surfaces of the two display panels 100 and 200, respectively, and polarizers 12 and 22 are provided on the outer surfaces thereof. The transmission axes of the two polarizing plates 12 and 22 are orthogonal, and one transmission axis is parallel to the gate line 121. In the case of a reflective liquid crystal display, one of the two polarizing plates 12 and 22 may be omitted.

The alignment layers 11 and 21 may be horizontal alignment layers.

A phase retardation film may be interposed between the display panels 100 and 200 and the polarizers 12 and 22 to compensate for the delay value of the liquid crystal layer 3, respectively. The phase retardation film has birefringence and serves to reversely compensate for the birefringence of the liquid crystal layer 3. As the retardation film, a uniaxial or biaxial optical film can be used, and in particular, a negative uniaxial optical film can be used.

The liquid crystal display may also include a polarizer 12 and 22, a phase retardation film, display panels 100 and 200, and a backlight unit for supplying light to the liquid crystal layer 3.

An insulating material may be formed between the thin film transistor array panel 100 and the common electrode display panel 200, and a substrate spacer (not shown) may be formed to maintain a constant gap between the two display panels 100 and 200.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules 310 of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels in the absence of an electric field. Therefore, incident light does not pass through the quadrature polarizers 12 and 22 and is blocked.                     

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the pixel electrode 190, an electric field almost perpendicular to the surface of the display panel is generated. The liquid crystal molecules 310 try to change the direction of the long axis perpendicular to the direction of the electric field in response to the electric field. Meanwhile, the hypotenuses of the cutouts 71, 72a, 72b, 91, 92, 93a, 93b, 94a, and 94b of the common electrode 270 and the pixel electrode 190, and the pixel electrode 190 parallel to them, form an electric field. Distortion produces horizontal components that determine the tilt direction of liquid crystal molecules. The horizontal component of the electric field is perpendicular to the sides of the cutouts 71, 72a, 72b, 91, 92, 93a, 93b, 94a, 94b and the hypotenuse of the pixel electrode 190.

Through these electric fields, the cutouts 71, 72a, 72b, 91, 92, 93a, 93b, 94a, and 94b control the direction in which the liquid crystal molecules of the liquid crystal layer 3 are inclined. In this case, the liquid crystal molecules 310 are inclined in opposite directions as shown in FIG. 6 by an electric field by the cutouts 93a and 93b that divide the pixel electrode 190 into two regions, respectively. Lose. However, the cutouts 71, 72a and 72b of the common electrode 270 overlap with the cutout portions 92, 94a and 94b of the pixel electrode 190, and are cut away from the center of the divided two regions. The spacing (a) between the boundary line of (92, 94a, 94b) and the boundary of the incisions (71, 72a, 72b) exposed through the incisions (92, 94a, 94b) is located adjacent to the center of the two divided regions 6 is smaller than the interval b between the boundary line of the cutouts 92, 94a and 94b and the boundary between the cutouts 71, 72a and 72b exposed through the cutouts 92, 94a and 94b. As described above, the liquid crystal molecules 310 are continuously inclined in the same direction as the inclined direction due to the electric fields of the cutouts 93a and 93b. Accordingly, the liquid crystal molecules in each of the domains defined by the cutouts 93a and 93b and the left hypotenuse of the pixel electrode 190 are opposite to each other with respect to the cutouts 93a and 93b and the cutouts 93a and 93b. It is inclined in a direction perpendicular to the longitudinal direction of the. The two longest sides of each domain are substantially parallel to each other, and form approximately ± 45 degrees with the gate line 121, and most of the liquid crystal molecules in the domain are inclined in four directions.

Therefore, in the liquid crystal display according to the exemplary embodiment of the present invention, the liquid crystals may be formed by overlapping the cut portions 71, 72a and 72b of the common electrode 270 to the cut portions 92, 94a and 94b of the pixel electrode 190. It is possible to minimize the formation of an interface where the molecules 310 are arranged in opposite directions. Therefore, it is possible to minimize the occurrence of the discrimination, thereby stably securing the transmittance of the pixel, maximizing the aperture ratio, and improving the response speed of the liquid crystal molecules 310.

In addition, in the liquid crystal display according to the exemplary embodiment of the present invention, the liquid crystal molecules 310 are inclined in four different directions within each domain to extend the viewing angle.

The width of the cutouts 91, 92a, 92b, 71, 72a, 72b is preferably about 9 μm to about 12 μm.

At least one cutout 91, 92a, 92b, 71, 72a, 72b may be replaced with a protrusion (not shown) or a depression (not shown). The protrusions may be made of organic or inorganic materials and may be disposed above or below the field generating electrodes 190 and 270, and the width thereof is preferably about 5 μm to about 10 μm.

The shape and arrangement of the incisions 91, 92, 93a, 93b, 94a, 94b, 71, 72a, 72b can be modified.

Meanwhile, when the inclination direction of the liquid crystal molecules 310 and the transmission axis of the polarizers 12 and 22 are 45 degrees, the highest luminance can be obtained. In the present embodiment, the inclination direction of the liquid crystal molecules 310 in all domains is the gate line. The gate line 121 is perpendicular or horizontal to the edges of the display panels 100 and 200 at an angle of 45 ° with the 121. Therefore, in the present exemplary embodiment, when the transmission axes of the polarizers 12 and 22 are attached to be perpendicular or parallel to the edges of the display panels 100 and 200, the highest luminance can be obtained and the polarizers 12 and 22 can be manufactured at low cost. Can be.

7 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display according to another exemplary embodiment. FIG. 8 is a layout view illustrating a structure of a common electrode display panel for a liquid crystal display according to another exemplary embodiment. 9 is a layout view illustrating a structure of a liquid crystal display device including the two display panels of FIGS. 7 and 8, and FIG. 10 is a cross-sectional view of the liquid crystal display of FIG. 9 taken along a line XX ′, respectively. FIG. 11 is a schematic view showing in detail the structure of a cutout and a liquid crystal molecule in a liquid crystal display according to another exemplary embodiment of the present invention.

The liquid crystal display according to the present embodiment also includes the thin film transistor array panel 100, the common electrode display panel 200, and the liquid crystal layer 3 and the two display panels 100 and 200 inserted between the two display panels 100 and 200. It includes a pair of polarizers 12 and 22 attached to the outer surface.

The layered structures of the display panels 100 and 200 according to the present exemplary embodiment are substantially the same as those of FIGS. 1 to 6.                     

Referring to the thin film transistor array panel 100, the plurality of gate lines 121 including the gate electrode 124, the first to fourth sustain electrodes 133a, 133b, 133c, and 133d and the connecting portion 133e are respectively described. A plurality of storage electrode lines 131 are formed on the substrate 110, and the plurality of linear electrodes including the gate insulating layer 140, the linear semiconductor 151 including the protrusion 154, and the protrusion 163 thereon. The ohmic contact 161 and the plurality of islands of ohmic contact 165 are sequentially formed. A plurality of data lines 171 including a source electrode 173, a plurality of drain electrodes 175, and a plurality of metal pieces 178 are formed on the ohmic contacts 161 and 165, and the protective film 180 is formed thereon. A plurality of contact holes 181, 182, 183a, 183b, and 185 are formed in the passivation layer 180 and the gate insulating layer 140. A plurality of pixel electrodes 190, sustain electrode line connecting legs 83, and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer 180, and an alignment layer 11 is coated thereon.

Referring to the common electrode display panel 200, the light blocking member 220, the plurality of color filters 230, the overcoat 250, the common electrode 270, and the alignment layer 21 are formed on the insulating substrate 210. have.

However, the semiconductor 151 has a planar shape substantially the same as the data line 171, the drain electrode 175, and the ohmic contacts 161 and 165, except for the protrusion 154 where the thin film transistor is located. Have. In detail, the linear semiconductor 151 may include the source electrode 173 and the drain electrode 175 in addition to the data line 171, the drain electrode 175, and the portions below the ohmic contacts 161 and 165. ) Has an exposed portion between them.

In addition, unlike the previous embodiment, the pixel electrode 190 has a central cutout 91 and upper and lower cutouts 92a and 92b, and the common electrode 270 has a central cutout 71, 72, and 73. And upper and lower incisions 74a and 74b. In this case, each of the upper and lower half surfaces of the pixel electrode 190 is divided into two regions, and the domain restricting means defining the domain together with the hypotenuse of the pixel electrode 190 is a central cut portion 73 of the common electrode 270. In the center of the divided regions, the cutouts 91, 92a and 92b of the pixel electrode 190 and the oblique portions of the cutouts 72, 74a and 74b of the common electrode 270 overlap each other.

In the liquid crystal display according to the present exemplary embodiment, as shown in FIG. 11, the liquid crystal molecules are arranged in opposite directions by an electric field (dotted line) formed by the cutout 73 of the common electrode 270. The cutouts 72, 74a and 74b of 270 and the portions 91, 92a and 92b of the cutouts of the pixel electrode 190 overlap with each other, and an electric field is formed as a dotted line, resulting from the electric field of the cutout 73. 6, the liquid crystal molecules 310 are continuously inclined in the same direction as the inclined direction.

Accordingly, in the liquid crystal display according to the present exemplary embodiment, the occurrence of the disclination may be minimized as in the previous embodiment, thereby stably securing the transmittance of the pixel and maximizing the aperture ratio. ) Can improve the response speed.

In the method of manufacturing the thin film transistor according to the exemplary embodiment of the present invention, the data line 171, the drain electrode 175, the semiconductor 151, and the ohmic contact members 161 and 165 are formed in one photo process.

The photosensitive film pattern used in such a photo process differs in thickness according to a position, and especially includes a 1st part and a 2nd part in order of decreasing thickness. The first part is located in the wiring area occupied by the data line and the drain electrode, and the second part is located in the channel area of the thin film transistor.

There may be various methods of varying the thickness of the photoresist pattern according to the position. For example, a method of providing a translucent area in addition to the transparent area and the light blocking area in the photomask is possible. have. The translucent region is provided with a slit pattern, a lattice pattern, or a thin film having a medium transmittance or a medium thickness. When using the slit pattern, it is preferable that the width of the slits and the interval between the slits are smaller than the resolution of the exposure machine used for the photographic process. Another example is to use a photoresist film that can be reflowed. That is, a thin portion is formed by forming a reflowable photoresist pattern with a normal exposure mask having only a transparent region and a light shielding region and then reflowing to allow the photoresist film to flow down into a region where no residue is left.

In this way, a one-time photographic process can be reduced, thereby simplifying the manufacturing method.

As described above, in the exemplary embodiment of the present invention, the discrimination may be minimized by overlapping the domain control means for controlling the inclination of the liquid crystal molecules, thereby stably securing the transmittance of the pixel and maximizing the aperture ratio. And it can improve the response speed of the liquid crystal molecules.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

Claims (11)

A pixel electrode and the first signal line, the second signal line, and the pixel electrode formed in each pixel region surrounded by a first signal line, a second signal line that is insulated from and intersects the first signal line, and the first signal line and the second signal line. A first display panel including a thin film transistor having three terminals connected thereto; A second display panel on which the common electrode facing the pixel electrode is formed; A liquid crystal layer formed between the first display panel and the second display panel, Domain dividing means formed on the first display panel or the second display panel and dividing an upper half surface and a lower half surface of the pixel electrode into a plurality of regions formed in a center line parallel to the first signal line; First and second electric field control means respectively formed on the first display panel and the second display panel and overlapping each other, and disposed in the center of the region in parallel with the domain division means; Liquid crystal display comprising a. In claim 1, And the domain dividing means is formed on the first display panel, and the first electric field control means is disposed farther from the domain dividing means than the second electric field control means. In claim 2, A boundary line of the second electric field control means far from the domain dividing means is located within two boundary lines of the first electric field control means. In claim 3, The distance between the boundary of the first electric field means far from the domain dividing means and the second electric field control means far from the domain dividing means is adjacent to the boundary of the second electric field means far from the domain dividing means and the domain dividing means. The liquid crystal display device smaller than the interval between the boundary lines of the first electric field control means. In claim 4, And the domain dividing means or the first and second electric field control means are cutouts of the common electrode or the pixel electrode, or boundaries of the pixel electrodes parallel to the cutouts. In claim 1, And said domain dividing means is formed on said second display panel, and said first electric field control means is disposed closer to said domain dividing means than said second electric field control means. In claim 6, A boundary line of the first electric field control means far from the domain dividing means is located within two boundary lines of the second electric field control means. In claim 7, The distance between the boundary of the first electric field means far from the domain dividing means and the second electric field control means far from the domain dividing means is adjacent to the boundary of the first electric field means far from the domain dividing means and the domain dividing means. A liquid crystal display device smaller than the interval between the boundary lines of the second electric field control means. In claim 4, And the domain dividing means or the first and second electric field control means are cutouts of the common electrode or the pixel electrode, or boundaries of the pixel electrodes parallel to the cutouts. In claim 1, And the domain dividing means is substantially ± 45 degrees with respect to the first signal line. In claim 10, And the domain dividing means is substantially mirror-symmetrical with respect to the upper and lower bisectors of the pixel.

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