KR20070031580A - Liquid crystal display - Google Patents

Abstract

The present invention relates to a liquid crystal display device. The liquid crystal display according to the present invention is defined as a transparent substrate, a transparent conductor formed on the transparent substrate, a gate line formed on the transparent conductor, a data line crossing the gate line, the gate line and the data line. A pixel electrode formed in the pixel area, the pixel electrode including a first subpixel electrode, a second subpixel electrode, and a third subpixel electrode, and a switching element electrically connected to the gate line, the data line, and the pixel electrode. The first subpixel electrode and the second subpixel electrode are electrically connected to each other, and the third subpixel electrode is separated from the first and second subpixel electrodes.

Subpixel electrode, capacitive coupling, visibility, transmittance, response speed

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention.

2 and 3 are each an example of a cross-sectional view of the liquid crystal display shown in FIG. 1 taken along lines II-II and III-III.

4 is another example of a cross-sectional view of the liquid crystal display shown in FIG. 1 taken along the line II-II.

FIG. 5A is an equivalent circuit diagram of one pixel of the liquid crystal display shown in FIGS.

FIG. 5B is a diagram illustrating an arrangement of equipotential lines and liquid crystal molecules in the liquid crystal display of FIGS. 1 to 4.

6A-6E are cross-sectional views at intermediate stages of the method of manufacturing the liquid crystal display shown in FIG. 4 according to one embodiment of the invention.

FIG. 7 is another example of a cross-sectional view of the liquid crystal display of FIG. 1 taken along the line II-II; FIG.

8 to 10 are layout views of a liquid crystal display according to another exemplary embodiment of the present invention.

11A and 11B are views of an electrode portion that is the basis of each subpixel electrode in the liquid crystal display device shown in FIGS. 9 and 10.

<Description of Drawing>

11, 21: alignment film 12, 22: polarizing plate

71, 71a, 71b: incision 81, 82: contact aid member

100: transistor display panel 110, 210: substrate

121: gate line 124: gate electrode

131: sustain electrode line 137: sustain electrode

140: gate insulating film 154: semiconductor

163 and 165: ohmic contact 171: data line

173: source electrode 175: drain electrode

180: protective film 181, 182, 185: contact hole

191: pixel electrode 193: first upper subpixel electrode

194: lower subpixel electrode 195: second upper subpixel electrode

193a-f, 194a-f, 195a-f: electrode pieces 196, 197: electrode portion

200: common electrode display panel 220: light blocking member

230: color filter 250: overcoat

270 common electrode

The present invention relates to a liquid crystal display device.

The liquid crystal display generally includes an upper display panel on which a common electrode, a color filter, and the like are formed, a lower display panel on which a thin film transistor and a pixel electrode are formed, and a liquid crystal layer interposed between the two display panels. When a potential difference is applied to the pixel electrode and the common electrode, an electric field is generated in the liquid crystal layer, and the direction is determined by the electric field. Since the transmittance of incident light is determined according to the alignment direction of the liquid crystal molecules, a desired image may be displayed by adjusting a potential difference between two electrodes.

The liquid crystal display also includes a switching element connected to each pixel electrode and a plurality of signal lines such as a gate line and a data line for controlling the switching element and applying a voltage to the pixel electrode.

Among such liquid crystal display devices, a liquid crystal display device having a vertically aligned mode in which the long axis of the liquid crystal molecules are arranged perpendicular to the upper and lower display panels without an electric field applied to the liquid crystal display device is gaining attention due to its large contrast ratio and wide reference viewing angle. . Here, the reference viewing angle refers to a viewing angle having a contrast ratio of 1:10 or a luminance inversion limit angle between gray levels.

Means for implementing a wide reference viewing angle in a vertical alignment liquid crystal display include a method of forming a cutout in the field generating electrode and a method of forming a protrusion on the field generating electrode. Since the incision or protrusion determines the tilt direction of the liquid crystal molecules, the reference viewing angle may be widened by disposing the variously arranged and dispersing the inclined directions of the liquid crystal molecules in various directions.

The part with protrusions or cutouts is difficult to transmit light, so the more they are, the lower the transmittance. However, increasing the distance between protrusions and incisions in order to increase transmittance may reduce the effects due to protrusions or incisions and increase the disturbance of the electric field by data lines, thereby increasing the response time.

The technical problem to be achieved by the present invention is to improve the response speed of the liquid crystal while ensuring the transmittance.

A liquid crystal display according to an exemplary embodiment of the present invention includes a transparent substrate, a transparent conductor formed on the transparent substrate, a gate line formed on the transparent conductor, a data line crossing the gate line, the gate line and the data line. A pixel electrode formed in the pixel area defined by the pixel electrode, the pixel electrode including a first subpixel electrode, a second subpixel electrode, and a third subpixel electrode, and electrically connected to the gate line, the data line, and the pixel electrode. An element, wherein the first subpixel electrode and the second subpixel electrode are electrically connected, and the third subpixel electrode is separated from the first and second subpixel electrodes.

The second subpixel electrode may include the same material as the transparent electrode.

The second subpixel electrode may be positioned on a different layer from the first and third subpixel electrodes.

The second subpixel electrode may be positioned on the same layer as the transparent conductor.

According to another exemplary embodiment of the present invention, a liquid crystal display may include first and second subpixel electrodes electrically connected to each other, a third subpixel electrode separated from the first and second subpixel electrodes, and the second subpixel electrode. A first display panel including a first insulating layer covering a subpixel electrode and not covering the first subpixel electrode, a second display panel facing the first display panel and including a common electrode, and the first display panel and the second display panel It includes the liquid crystal layer interposed therebetween.

The first insulating layer may be positioned under the first and third subpixel electrodes.

The second subpixel electrode and the third subpixel electrode may overlap.

A thin film transistor connected to the first subpixel electrode or the second subpixel electrode, a gate line connected to the thin film transistor, a data line connected to the thin film transistor, and formed between the gate line and the data line. The semiconductor device may further include a second insulating layer, and the first insulating layer may be positioned on the thin film transistor, the gate line, and the data line.

The second subpixel electrode may be positioned on the second insulating layer.

The second subpixel electrode may be positioned under the second insulating layer.

The thickness of the first or second insulating film may be 200 nm to 1000 nm.

The dielectric constant of the first or second insulating film may be 2 to 8 times.

An area of the second subpixel electrode or the third subpixel electrode may be 0.2 to 2 times the area of the first subpixel electrode.

The second subpixel electrode may be made of the same material as the gate line or the data line.

The second subpixel electrode may be made of the same material as the first and third subpixel electrodes.

The display device may further include a polarizer provided in at least one of the first and second display panels.

Each of the first and third subpixel electrodes may include at least one boundary that forms an oblique angle with respect to the polarization axis of the polarizer.

The oblique angle may be 45 °.

An outer boundary of the first to third subpixel electrodes may be rectangular.

One pair of the outer boundaries of the first to third subpixel electrodes may be bent parallel to each other.

According to another aspect of the present invention, a liquid crystal display device includes a gate line, a data line crossing the gate line, a switching element connected to the gate line and the data line, a first liquid crystal capacitor connected to the switching element, and the switching element. A first coupling capacitor connected to the first coupling capacitor, a second liquid crystal capacitor connected to the first coupling capacitor, a second coupling capacitor connected to the switching element, and a third liquid crystal capacitor connected to the second coupling capacitor. Include.

The distance between two terminals of the first liquid crystal capacitor may be different from the distance between two terminals of the second liquid crystal capacitor.

The voltage of the second or third liquid crystal capacitor may be 0.55 to 0.85 times the voltage of the first liquid crystal capacitor.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to FIGS. 1 to 3.

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention. FIG. 2 is an example of a cross-sectional view of the liquid crystal display shown in FIG. 1 taken along the line II-II, and FIG. 4 is an example of the cross section which cut out the liquid crystal display device shown along line III-III, and FIG. 4 is another example of the cross section which cut out the liquid crystal display device shown in FIG. 1 along line II-II.

1 to 4, a liquid crystal display according to an exemplary embodiment of the present invention includes a thin film transistor array panel 100, a common electrode display panel 200, and a liquid crystal layer interposed between the two display panels 100 and 200. Include 3).

First, the thin film transistor array panel 100 will be described in detail.

A plurality of gate lines 121, a plurality of storage electrode lines 131, and a lower sub-pixel electrode 194 on an insulating substrate 110 made of transparent glass or plastic. ) Is formed.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding up and down, and end portions 129 having a large area for connection with other layers or gate drivers. A gate driving circuit (not shown) for generating a gate signal may be mounted on a flexible printed circuit film (not shown) attached to the substrate 110 or directly mounted on the substrate 110, It may be integrated into the substrate 110. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend to be directly connected to the gate driving circuit.

The storage electrode line 131 receives a predetermined voltage and almost extends in parallel with the gate line 121. Each storage electrode line 131 is positioned between two adjacent gate lines 121 and is substantially equal to the two gate lines 121. The storage electrode line 131 includes a storage electrode 137 extending up and down. However, the shape and arrangement of the storage electrode line 131 may be modified in various ways.

The lower subpixel electrode 194 is composed of four stripe-shaped lower electrode pieces 194a, 194b, 194c, and 194d, and each of the lower electrode pieces 194a-d has a comb angle with respect to the gate line 121. , For example, in a direction of about 45 °.

The gate line 121 and the storage electrode line 131 may be formed of aluminum-based metal such as aluminum (Al) or aluminum alloy, silver-based metal such as silver (Ag) or silver alloy, copper-based metal such as copper (Cu) or copper alloy, or molybdenum ( It may be made of at least one of molybdenum-based metal such as Mo) and molybdenum alloy, chromium (Cr), tantalum (Ta) and titanium (Ti). In the example shown in FIGS. 2 and 3, the gate line 121 and the storage electrode line 131 have a single film structure made of one of the materials listed above.

However, the gate line 121 and the storage electrode line 131 may have a multi-layer structure including two conductive layers (not shown) having different physical properties. One of the conductive films is made of a metal having low resistivity, such as aluminum-based metal, silver-based metal, or copper-based metal, so as to reduce signal delay or voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, tantalum, and titanium.

In the example shown in FIG. 4, the gate line 121 and the storage electrode line 131 include four conductive films. The lowermost first conductive film is made of a transparent material such as ITO or IZO, and the second conductive film thereon is made of molybdenum-based metal or the like having excellent contact characteristics with the first conductive film. The third conductive film on the second conductive film may be made of a low resistance material, and the fourth conductive film on the second conductive film may be made of the same material as the second conductive film.

In FIG. 4, the lower subpixel electrode 194 is made of the same material as the first conductive layer 124p of the gate line 121, that is, a transparent material such as ITO or IZO, and is the same as the first conductive layer 124p. Formed simultaneously in the layer. In FIG. 4, the gate electrode 124 and the sustain electrode 137 are denoted by the letter p for the first conductive film, the letter q for the second conductive film, the letter r for the third conductive film, and the letter s for the fourth conductive film. In addition to the above.

However, the gate line 121 and the storage electrode line 131 may be made of various other metals or conductors.

The lower subpixel electrodes 194a-d may be made of the same material as the gate line 121 and the storage electrode line 131, or may be made of a transparent conductive material such as ITO or IZO. In the example illustrated in FIG. 4, the lower subpixel electrode 194b may be made of a transparent material such as ITO or IZO.

Side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 ° to about 80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate line 121, the storage electrode line 131, and the lower subpixel electrodes 194a-d.

A plurality of linear semiconductors 151 made of hydrogenated amorphous silicon (hereinafter referred to as a-Si) or polysilicon are formed on the gate insulating layer 140. The linear semiconductor 151 mainly extends in the longitudinal direction and includes a plurality of projections 154 extending toward the gate electrode 124. The linear semiconductor 151 is wide in the vicinity of the storage electrode line 131 and covers them widely.

A plurality of linear ohmic contacts (not shown) and island type ohmic contacts 165 are formed on the semiconductor 151. The ohmic contact 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped, or may be made of silicide. The linear ohmic contact (not shown) has a plurality of protrusions 163, which are arranged in pairs on the protrusions 154 of the semiconductor 151. .

Side surfaces of the semiconductor 154 and the ohmic contacts 163 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 ° to 80 °.

A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contacts 163 and 165 and the gate insulating layer 140.

The data line 171 transmits a data voltage and mainly extends in the vertical direction to cross the gate line 121 and the storage electrode line 131. Each data line 171 includes a plurality of source electrodes 173 extending toward the gate electrode 124 and bent in a J-shape and a wide end portion 179 for connection with another layer or an external driving circuit. do. A data driving circuit (not shown) for generating a data voltage is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or integrated in the substrate 110. Can be. When the data driving circuit is integrated on the substrate 110, the data line 171 may be extended to be directly connected to the data driving circuit.

The drain electrode 175 is separated from the data line 171 and faces the source electrode 173 around the gate electrode 124. Each drain electrode 175 includes one wide end 177 and the other end having a rod shape. The wide end portion 177 overlaps the storage electrode 137, and the rod-shaped end portion is partially surrounded by the source electrode 173.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the protrusion 154 of the semiconductor 151 form one thin film transistor (TFT). A channel of the transistor is formed in the protrusion 154 between the source electrode 173 and the drain electrode 175.

The data line 171 and the drain electrode 175 are preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and include a refractory metal film (not shown) and a low resistance conductive film. It may have a multilayer structure including (not shown). Examples of the multilayer structure include a double layer of chromium or molybdenum (alloy) lower layer and an aluminum (alloy) upper layer, and a triple layer of molybdenum (alloy) lower layer and aluminum (alloy) interlayer and molybdenum (alloy) upper layer. However, the data line 171 and the drain electrode 175 may be made of various metals or conductors.

In addition, the data conductors 171 and 175 may be inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The ohmic contacts 163 and 165 exist only between the semiconductor 154 below and the entire data 171 and 175 thereon, thereby lowering the contact resistance therebetween. Although the linear semiconductor 151 is narrower than the data line 171 in most places, as described above, the width of the linear semiconductor 151 is widened at the portion where it meets the storage electrode line 131, thereby smoothing the profile of the surface, thereby disconnecting the data line 171. prevent. The semiconductor 154 may be exposed between the source electrode 173 and the drain electrode 175 without being blocked by the data conductors 171 and 175.

A passivation layer 180 is formed on the data conductors 171 and 175 and the exposed portion of the semiconductor 154. The passivation layer 180 may be made of an inorganic insulator or an organic insulator, and may have a flat surface. Examples of the inorganic insulator include silicon nitride and silicon oxide. The organic insulator can have photosensitivity. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 154 [151] while maintaining excellent insulating properties of the organic layer.

The dielectric constant of the passivation layer 180 and the gate insulating layer 140 may be 2 to 8, and the thickness thereof may be 200 nm to 1,000 nm.

The passivation layer 180 has a plurality of contact holes 185 exposing the end portion 179 of the data line 171 and an extension 177 of the drain electrode 175. Is formed. The passivation layer 180 and the gate insulating layer 140 have a plurality of contact holes 181 exposing the end portion 129 of the gate line 121 and a plurality of contact holes 189 exposing the lower subpixel electrodes 194a-d. Is formed.

A plurality of first upper subpixel electrodes 193, a plurality of second upper subpixel electrodes 195, and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

The second upper subpixel electrode 195 is formed of four upper electrode pieces 195a, 195b, 195c, and 195d having a band shape, and includes a first upper subpixel electrode 193 and a second upper subpixel electrode 195. The pixel electrode 191 is formed together with the lower subpixel electrode 194.

The first upper subpixel electrode 193 is physically and electrically connected to the drain electrode 175 through the contact hole 185, and is connected to the lower subpixel electrode 194 through the contact hole 189. In addition, the lower subpixel electrode 194 and the second upper subpixel electrode 195 overlap each other to form a “coupling capacitor”.

The first upper subpixel electrode 193 receives a data voltage from the drain electrode 175 and transfers the data voltage to the lower subpixel electrode 194, and the second upper subpixel electrode 195 is connected to the lower subpixel electrode 194. It has a voltage induced due to the capacitive coupling of.

The pixel electrode 191 including the subpixel electrodes 193, 194, and 195 generates an electric field together with the common electrode 270 of the common electrode display panel 200 to which a common voltage is applied. The direction of the liquid crystal molecules 31 of the liquid crystal layer 3 between the two electrodes 191 and 270 is determined. The polarization of light passing through the liquid crystal layer 3 varies according to the direction of the liquid crystal molecules 31 determined as described above. The pixel electrode 191 and the common electrode 270 form a capacitor (hereinafter, referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off.

The pixel electrode 191 and the end portion 177 of the drain electrode 175 connected thereto overlap the storage electrode line 131 including the storage electrode 137. A capacitor in which the pixel electrode 191 and the drain electrode 175 electrically connected thereto overlap the storage electrode line 131 is called a "storage capacitor", and the storage capacitor enhances the voltage holding capability of the liquid crystal capacitor. .

Each pixel electrode 191 has four peripheral sides substantially parallel to the gate line 121 or the data line 171 and has a substantially rectangular shape in which four corners are chamfered. The central portion around the right side of the pixel electrode 191 is also cut into a funnel to form a hypotenuse, and the corners and the hypotenuse of the pixel electrode 191 form an angle of about 45 ° with respect to the gate line 121. The pixel electrode 191 is almost inverted symmetric with respect to the storage electrode line 131.

The first subpixel electrode 193 and the upper electrode pieces 195a-d have at least one primary edge that forms an oblique angle with a peripheral side of the pixel electrode 191, and the peripheral side has a polarizer 12. An angle of about 45 ° is made with the polarization axis of 22) in order to maximize the light efficiency.

The upper electrode pieces 195a-d are disposed on both sides of the first upper subpixel electrode 193, and the opposite sides of the first upper subpixel electrode 193 and the upper electrode pieces 195a-d are formed in the main portion. As sides, they are substantially parallel to each other. The space between the first upper subpixel electrode 193 and the upper electrode pieces 195a-d is occupied by the lower electrode pieces 194a-d so that there is no gap.

The area of the lower subpixel electrode 194 and the second upper subpixel electrode 195 is preferably 0.2 to 2 times the area of the first upper subpixel electrode 193.

The pixel electrode 191 may be formed with a cutout extending substantially parallel to the periphery of the first subpixel electrode 193 and the upper electrode pieces 195a-d. This cutout divides the subpixel electrodes 193, 194, 195 into a plurality of regions.

As described above, the pixel electrode 191 is divided into a plurality of subpixel electrodes 193, 194, and 195 and electrode pieces 194a-d and 195a-d, and the number of the subpixel electrodes is equivalent to the pixel electrode 191. May vary according to design factors such as the size, the ratio of the length of the horizontal side to the vertical side of the pixel electrode 191, the type and characteristics of the liquid crystal layer 3, and the like.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 compensate for and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

Next, the upper panel 200 will be described.

A light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 is also called a black matrix and prevents light leakage.

A plurality of color filters 230 is also formed on the substrate 210 and the light blocking member 220. The color filter 230 is mostly present in an area surrounded by the light blocking member 220, and may extend long along the column of pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The overcoat 250 may be made of an organic insulator, and may prevent the color filter 230 from being exposed and provide a flat surface. The overcoat 250 may be omitted.

The common electrode 270 is formed on the overcoat 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO, and has a plurality of cutouts 71a and 71b.

One set of cutouts 71a and 71b faces one pixel electrode 191 and includes a lower cutout 71a and an upper cutout 71b.

The lower and upper cutouts 71a and 71b extend from the right side to the left side of the pixel electrode 191 approximately in parallel with the peripheral sides of the first subpixel electrode 193 and the upper electrode pieces 195a-d. . The cutouts 71a and 71b bisect the first upper subpixel electrode 193.

The number of the cutouts 71a and 71b may also vary according to design factors, and the light blocking member 220 may overlap the cutouts 71a and 71b to block light leakage near the cutouts 71a and 71b.

Alignment layers 11 and 21 are coated on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers. Polarizers 21 and 22 are provided on the outer surfaces of the display panels 100 and 200, and the polarization axes of the two polarizers are orthogonal, and the oblique cuts 92a and 92b and the first subpixel electrode 193 and It is preferable to form an angle of approximately 45 ° with the periphery of the upper electrode pieces 195a-d. In the case of a reflective liquid crystal display, one of two polarizers may be omitted.

The liquid crystal display according to the present exemplary embodiment may further include a phase retardation film (not shown) for compensating for the delay of the liquid crystal layer 3. The liquid crystal display may also include a polarizer 12 and 22, a phase retardation film, display panels 100 and 200, and a backlight unit (not shown) for supplying light to the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules 31 of the liquid crystal layer 3 are oriented such that their major axes are substantially perpendicular to the surfaces of the two display panels 100 and 200 in the absence of an electric field. have. Therefore, incident light does not pass through the quadrature polarizers 12 and 22 and is blocked.

As described above, the first upper subpixel electrode 193 receives a data voltage from the drain electrode 175 and transfers the data voltage to the lower subpixel electrode 194.

The pixel electrode 191 to which the data voltage is applied forms a liquid crystal capacitor together with the common electrode 270 to which the common voltage is applied, and generates an electric field in the liquid crystal layer 3. In this case, although the voltage of the first upper subpixel electrode 193 and the voltage of the lower subpixel electrode 194 are the same, the intensity of the electric field felt by the liquid crystal molecules positioned on the lower subpixel electrode 194 is equal to the first upper subpixel electrode ( 193) is different from the intensity of the electric field felt by liquid crystal molecules located above. The distance between the lower subpixel electrode 194 and the common electrode 270 is different from that between the upper subpixel electrode 193 and the common electrode 270, and the gate insulating layer 140 disposed on the lower subpixel electrode 194. And the dielectric constant of the protective film 180 are different from those of the liquid crystal layer 3.

Therefore, the liquid crystal capacitor formed by the pixel electrode 191 and the common electrode 270 may include a first liquid crystal capacitor having a portion of the liquid crystal layer 3 between the first upper subpixel electrode 193 and the common electrode 270 as a dielectric material; A first coupling capacitor having a portion of the gate insulating layer 140 and the passivation layer 180 on the lower subpixel electrode 194 as a dielectric, and a second portion of the liquid crystal layer 3 on the lower subpixel electrode 194 as a dielectric. A liquid crystal capacitor, a second coupling capacitor having a portion of the gate insulating layer 140 and the passivation layer 180 between the lower subpixel electrode 194 and the second upper subpixel electrode 195 as a dielectric, and the first upper subpixel electrode ( A portion of the liquid crystal layer 3 between the 193 and the common electrode 270 may be subdivided into a third liquid crystal capacitor having a dielectric.

Such a liquid crystal display may be represented by an equivalent circuit diagram of FIG. 5A.

Referring to FIG. 5A, one pixel of the liquid crystal display includes a thin film transistor Q, a first liquid crystal capacitor Clc1, a second liquid crystal capacitor Clc2, a third liquid crystal capacitor Clc3, and a first coupling capacitor Ccp1. And a second coupling capacitor Ccp2. Each pixel further includes a storage capacitor (not shown).

The first liquid crystal capacitor Clc1 is connected to the drain of the thin film transistor Q. The first coupling capacitor Ccp1 is connected between the thin film transistor Q and the second liquid crystal capacitor Clc2, and the second coupling capacitor Ccp2 is between the thin film transistor Q and the third liquid crystal capacitor Clc3. It is connected. The common voltage Vcom is applied to the common electrode 270.

The thin film transistor Q applies the data voltage from the data line 171 to the first liquid crystal capacitor Clc1 and the first and second coupling capacitors Ccp1 and Ccp2 according to the gate signal from the gate line 121. The first and second coupling capacitors Ccp1 and Ccp2 change their magnitudes and transfer the voltages to the second and third liquid crystal capacitors Clc2 and Ccl3, respectively.

If capacitors Clc1, Clc2, Clc3, Ccp1, and Ccp2 are denoted by the same reference numerals, the voltage Va charged in the first liquid crystal capacitor Clc1 and the voltage charged in the second liquid crystal capacitor Clc2 Vb and the voltage Vc charged in the third liquid crystal capacitor Clc3 have the following relationship.

Vb = Va ㅧ [Ccp1 / (Ccp1 + Clc2)]

Vc = Va ㅧ [Ccp2 / (Ccp2 + Clc3)]

Since the values of Ccp1 / (Ccp1 + Clc2) and Ccp2 / (Ccp2 + Clc3) are less than 1, the voltages Vb and Vc charged in the second and third liquid crystal capacitors Clc2 and Clc3 are transferred to the first liquid crystal capacitor Clc1. It is always small compared to the charged voltage Va. The voltage Vb of the second liquid crystal capacitor Clc2 and the voltage Vc of the third liquid crystal capacitor Clc3 are also different from each other.

As such, when a potential difference occurs between both ends of the first to third liquid crystal capacitors Clc1, Clc2, and Clc3, an electric field substantially perpendicular to the surfaces of the display panels 100 and 200 is generated in the liquid crystal layer 3. [Hereinafter, the pixel electrode 191 and the common electrode 270 including the subpixel electrodes 193, 194, and 195 will also be referred to as "field generating electrodes".] Then, the liquid crystal of the liquid crystal layer 3 The molecules are inclined so that their major axis is perpendicular to the direction of the electric field in response to the electric field, and the degree of change in polarization of light incident on the liquid crystal layer 3 varies according to the degree of inclination of the liquid crystal molecules. This change in polarization is represented by a change in transmittance by the polarizers 12 and 22, through which the liquid crystal display displays an image.

The angle at which the liquid crystal molecules are inclined depends on the intensity of the electric field. The voltage Va of the first liquid crystal capacitor Clc1, the voltage Vb of the second liquid crystal capacitor Clc2, and the voltage of the third liquid crystal capacitor Clc3 ( Since Vc) is different from each other, the inclination angles of the liquid crystal molecules in the liquid crystal capacitors Clc1, Clc2, and Clc3 are different, and thus, the luminance of each liquid crystal capacitor Clc1, Clc2, and Clc3 is different. Therefore, when the voltage Va of the first liquid crystal capacitor Clc1, the voltage Vb of the second liquid crystal capacitor Clc2, and the voltage Vc of the third liquid crystal capacitor Clc3 are properly adjusted, the image viewed from the side may be viewed in front. You can get as close as possible to the image you see in, which improves side visibility.

The ratio of the first liquid crystal capacitor Clc1 voltage Va, the second liquid crystal capacitor Clc2 voltage Vb, and the third liquid crystal capacitor Clc3 voltage Vc is the first and second coupling capacitors Ccp1 and Ccp2. It can be adjusted by changing the electrostatic capacitance. The capacitance of the first coupling capacitor Ccp1 can be changed by adjusting the overlap area of the lower subpixel electrode 194 and the common electrode 270 and the dielectric constant of the gate insulating layer 140 or the protective layer 180 serving as a dielectric. have. The capacitance of the second coupling capacitor Ccp2 can be changed by adjusting the overlapping area and the distance of the lower subpixel electrode 194 and the second upper subpixel electrode 1950.

The voltages Vb and Vc of the second or third liquid crystal capacitors Clc2 and Clc3 are preferably 0.55 to 0.85 times the voltage Va of the first liquid crystal capacitor Clc1.

The direction in which the liquid crystal molecules are inclined is determined by the sides of the subpixel electrodes 193, 194, and 195 and the horizontal component that the cutouts 71a and 71b of the common electrode 270 distort in the electric field. The horizontal component is perpendicular to the sides of the subpixel electrodes 193, 194, 195 and the sides of the cutouts 71a, 71b.

Referring to FIG. 1, one set of cutouts 71a and 71b divides the pixel electrode 191 into a plurality of sub-areas each having two inclined major edges. Since the liquid crystal molecules on each subregion are inclined in a direction perpendicular to the periphery, the directions of inclination are approximately four directions. As described above, when the liquid crystal molecules are inclined in various directions, the reference viewing angle of the liquid crystal display is increased.

Each subregion is divided into a plurality of small regions by the sides of the subpixel electrodes 193, 194, and 195 and the electrode pieces 194a-d and 195a-d, and as described above, the inclination of the liquid crystal molecules located on each of the small regions. Different angles improve visibility. In addition, since the direction of the equipotential lines or the electric field is temporarily changed at the boundary of each small region, a horizontal component is generated in the electric field, thereby reducing the response time of the liquid crystal.

In addition, in the conventional liquid crystal display device having the cutout in the pixel electrode 191, the transmittance is as low as the area occupied by the cutout, but in the liquid crystal display according to the present embodiment, since the cutout is almost absent, the transmittance is greatly improved. In addition, even when the cutout is placed on the pixel electrode 191, a horizontal component is formed at the boundary of each small region, that is, at the boundary between the first subpixel electrode 193 and the upper electrode piece 195a-d, thereby reducing the distance between the cutouts. Can be made wide enough.

The shape and arrangement of the subpixel electrodes 193, 194, 195 and the cutouts 71a and 71b may be changed, and the at least one cutout 71a-71b may be a protrusion (not shown) or a depression. (depression) (not shown) or inclined member (not shown) can be replaced. The protrusion or inclined member may be made of an organic material or an inorganic material and may be disposed above or below the field generating electrodes 191 and 270.

5B, the arrangement of the equipotential lines and the liquid crystal molecules in the liquid crystal display will be described in detail.

FIG. 5B is a diagram illustrating an arrangement of equipotential lines and liquid crystal molecules in the liquid crystal display illustrated in FIGS. 1 to 4.

In FIG. 5B, each of the small regions divided by the sides of the first and second upper subpixel electrodes 193 and 195a-d has a width of about 20 μm, respectively, and the liquid crystal on the first upper subpixel electrode 193. The voltage across the layer 3 is about 7.0V, the voltage across the liquid crystal layer 3 above the second upper subpixel electrode 195 is about 4.9V, and the liquid crystal layer above the lower subpixel electrode 194. The voltage applied to the part (3) was about 5.94V.

As can be seen in FIG. 5B, the equipotential lines change abruptly at the boundary portions of the subpixel electrodes 193 and 195a-d. As a result, the liquid crystal molecules form an oblique angle with the equipotential lines and move toward the acute angle, thereby increasing the response speed.

A method of forming the lower subpixel electrode in the liquid crystal display shown in FIG. 4 will now be described in detail with reference to FIGS. 6A to 6E.

6A to 6E are cross-sectional views at intermediate stages of a method of manufacturing the liquid crystal display shown in FIG. 4 according to an embodiment of the present invention.

Referring to FIG. 6A, the first conductive layer 120p is formed by depositing ITO or IZO on the substrate 110 by sputtering. The second, third and fourth conductive layers 120q, 120r and 120s are sequentially formed by sputtering or the like on a first conductive layer 120p, and the photoresist layer 40 is formed on the fourth thin film 120s. Apply.

The optical mask 50 including the substrate 51 and the light blocking film 52 thereon is aligned on the substrate 110. The photomask 50 is divided into a transmissive region, a transflective region, and a light shielding region according to the shape of the light shielding film 52. ) Is a region equal to or greater than a predetermined width, and the transflective region is an region in which the width of the light shielding film 52 and the distance between the light shielding films 52 are equal to or less than a predetermined value.

When the photosensitive film 40 is irradiated with light through the photomask 50 and then exposed, the etching masks 52 and 54 having different thicknesses are formed as shown in FIG. 6B. In FIG. 6B, thick portions are denoted by 42 and thin portions are denoted by 44.

Referring to FIG. 6C, the portions of the first to fourth conductive layers 120p-s that are not covered by the etching masks 42 and 44 are removed to remove the gate electrode 124, the storage electrode 137, and the lower subpixel. The electrode 194 and the first to third conductors 121q-r thereon are formed.

Referring to FIG. 6D, a process such as ashing is performed to reduce the thickness of the etching masks 42 and 44 until the thin portion 44 is removed.

6E, the first to third conductors 120q-s not covered by the etching mask 42 may be removed to leave only the lower subpixel electrode 194. Finally, the etching mask 42 is removed.

Meanwhile, unlike FIGS. 6A to 6E, the gate line 121 including the gate electrode 124 and the storage electrode line 131 including the storage electrode 137 are first formed and then subjected to one more process. The lower subpixel electrode 194 may be formed.

A liquid crystal display according to another exemplary embodiment of the present invention will now be described in detail with reference to FIG. 7.

FIG. 7 is another example of a cross-sectional view of the liquid crystal display of FIG. 1 taken along the line II-II. FIG.

As shown in FIGS. 1 and 7, the liquid crystal display according to the present exemplary embodiment includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other, a liquid crystal layer 3 interposed therebetween, and two display panels. 100, 200) and polarizers 11, 21 attached to the outer surface.

The layered structure of the display panels 100 and 200 according to the present exemplary embodiment is generally similar to the layered structure of the liquid crystal display shown in FIGS. 1 to 3.

Referring to the thin film transistor array panel 100, a plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on the substrate 110. The gate line 121 includes a plurality of gate electrodes 124 and an end portion 129, and the storage electrode line 121 includes a storage electrode 137 extending up and down. On the gate line 121 and the storage electrode line, a gate insulating layer 140, a plurality of linear semiconductors 151 having protrusions 154, a plurality of linear ohmic contact members (not shown) having protrusions 163, and a plurality of island shapes are provided. The ohmic contact 165 is formed in sequence. A plurality of data lines 171 including a source electrode 173 and an end portion 179 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140, and a passivation layer 180 is formed thereon. . A plurality of contact holes 181, 182, and 185 are formed in the passivation layer 180 and the gate insulating layer 140. First and second upper subpixel electrodes 193 and 195 and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer 180, and an alignment layer 11 is formed thereon.

Referring to the common electrode display panel 200, the light blocking member 220, the color filter 230, the overcoat 250, the common electrode 270 having the cutouts 71a and 71b, and the alignment layer 21 are insulated from each other. It is formed on the substrate 210 in order.

However, unlike the liquid crystal display shown in FIGS. 1 to 3, in the liquid crystal display according to the present exemplary embodiment, the lower subpixel electrode 194 is not under the gate insulating layer 140, but the gate insulating layer 140 and the protective layer. Located between 180. The lower subpixel electrode 194 may be made of the same material as the data conductors 171 and 175.

Many features of the liquid crystal display shown in FIGS. 1 to 3 may also be applied to the liquid crystal display shown in FIG. 7.

8 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

Since the layer structure of the liquid crystal display shown in FIG. 8 is similar to the layer structure of the liquid crystal display shown in FIGS. 2 and 3, the same reference numerals as those shown in FIGS. Will be explained.

8 shows a thin film transistor array panel 100, a common electrode display panel 200, a liquid crystal layer 3 between two display panels 100 and 200, and a polarizer on an outer surface of the two display panels 100 and 200. (11, 21).

Referring to the thin film transistor array panel 100, a plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on the substrate 110. The gate line 121 includes a plurality of gate electrodes 124 and end portions 129, and the storage electrode line 131 includes a plurality of storage electrodes 137. On the gate line 121 and the storage electrode line 131, the gate insulating layer 140, the linear semiconductor 151 having the protrusion 154, the plurality of linear ohmic contacts 161 having the protrusion 163, and the plurality of island resistive electrodes are disposed on the gate line 121 and the storage electrode line 131. The contact member 165 is formed in order. A plurality of data lines 171 including a source electrode 173 and an end portion 179 are formed on the ohmic contacts 161 and 165 and the gate insulating layer 140, and a passivation layer 180 is formed thereon. . A plurality of contact holes 181, 182, and 185 are formed in the passivation layer 180 and the gate insulating layer 140. A plurality of first and second upper subpixel electrodes 193 and 195 and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer 180, and a plurality of lower subpixel electrodes (below the passivation layer 180). 194 is formed. An alignment layer 11 is formed on the upper subpixel electrodes 193 and 195, the contact auxiliary members 81 and 82, and the passivation layer 180.

Referring to the common electrode display panel 200, the light blocking member 220, the common electrode 270 having the cutouts 71a and 71b, and the alignment layer 21 are sequentially formed on the insulating substrate 210.

However, unlike the liquid crystal display of FIGS. 1 to 3, in the liquid crystal display according to the present exemplary embodiment, positions of the first upper subpixel electrode 193 and the second upper subpixel electrode 195 are reversed. Accordingly, the first upper subpixel electrode 193 is divided into four electrode pieces 193a, 193b, 193c, and 193d, and the second upper subpixel electrode 195 is formed in one piece. The first upper subpixel electrode 193 further includes a connection portion 195 for connecting the electrode pieces 193a-d.

In addition, the cutouts 71a and 71b of the common electrode 270 bisect the second upper subpixel electrode 195 instead of the first upper subpixel electrode 193.

Many features of the liquid crystal display shown in FIGS. 1 to 3 may also be applied to the liquid crystal display shown in FIG. 8.

9 and 10 are layout views of a liquid crystal display according to another exemplary embodiment of the present invention, and FIGS. 11A and 11B are plan views of electrode units serving as bases of sub-pixel electrodes in the liquid crystal display of FIGS. 9 and 10. to be.

Since the layered structure of the liquid crystal panel assembly according to the present exemplary embodiment is generally the same as the layered structure of the liquid crystal panel assembly shown in FIGS. 2 and 3, the same reference numerals as those shown in FIGS. 2 and 3 are not shown. It demonstrates compared with FIG.

9 and 10 also show a thin film transistor array panel 100, a common electrode display panel 200, a liquid crystal layer 3 interposed between two display panels 100 and 200, and two display panels 100 and 200. And polarizers 11 and 21 attached to the outer surface.

Referring to the lower panel 100, a plurality of gate lines 121 are formed on the insulating substrate 100. Each gate line 121 includes a gate electrode 124 and an end portion 129. The gate insulating layer 140 is formed on the gate line 121. A plurality of semiconductors 154 are formed on the gate insulating layer 140, and a plurality of ohmic contacts 163 and 165 are formed thereon. A data conductor including a plurality of data lines 171 and a drain electrode 175 is formed on the ohmic contacts 163 and 165 and the gate insulating layer 140. The data line 171 includes a source electrode 173 and an end portion 179. A passivation layer 180 is formed on the data conductors 171 and 175 and the exposed semiconductor 154, and a plurality of contact holes 181, 182, and 185 are formed in the passivation layer 180 and the gate insulating layer 140. It is. A plurality of first and second upper subpixel electrodes 193 and 195 and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer 180, and a plurality of lower subpixel electrodes (below the passivation layer 180). 194 is formed. An alignment layer 11 is formed on the upper subpixel electrodes 193 and 195, the contact auxiliary members 81 and 82, and the passivation layer 180.

Referring to the common electrode display panel 200, the light blocking member 220, the common electrode 270 having the cutout 71, and the alignment layer 21 are sequentially formed on the insulating substrate 210.

The first and second upper subpixel electrodes 193 and 195 and the lower subpixel electrode 194 form one pixel electrode 191. The lower subpixel electrode 194 is composed of a plurality of lower electrode pieces 194e and 194f, and the first and second upper subpixel electrodes 193/195 are respectively a plurality of electrode pieces 193e and 193f / 195e. 195f).

However, unlike the liquid crystal display shown in FIG. 1, in the liquid crystal display according to the present exemplary embodiment, the pixel electrodes 191 have a pair of curved sides parallel to each other. Similarly, each of the electrode pieces 193e, 193f, 194e, 194f, 195e, and 195f and the first upper pixel electrode 193 also have a pair of curved sides parallel to each other. Further, each of the electrode pieces 193e, 193f, 194e, 194f, 195e, and 195f and the first upper pixel electrode 193 has at least one parallelogram electrode portion 196 shown in Fig. 11A and a parallelogram shown in Fig. 11B. One electrode portion 197 of the.

As shown in FIGS. 11A and 11B, each of the electrode portions 196 and 197 has a pair of oblique edges 196o and 197o and a pair of transverse edges 196t and 197t and is approximately Parallelogram. Each of the oblique sides 196o and 197o forms an oblique angle with respect to the horizontal sides 196t and 197t, and the size of the oblique angle is preferably about 45 degrees to 135 degrees. For convenience, it is divided according to the inclined direction ("inclination direction") in a vertical state with the bases 196t and 197t forward, and the case inclined to the right as shown in FIG. 10A is called "right inclination" and left as shown in FIG. 10B. The case of tilting is called "left slope".

In the electrode pieces 193e, 193f, 194e, 194f, 195e, and 195f and the first upper pixel electrode 193 illustrated in FIGS. 9 and 10, the left inclined electrode portion 197 and the right inclined electrode portion 196 are disposed below. It's connected up.

In FIG. 9, the first upper subpixel electrode 193 is positioned at the center of the pixel electrode 191, and the second upper subpixel electrode 195 includes two electrode pieces 195e and 195f. 10, the second upper electrode piece 193 is positioned at the center of the pixel electrode 191, and the first upper subpixel electrode 193 is formed of two electrode pieces 193e and 193f. 193e and 193f are connected to the connecting portion 198.

The cutout 71 of the common electrode 270 is substantially parallel to the bent side of the pixel electrode 191, and diagonally divides the pixel electrode 191 and the first and second upper subpixel electrodes 193/195. A horizontal portion overlapping the horizontal side of the pixel electrode 191 while forming an obtuse angle with the portion and the diagonal portion.

Meanwhile, in the structures shown in FIGS. 9 and 10, the direction of the secondary electric field generated by the voltage difference between the pixel electrodes 191 is cut and bounded by the upper subpixel electrodes 193 and 195. It coincides with the direction of the horizontal component of the main electric field occurring at the boundary of the portion 71. Therefore, the negative electric field between the pixel electrodes 191 acts to strengthen the crystal in the oblique direction of the liquid crystal molecules.

According to the present invention, the response speed of the liquid crystal can be improved while securing the transmittance.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (25)

Transparent substrate, A transparent conductor formed on the transparent substrate, A gate line formed on the transparent conductor, A data line intersecting the gate line, A pixel electrode formed in the pixel region defined by the gate line and the data line, the pixel electrode including a first subpixel electrode, a second subpixel electrode, and a third subpixel electrode; and A switching element electrically connected to the gate line, the data line, and the pixel electrode Including; The first subpixel electrode and the second subpixel electrode are electrically connected, and the third subpixel electrode is separated from the first and second subpixel electrodes. Liquid crystal display. In claim 1, The second subpixel electrode includes the same material as the transparent electrode. In claim 2, The second subpixel electrode is positioned on a different layer from the first and third subpixel electrodes. In claim 3, The second subpixel electrode is positioned in the same layer as the transparent conductor. In claim 1, The second subpixel electrode and the third subpixel electrode overlap each other. In claim 1, The area of the second subpixel electrode or the third subpixel electrode is 0.2 to 2 times the area of the first subpixel electrode. First and second subpixel electrodes electrically connected to each other, a third subpixel electrode separated from the first and second subpixel electrodes, and the second subpixel electrode and covering the first subpixel electrode A first display panel comprising a first insulating film not covered, A second display panel facing the first display panel and including a common electrode, and A liquid crystal layer interposed between the first display panel and the second display panel Liquid crystal display comprising a. In claim 7, The first insulating layer is positioned under the first and third subpixel electrodes. In claim 8, The second subpixel electrode and the third subpixel electrode overlap each other. In claim 9, A thin film transistor connected to the first subpixel electrode or the second subpixel electrode, A gate line connected to the thin film transistor, A data line connected to the thin film transistor, and A second insulating film formed between the gate line and the data line More, The first insulating layer is positioned on the thin film transistor, the gate line, and the data line. Liquid crystal display. In claim 10, The second subpixel electrode is on the second insulating layer. In claim 10, The second subpixel electrode is positioned under the second insulating layer. In claim 10, The thickness of the first or second insulating film is 200nm to 1,000nm liquid crystal display device. In claim 10, The dielectric constant of the first or second insulating film is 2 to 8 times. In claim 10, The area of the second subpixel electrode or the third subpixel electrode is 0.2 to 2 times the area of the first subpixel electrode. In claim 10, The second subpixel electrode is made of the same material as the gate line or the data line. In claim 10, The second subpixel electrode is made of the same material as the first and third subpixel electrodes. In claim 10, And a polarizer provided on at least one of the first and second display panels. The method of claim 18, And each of the first and third subpixel electrodes includes at least one boundary that forms an oblique angle with respect to the polarization axis of the polarizer. The method of claim 19, The oblique angle is 45 ° liquid crystal display device. In claim 7, An outer boundary of the first to third subpixel electrodes is a rectangular liquid crystal display. In claim 10, The pair of outer boundaries of the first to third subpixel electrodes are bent in parallel with each other. Gate Line, A data line intersecting the gate line, A switching element connected to the gate line and the data line, A first liquid crystal capacitor connected to the switching element, A first coupling capacitor connected with the switching element, A second liquid crystal capacitor connected to the first coupling capacitor, A second coupling capacitor connected to the switching element, and A third liquid crystal capacitor connected to the second coupling capacitor Liquid crystal display comprising a. The method of claim 23, And a distance between two terminals of the first liquid crystal capacitor is different from a distance between two terminals of the second liquid crystal capacitor. The method of claim 24, The voltage of the second or third liquid crystal capacitor is 0.55 to 0.85 times the voltage of the first liquid crystal capacitor.

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