KR101120288B1 - 성장 형성물 감소 방법 및 장치와 집적 회로 - Google Patents

성장 형성물 감소 방법 및 장치와 집적 회로 Download PDF

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KR101120288B1
KR101120288B1 KR1020050002443A KR20050002443A KR101120288B1 KR 101120288 B1 KR101120288 B1 KR 101120288B1 KR 1020050002443 A KR1020050002443 A KR 1020050002443A KR 20050002443 A KR20050002443 A KR 20050002443A KR 101120288 B1 KR101120288 B1 KR 101120288B1
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South Korea
Prior art keywords
conductive leads
plated
annealing
melting point
finish
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Expired - Fee Related
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English (en)
Korean (ko)
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KR20050074311A (ko
Inventor
오센바크존윌리엄
포테이거브라이언데일
숙리차드로렌스
바카로브라이언토마스
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에이저 시스템즈 인크
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • EFIXED CONSTRUCTIONS
    • E04BUILDING
    • E04GSCAFFOLDING; FORMS; SHUTTERING; BUILDING IMPLEMENTS OR AIDS, OR THEIR USE; HANDLING BUILDING MATERIALS ON THE SITE; REPAIRING, BREAKING-UP OR OTHER WORK ON EXISTING BUILDINGS
    • E04G17/00Connecting or other auxiliary members for forms, falsework structures, or shutterings
    • E04G17/06Tying means; Spacers ; Devices for extracting or inserting wall ties
    • E04G17/075Tying means, the tensional elements of which are fastened or tensioned by other means
    • E04G17/0751One-piece elements
    • E04G17/0752One-piece elements fully recoverable
    • EFIXED CONSTRUCTIONS
    • E04BUILDING
    • E04GSCAFFOLDING; FORMS; SHUTTERING; BUILDING IMPLEMENTS OR AIDS, OR THEIR USE; HANDLING BUILDING MATERIALS ON THE SITE; REPAIRING, BREAKING-UP OR OTHER WORK ON EXISTING BUILDINGS
    • E04G17/00Connecting or other auxiliary members for forms, falsework structures, or shutterings
    • E04G17/06Tying means; Spacers ; Devices for extracting or inserting wall ties
    • E04G17/07Tying means, the tensional elements of which are fastened or tensioned by means of wedge-shaped members
    • E04G17/0707One-piece elements
    • E04G17/0714One-piece elements fully recoverable
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Architecture (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Civil Engineering (AREA)
  • Structural Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Lead Frames For Integrated Circuits (AREA)
KR1020050002443A 2004-01-12 2005-01-11 성장 형성물 감소 방법 및 장치와 집적 회로 Expired - Fee Related KR101120288B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US53583904P 2004-01-12 2004-01-12
US60/535,839 2004-01-12
US10/855,148 US7368326B2 (en) 2004-01-12 2004-05-27 Methods and apparatus to reduce growth formations on plated conductive leads
US10/855,148 2004-05-27

Publications (2)

Publication Number Publication Date
KR20050074311A KR20050074311A (ko) 2005-07-18
KR101120288B1 true KR101120288B1 (ko) 2012-03-06

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KR1020050002443A Expired - Fee Related KR101120288B1 (ko) 2004-01-12 2005-01-11 성장 형성물 감소 방법 및 장치와 집적 회로

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Country Link
US (1) US7368326B2 (enExample)
JP (1) JP2005203781A (enExample)
KR (1) KR101120288B1 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060068218A1 (en) * 2004-09-28 2006-03-30 Hooghan Kultaransingh N Whisker-free lead frames
US20060091121A1 (en) * 2004-10-06 2006-05-04 James Zanolli Method for reflowing a metal plating layer of a contact and contact formed thereby
US20060266446A1 (en) * 2005-05-25 2006-11-30 Osenbach John W Whisker-free electronic structures
JP2007123395A (ja) * 2005-10-26 2007-05-17 Renesas Technology Corp 半導体装置および半導体装置の製造方法
KR100725026B1 (ko) * 2005-11-14 2007-06-07 주식회사 아큐텍반도체기술 반도체장치용 리드프레임
JP2008147589A (ja) * 2006-12-13 2008-06-26 Toyota Motor Corp 電子部品
JP2009038075A (ja) * 2007-07-31 2009-02-19 Toyota Motor Corp 電子部品
US8367244B2 (en) * 2008-04-17 2013-02-05 Enovix Corporation Anode material having a uniform metal-semiconductor alloy layer
CN102027569B (zh) * 2008-06-30 2013-03-13 艾格瑞系统有限公司 防止或减缓在金属膜上生长形成物
CN102575369B (zh) * 2009-06-29 2015-08-05 Om产业股份有限公司 电气元件的制造方法和电气元件
TW201114952A (en) * 2009-10-28 2011-05-01 Univ Nat Taiwan Science Tech Method for inhibiting growth of tin whiskers
US8551263B1 (en) * 2009-12-15 2013-10-08 Emc Corporation Method for reducing whisker growth
CN102744488A (zh) * 2011-04-22 2012-10-24 鸿富锦精密工业(深圳)有限公司 焊接辅助装置
CN110265376A (zh) 2018-03-12 2019-09-20 意法半导体股份有限公司 引线框架表面精整
US11735512B2 (en) 2018-12-31 2023-08-22 Stmicroelectronics International N.V. Leadframe with a metal oxide coating and method of forming the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000138334A (ja) * 1999-12-06 2000-05-16 Furukawa Electric Co Ltd:The リ―ドフレ―ム材のアウタ―リ―ド部、それを用いた半導体装置
JP2003342782A (ja) 2002-05-23 2003-12-03 Fuji Denshi Kogyo Kk ストライプめっき条及びストライプめっき方法
US20040183166A1 (en) 2003-03-17 2004-09-23 Abbott Donald C. Preplated leadframe without precious metal

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5994767A (en) * 1997-04-09 1999-11-30 Sitron Precision Co., Ltd. Leadframe for integrated circuit package and method of manufacturing the same
US6194777B1 (en) * 1998-06-27 2001-02-27 Texas Instruments Incorporated Leadframes with selective palladium plating
JP3417395B2 (ja) * 2000-09-21 2003-06-16 松下電器産業株式会社 半導体装置用リードフレーム及びその製造方法及びそれを用いた半導体装置
JP3395772B2 (ja) * 2000-11-20 2003-04-14 松下電器産業株式会社 錫−銀合金めっき皮膜の製造方法及び錫−銀合金めっき皮膜及びそれを備えた電子部品用リードフレーム
JP2003193289A (ja) * 2001-12-27 2003-07-09 Fujikura Ltd 電解メッキ皮膜の熱処理方法
US6713852B2 (en) * 2002-02-01 2004-03-30 Texas Instruments Incorporated Semiconductor leadframes plated with thick nickel, minimum palladium, and pure tin
JP2002368175A (ja) * 2002-05-15 2002-12-20 Matsushita Electric Ind Co Ltd 電子部品の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000138334A (ja) * 1999-12-06 2000-05-16 Furukawa Electric Co Ltd:The リ―ドフレ―ム材のアウタ―リ―ド部、それを用いた半導体装置
JP2003342782A (ja) 2002-05-23 2003-12-03 Fuji Denshi Kogyo Kk ストライプめっき条及びストライプめっき方法
US20040183166A1 (en) 2003-03-17 2004-09-23 Abbott Donald C. Preplated leadframe without precious metal

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Publication number Publication date
JP2005203781A (ja) 2005-07-28
US7368326B2 (en) 2008-05-06
US20050153532A1 (en) 2005-07-14
KR20050074311A (ko) 2005-07-18

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