KR101027226B1 - 자기 소자 및 자기 소자의 형성 방법 - Google Patents

자기 소자 및 자기 소자의 형성 방법 Download PDF

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Publication number
KR101027226B1
KR101027226B1 KR1020087002469A KR20087002469A KR101027226B1 KR 101027226 B1 KR101027226 B1 KR 101027226B1 KR 1020087002469 A KR1020087002469 A KR 1020087002469A KR 20087002469 A KR20087002469 A KR 20087002469A KR 101027226 B1 KR101027226 B1 KR 101027226B1
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South Korea
Prior art keywords
layer
magnetic element
dielectric layer
lower layer
magnetic
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Expired - Fee Related
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KR1020087002469A
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English (en)
Korean (ko)
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KR20080045122A (ko
Inventor
시바난다 케이. 카나카사바파디
마이클 씨. 가이디스
Original Assignee
인터내셔널 비지네스 머신즈 코포레이션
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Publication of KR20080045122A publication Critical patent/KR20080045122A/ko
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Publication of KR101027226B1 publication Critical patent/KR101027226B1/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/10—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having two electrodes, e.g. diodes or MIM elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Thin Magnetic Films (AREA)
  • Magnetic Heads (AREA)
KR1020087002469A 2005-08-23 2006-05-04 자기 소자 및 자기 소자의 형성 방법 Expired - Fee Related KR101027226B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/209,951 2005-08-23
US11/209,951 US7399646B2 (en) 2005-08-23 2005-08-23 Magnetic devices and techniques for formation thereof

Publications (2)

Publication Number Publication Date
KR20080045122A KR20080045122A (ko) 2008-05-22
KR101027226B1 true KR101027226B1 (ko) 2011-04-06

Family

ID=37772063

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020087002469A Expired - Fee Related KR101027226B1 (ko) 2005-08-23 2006-05-04 자기 소자 및 자기 소자의 형성 방법

Country Status (7)

Country Link
US (2) US7399646B2 (enExample)
EP (1) EP1917678B1 (enExample)
JP (1) JP4939537B2 (enExample)
KR (1) KR101027226B1 (enExample)
CN (1) CN101288150B (enExample)
TW (1) TW200729412A (enExample)
WO (1) WO2007024300A2 (enExample)

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US20080124937A1 (en) * 2006-08-16 2008-05-29 Songlin Xu Selective etching method and apparatus
US7989224B2 (en) 2009-04-30 2011-08-02 International Business Machines Corporation Sidewall coating for non-uniform spin momentum-transfer magnetic tunnel junction current flow
JP5010650B2 (ja) * 2009-08-11 2012-08-29 株式会社東芝 磁気抵抗メモリ
US20110065276A1 (en) * 2009-09-11 2011-03-17 Applied Materials, Inc. Apparatus and Methods for Cyclical Oxidation and Etching
US8981502B2 (en) * 2010-03-29 2015-03-17 Qualcomm Incorporated Fabricating a magnetic tunnel junction storage element
EP3157060B1 (en) 2010-12-17 2018-03-07 Everspin Technologies, Inc. Magnetic random access memory integration having improved scaling
US8921959B2 (en) 2011-07-26 2014-12-30 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM device and fabrication method thereof
US8881209B2 (en) 2012-10-26 2014-11-04 Mobitv, Inc. Feedback loop content recommendation
US9172033B2 (en) 2013-07-03 2015-10-27 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM device and fabrication method thereof
US9318696B2 (en) 2014-03-03 2016-04-19 Qualcomm Incorporated Self-aligned top contact for MRAM fabrication
US9847473B2 (en) 2015-04-16 2017-12-19 Taiwan Semiconductor Manufacturing Co., Ltd. MRAM structure for process damage minimization
US9490168B1 (en) 2015-05-13 2016-11-08 International Business Machines Corporation Via formation using sidewall image transfer process to define lateral dimension
US10707411B1 (en) 2015-06-19 2020-07-07 Marvell International Ltd. MRAM structure for efficient manufacturability
US9502640B1 (en) * 2015-11-03 2016-11-22 International Business Machines Corporation Structure and method to reduce shorting in STT-MRAM device
CN108369852B (zh) * 2016-04-13 2021-05-28 深圳线易科技有限责任公司 具有集成磁性器件的转接板
US10276436B2 (en) 2016-08-05 2019-04-30 International Business Machines Corporation Selective recessing to form a fully aligned via
KR20190038945A (ko) 2016-08-29 2019-04-09 도쿄엘렉트론가부시키가이샤 실리콘 질화물의 준원자 층 에칭 방법
KR102537097B1 (ko) 2017-02-23 2023-05-25 도쿄엘렉트론가부시키가이샤 실리콘 질화물의 유사 원자층 에칭 방법
TWI761461B (zh) 2017-02-23 2022-04-21 日商東京威力科創股份有限公司 用於製造自對準塊體結構之矽氮化物心軸的異向性抽出方法
US9966337B1 (en) 2017-03-15 2018-05-08 International Business Machines Corporation Fully aligned via with integrated air gaps
CN107342240B (zh) * 2017-06-08 2020-12-25 上海华力微电子有限公司 一种检测晶圆表面氮化硅残留的方法
CN116456806A (zh) * 2018-06-08 2023-07-18 联华电子股份有限公司 半导体元件
US11374170B2 (en) * 2018-09-25 2022-06-28 Applied Materials, Inc. Methods to form top contact to a magnetic tunnel junction
US11488863B2 (en) 2019-07-15 2022-11-01 International Business Machines Corporation Self-aligned contact scheme for pillar-based memory elements
US11195993B2 (en) * 2019-09-16 2021-12-07 International Business Machines Corporation Encapsulation topography-assisted self-aligned MRAM top contact

Citations (3)

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KR19990065141A (ko) * 1998-01-08 1999-08-05 윤종용 자기 정렬된 콘택홀 형성방법
KR20050013543A (ko) * 2002-04-30 2005-02-04 마이크론 테크놀로지, 인크. 엠램 장치를 형성하는 방법
KR100485384B1 (ko) 2003-02-03 2005-04-27 삼성전자주식회사 반도체 소자의 제조방법

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JPH0432227A (ja) * 1990-05-29 1992-02-04 Matsushita Electric Ind Co Ltd コンタクトホール形成方法
US5640343A (en) 1996-03-18 1997-06-17 International Business Machines Corporation Magnetic memory array using magnetic tunnel junction devices in the memory cells
JP2000040691A (ja) * 1998-07-21 2000-02-08 Oki Electric Ind Co Ltd 半導体装置製造方法
US6165803A (en) * 1999-05-17 2000-12-26 Motorola, Inc. Magnetic random access memory and fabricating method thereof
DE10043159A1 (de) * 2000-09-01 2002-03-21 Infineon Technologies Ag Speicherzellenanordnung und Verfahren zu deren Herstellung
JP4123428B2 (ja) * 2001-11-30 2008-07-23 東京エレクトロン株式会社 エッチング方法
US6812040B2 (en) 2002-03-12 2004-11-02 Freescale Semiconductor, Inc. Method of fabricating a self-aligned via contact for a magnetic memory element
JP2003298015A (ja) * 2002-03-28 2003-10-17 Seiko Epson Corp 強誘電体メモリ装置およびその製造方法
JP2003347279A (ja) * 2002-05-24 2003-12-05 Renesas Technology Corp 半導体装置の製造方法
JP2004055918A (ja) * 2002-07-22 2004-02-19 Toshiba Corp 磁気記憶装置及びその製造方法
KR100533971B1 (ko) * 2002-12-12 2005-12-07 주식회사 하이닉스반도체 반도체 소자의 캐패시터 제조방법
JP4618989B2 (ja) * 2003-02-18 2011-01-26 三菱電機株式会社 磁気記憶半導体装置
US6881351B2 (en) * 2003-04-22 2005-04-19 Freescale Semiconductor, Inc. Methods for contacting conducting layers overlying magnetoelectronic elements of MRAM devices
US20040257861A1 (en) * 2003-06-17 2004-12-23 Berndt Dale F. Method of incorporating magnetic materials in a semiconductor manufacturing process
US6713802B1 (en) 2003-06-20 2004-03-30 Infineon Technologies Ag Magnetic tunnel junction patterning using SiC or SiN
US6783999B1 (en) 2003-06-20 2004-08-31 Infineon Technologies Ag Subtractive stud formation for MRAM manufacturing
US20050090119A1 (en) * 2003-10-24 2005-04-28 Heon Lee Magnetic tunnel junction device with dual-damascene conductor and dielectric spacer
JP2005191280A (ja) * 2003-12-25 2005-07-14 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法
KR100561859B1 (ko) * 2004-01-16 2006-03-16 삼성전자주식회사 컨택홀이 없는 나노 크기의 자기터널접합 셀 형성 방법
US7205164B1 (en) * 2005-01-19 2007-04-17 Silicon Magnetic Systems Methods for fabricating magnetic cell junctions and a structure resulting and/or used for such methods

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990065141A (ko) * 1998-01-08 1999-08-05 윤종용 자기 정렬된 콘택홀 형성방법
KR20050013543A (ko) * 2002-04-30 2005-02-04 마이크론 테크놀로지, 인크. 엠램 장치를 형성하는 방법
KR100485384B1 (ko) 2003-02-03 2005-04-27 삼성전자주식회사 반도체 소자의 제조방법

Also Published As

Publication number Publication date
CN101288150A (zh) 2008-10-15
KR20080045122A (ko) 2008-05-22
CN101288150B (zh) 2010-05-19
US8164128B2 (en) 2012-04-24
EP1917678A4 (en) 2012-08-22
TW200729412A (en) 2007-08-01
EP1917678A2 (en) 2008-05-07
EP1917678B1 (en) 2013-11-20
JP4939537B2 (ja) 2012-05-30
US20080043379A1 (en) 2008-02-21
JP2009506531A (ja) 2009-02-12
US20070048950A1 (en) 2007-03-01
WO2007024300A2 (en) 2007-03-01
WO2007024300A3 (en) 2008-06-05
US7399646B2 (en) 2008-07-15

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