KR100966189B1 - 샘플링 레이트 컨버터 시스템 - Google Patents
샘플링 레이트 컨버터 시스템 Download PDFInfo
- Publication number
- KR100966189B1 KR100966189B1 KR1020047008412A KR20047008412A KR100966189B1 KR 100966189 B1 KR100966189 B1 KR 100966189B1 KR 1020047008412 A KR1020047008412 A KR 1020047008412A KR 20047008412 A KR20047008412 A KR 20047008412A KR 100966189 B1 KR100966189 B1 KR 100966189B1
- Authority
- KR
- South Korea
- Prior art keywords
- sampling rate
- signal
- pixel domain
- rate converter
- orthogonal pixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0102—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving the resampling of the incoming video signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
- H04N5/45—Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Picture Signal Circuits (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Television Systems (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US33665001P | 2001-12-03 | 2001-12-03 | |
| US60/336,650 | 2001-12-03 | ||
| US10/190,185 | 2002-07-05 | ||
| US10/190,185 US6894725B2 (en) | 2001-12-03 | 2002-07-05 | Sample rate converter system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20050058261A KR20050058261A (ko) | 2005-06-16 |
| KR100966189B1 true KR100966189B1 (ko) | 2010-06-25 |
Family
ID=26885850
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020047008412A Expired - Lifetime KR100966189B1 (ko) | 2001-12-03 | 2002-11-25 | 샘플링 레이트 컨버터 시스템 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6894725B2 (https=) |
| EP (1) | EP1486066B1 (https=) |
| JP (1) | JP4353362B2 (https=) |
| KR (1) | KR100966189B1 (https=) |
| CN (1) | CN100380955C (https=) |
| AU (1) | AU2002365832A1 (https=) |
| MX (1) | MXPA04005117A (https=) |
| WO (1) | WO2003049436A1 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE60140805D1 (de) * | 2001-10-10 | 2010-01-28 | Texas Instruments Inc | Einrichtung und Verfahren zur Bildskalierung |
| US7409056B2 (en) * | 2002-12-16 | 2008-08-05 | Broadcom Corporation | Switchboard for dual-rate single-band communication system |
| US20080062312A1 (en) * | 2006-09-13 | 2008-03-13 | Jiliang Song | Methods and Devices of Using a 26 MHz Clock to Encode Videos |
| US20080062311A1 (en) * | 2006-09-13 | 2008-03-13 | Jiliang Song | Methods and Devices to Use Two Different Clocks in a Television Digital Encoder |
| US8537285B2 (en) * | 2007-03-14 | 2013-09-17 | Larry Silver | Carrier recovery system with phase noise suppression |
| US8902365B2 (en) * | 2007-03-14 | 2014-12-02 | Lance Greggain | Interference avoidance in a television receiver |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5335074A (en) | 1993-02-08 | 1994-08-02 | Panasonic Technologies, Inc. | Phase locked loop synchronizer for a resampling system having incompatible input and output sample rates |
| US5420643A (en) | 1990-06-01 | 1995-05-30 | Thomson Consumer Electronics, Inc. | Chrominance processing system for compressing and expanding video data |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3312074B2 (ja) * | 1994-01-24 | 2002-08-05 | シャープ株式会社 | 映像信号のディジタル記録及び再生装置 |
| DE4423226C1 (de) * | 1994-07-01 | 1995-08-24 | Harris Corp | Digitaler Dekoder für Videosignale und Verfahren zur digitalen Dekodierung von Videosignalen |
| KR0165512B1 (ko) * | 1996-01-29 | 1999-03-20 | 김광호 | 면적영향 상관방법 및 이를 이용한 디지탈 영상신호에 대한 클럭레이트 변환방법 및 장치 |
-
2002
- 2002-07-05 US US10/190,185 patent/US6894725B2/en not_active Expired - Lifetime
- 2002-11-25 WO PCT/US2002/037630 patent/WO2003049436A1/en not_active Ceased
- 2002-11-25 KR KR1020047008412A patent/KR100966189B1/ko not_active Expired - Lifetime
- 2002-11-25 CN CNB028239970A patent/CN100380955C/zh not_active Expired - Lifetime
- 2002-11-25 JP JP2003550497A patent/JP4353362B2/ja not_active Expired - Lifetime
- 2002-11-25 EP EP02791301.1A patent/EP1486066B1/en not_active Expired - Lifetime
- 2002-11-25 AU AU2002365832A patent/AU2002365832A1/en not_active Abandoned
- 2002-11-25 MX MXPA04005117A patent/MXPA04005117A/es active IP Right Grant
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5420643A (en) | 1990-06-01 | 1995-05-30 | Thomson Consumer Electronics, Inc. | Chrominance processing system for compressing and expanding video data |
| US5335074A (en) | 1993-02-08 | 1994-08-02 | Panasonic Technologies, Inc. | Phase locked loop synchronizer for a resampling system having incompatible input and output sample rates |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2003049436A1 (en) | 2003-06-12 |
| JP4353362B2 (ja) | 2009-10-28 |
| AU2002365832A1 (en) | 2003-06-17 |
| CN1600028A (zh) | 2005-03-23 |
| EP1486066A4 (en) | 2006-01-04 |
| EP1486066B1 (en) | 2013-05-01 |
| MXPA04005117A (es) | 2004-08-11 |
| EP1486066A1 (en) | 2004-12-15 |
| CN100380955C (zh) | 2008-04-09 |
| JP2005512414A (ja) | 2005-04-28 |
| KR20050058261A (ko) | 2005-06-16 |
| US20030103163A1 (en) | 2003-06-05 |
| US6894725B2 (en) | 2005-05-17 |
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| PA0105 | International application |
Patent event date: 20040602 Patent event code: PA01051R01D Comment text: International Patent Application |
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