KR100946020B1 - 하드마스크를 사용하여 금속-절연막-금속 커패시터를알루미늄 금속 배선 레벨과 동시에 형성하는 방법 - Google Patents

하드마스크를 사용하여 금속-절연막-금속 커패시터를알루미늄 금속 배선 레벨과 동시에 형성하는 방법 Download PDF

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KR100946020B1
KR100946020B1 KR1020067025149A KR20067025149A KR100946020B1 KR 100946020 B1 KR100946020 B1 KR 100946020B1 KR 1020067025149 A KR1020067025149 A KR 1020067025149A KR 20067025149 A KR20067025149 A KR 20067025149A KR 100946020 B1 KR100946020 B1 KR 100946020B1
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metal
hardmask
capacitor
layer
dielectric
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KR20070028392A (ko
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더글라스 디. 쿨바우그
에베네제르 이. 에šœ
나탈리 페일첸펠드
마이클 엘. 고트쉬
종-시앙 헤
매튜 디. 문
비드히아 라마찬드란
바바라 워터하우스
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인터내셔널 비지네스 머신즈 코포레이션
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223—Capacitor integral with wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/212—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020067025149A 2004-06-04 2005-05-26 하드마스크를 사용하여 금속-절연막-금속 커패시터를알루미늄 금속 배선 레벨과 동시에 형성하는 방법 Expired - Fee Related KR100946020B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/709,907 US7301752B2 (en) 2004-06-04 2004-06-04 Formation of metal-insulator-metal capacitor simultaneously with aluminum metal wiring level using a hardmask
US10/709,907 2004-06-04

Publications (2)

Publication Number Publication Date
KR20070028392A KR20070028392A (ko) 2007-03-12
KR100946020B1 true KR100946020B1 (ko) 2010-03-09

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KR1020067025149A Expired - Fee Related KR100946020B1 (ko) 2004-06-04 2005-05-26 하드마스크를 사용하여 금속-절연막-금속 커패시터를알루미늄 금속 배선 레벨과 동시에 형성하는 방법

Country Status (7)

Country Link
US (2) US7301752B2 (enExample)
EP (1) EP1792343A4 (enExample)
JP (1) JP4900831B2 (enExample)
KR (1) KR100946020B1 (enExample)
CN (1) CN1954263B (enExample)
TW (1) TW200603370A (enExample)
WO (1) WO2005122245A2 (enExample)

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US20060091496A1 (en) * 2004-10-28 2006-05-04 Hewlett-Packard Development Company, Lp Metal-insulator-metal device
KR100824627B1 (ko) * 2006-12-22 2008-04-25 동부일렉트로닉스 주식회사 반도체 소자의 제조방법
JP4600687B2 (ja) * 2007-03-29 2010-12-15 Ｔｄｋ株式会社 電子部品およびその製造方法
US8629488B2 (en) * 2008-04-23 2014-01-14 Semiconductor Components Industries, Llc Method for manufacturing an energy storage device and structure therefor
TWI382523B (zh) * 2008-07-09 2013-01-11 United Microelectronics Corp 金屬－金屬電容及其製法
KR101090932B1 (ko) * 2008-12-24 2011-12-08 매그나칩 반도체 유한회사 캐패시터 및 그의 제조방법
US8445991B2 (en) 2008-12-24 2013-05-21 Magnachip Semiconductor, Ltd. Semiconductor device with MIM capacitor and method for manufacturing the same
US8191217B2 (en) * 2009-08-05 2012-06-05 International Business Machines Corporation Complimentary metal-insulator-metal (MIM) capacitors and method of manufacture
US10497773B2 (en) 2014-03-31 2019-12-03 Taiwan Semiconductor Manufacturing Co., Ltd. Method to improve MIM device performance
US9412806B2 (en) 2014-06-13 2016-08-09 Invensas Corporation Making multilayer 3D capacitors using arrays of upstanding rods or ridges
US9548349B2 (en) 2014-06-25 2017-01-17 International Business Machines Corporation Semiconductor device with metal extrusion formation
US9793339B2 (en) * 2015-01-08 2017-10-17 Taiwan Semiconductor Manufacturing Co., Ltd. Method for preventing copper contamination in metal-insulator-metal (MIM) capacitors
US9397038B1 (en) 2015-02-27 2016-07-19 Invensas Corporation Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
US11114373B1 (en) 2020-02-26 2021-09-07 Taiwan Semiconductor Manufacturing Co., Ltd. Metal-insulator-metal structure
CN113725164B (zh) * 2020-05-26 2023-07-04 长鑫存储技术有限公司 电容孔形成方法
KR102428994B1 (ko) * 2021-03-29 2022-08-04 주식회사 키파운드리 반도체 소자 제조 방법
US11961880B2 (en) 2021-05-06 2024-04-16 Taiwan Semiconductor Manufacturing Company, Ltd. Metal-insulator-metal structure

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US6319767B1 (en) * 2001-03-05 2001-11-20 Chartered Semiconductor Manufacturing Ltd. Method to eliminate top metal corner shaping during bottom metal patterning for MIM capacitors via plasma ashing and hard masking technique
US6461914B1 (en) * 2001-08-29 2002-10-08 Motorola, Inc. Process for making a MIM capacitor

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US6461914B1 (en) * 2001-08-29 2002-10-08 Motorola, Inc. Process for making a MIM capacitor

Also Published As

Publication number Publication date
US7301752B2 (en) 2007-11-27
EP1792343A2 (en) 2007-06-06
WO2005122245A3 (en) 2006-10-05
US7511940B2 (en) 2009-03-31
JP2008502144A (ja) 2008-01-24
CN1954263B (zh) 2010-07-21
TW200603370A (en) 2006-01-16
EP1792343A4 (en) 2009-11-11
US20080019077A1 (en) 2008-01-24
JP4900831B2 (ja) 2012-03-21
CN1954263A (zh) 2007-04-25
US20050272219A1 (en) 2005-12-08
WO2005122245A2 (en) 2005-12-22
KR20070028392A (ko) 2007-03-12

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