KR100885895B1 - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

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Publication number
KR100885895B1
KR100885895B1 KR1020070066111A KR20070066111A KR100885895B1 KR 100885895 B1 KR100885895 B1 KR 100885895B1 KR 1020070066111 A KR1020070066111 A KR 1020070066111A KR 20070066111 A KR20070066111 A KR 20070066111A KR 100885895 B1 KR100885895 B1 KR 100885895B1
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KR
South Korea
Prior art keywords
interlayer insulating
substrate
forming
heat treatment
gate structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020070066111A
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English (en)
Korean (ko)
Other versions
KR20090002609A (ko
Inventor
홍종원
최길현
이종명
성금중
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR1020070066111A priority Critical patent/KR100885895B1/ko
Priority to JP2008168937A priority patent/JP2009016828A/ja
Priority to US12/165,805 priority patent/US7972941B2/en
Publication of KR20090002609A publication Critical patent/KR20090002609A/ko
Application granted granted Critical
Publication of KR100885895B1 publication Critical patent/KR100885895B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01338—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
KR1020070066111A 2007-07-02 2007-07-02 반도체 장치의 제조 방법 Expired - Fee Related KR100885895B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020070066111A KR100885895B1 (ko) 2007-07-02 2007-07-02 반도체 장치의 제조 방법
JP2008168937A JP2009016828A (ja) 2007-07-02 2008-06-27 半導体装置の製造方法
US12/165,805 US7972941B2 (en) 2007-07-02 2008-07-01 Method of manufacturing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070066111A KR100885895B1 (ko) 2007-07-02 2007-07-02 반도체 장치의 제조 방법

Publications (2)

Publication Number Publication Date
KR20090002609A KR20090002609A (ko) 2009-01-09
KR100885895B1 true KR100885895B1 (ko) 2009-02-26

Family

ID=40221792

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070066111A Expired - Fee Related KR100885895B1 (ko) 2007-07-02 2007-07-02 반도체 장치의 제조 방법

Country Status (3)

Country Link
US (1) US7972941B2 (https=)
JP (1) JP2009016828A (https=)
KR (1) KR100885895B1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7943511B2 (en) * 2009-07-17 2011-05-17 United Microelectronics Corp. Semiconductor process
US8669644B2 (en) * 2009-10-07 2014-03-11 Texas Instruments Incorporated Hydrogen passivation of integrated circuits
CN104810280A (zh) * 2014-01-27 2015-07-29 北大方正集团有限公司 半导体器件的制造方法
US11152372B2 (en) * 2020-02-25 2021-10-19 Micron Technology, Inc. Method used in forming integrated circuitry, and method used in forming memory circuitry

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990006655A (ko) * 1997-06-04 1999-01-25 가네꼬 히사시 반도체 장치를 제조하는 방법
KR20070002407A (ko) * 2005-06-30 2007-01-05 주식회사 하이닉스반도체 반도체 소자의 제조방법

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0774167A (ja) * 1993-06-30 1995-03-17 Kawasaki Steel Corp 半導体装置の製造方法
EP0634797B1 (en) * 1993-07-13 1999-09-22 Sony Corporation Thin film semiconductor device for active matrix panel and method of manufacturing the same
US5627089A (en) * 1993-08-02 1997-05-06 Goldstar Co., Ltd. Method for fabricating a thin film transistor using APCVD
JPH09213698A (ja) * 1996-01-31 1997-08-15 Fujitsu Ltd 配線形成方法
JPH11150084A (ja) * 1997-09-12 1999-06-02 Canon Inc 半導体装置および基板上への非晶質窒化硅素チタンの形成方法
JP2000003960A (ja) * 1998-06-12 2000-01-07 Hitachi Ltd 半導体装置及びその製造方法
JP3173597B2 (ja) * 1998-11-26 2001-06-04 日本電気株式会社 半導体装置及びその製造方法
JP3827056B2 (ja) 1999-03-17 2006-09-27 キヤノンマーケティングジャパン株式会社 層間絶縁膜の形成方法及び半導体装置
JP2000286254A (ja) * 1999-03-31 2000-10-13 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP3544340B2 (ja) 1999-05-07 2004-07-21 新光電気工業株式会社 半導体装置の製造方法
JP2001077196A (ja) * 1999-09-08 2001-03-23 Sony Corp 半導体装置の製造方法
KR100391992B1 (ko) 2000-12-08 2003-07-22 삼성전자주식회사 저유전율 층간절연막을 가지는 반도체 장치 형성 방법
JP4257051B2 (ja) * 2001-08-10 2009-04-22 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP2003204055A (ja) * 2002-01-09 2003-07-18 Sony Corp 固体撮像装置およびその製造方法
JP4319078B2 (ja) * 2004-03-26 2009-08-26 シャープ株式会社 半導体装置の製造方法
JP4729863B2 (ja) * 2004-04-20 2011-07-20 ソニー株式会社 半導体記憶装置及びその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990006655A (ko) * 1997-06-04 1999-01-25 가네꼬 히사시 반도체 장치를 제조하는 방법
KR20070002407A (ko) * 2005-06-30 2007-01-05 주식회사 하이닉스반도체 반도체 소자의 제조방법

Also Published As

Publication number Publication date
US7972941B2 (en) 2011-07-05
US20090011583A1 (en) 2009-01-08
KR20090002609A (ko) 2009-01-09
JP2009016828A (ja) 2009-01-22

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