KR100881065B1 - 수동 소자용 모노리식 저 유전율 플랫폼 및 그 제조방법 - Google Patents

수동 소자용 모노리식 저 유전율 플랫폼 및 그 제조방법 Download PDF

Info

Publication number
KR100881065B1
KR100881065B1 KR1020017016826A KR20017016826A KR100881065B1 KR 100881065 B1 KR100881065 B1 KR 100881065B1 KR 1020017016826 A KR1020017016826 A KR 1020017016826A KR 20017016826 A KR20017016826 A KR 20017016826A KR 100881065 B1 KR100881065 B1 KR 100881065B1
Authority
KR
South Korea
Prior art keywords
dielectric
forming
silicon substrate
platform
sidewalls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020017016826A
Other languages
English (en)
Korean (ko)
Other versions
KR20020019474A (ko
Inventor
로버트 브루스 데이비스
Original Assignee
로버트 브루스 데이비스
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 로버트 브루스 데이비스 filed Critical 로버트 브루스 데이비스
Publication of KR20020019474A publication Critical patent/KR20020019474A/ko
Application granted granted Critical
Publication of KR100881065B1 publication Critical patent/KR100881065B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/764Air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/645Inductive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020017016826A 1999-07-12 2000-07-11 수동 소자용 모노리식 저 유전율 플랫폼 및 그 제조방법 Expired - Fee Related KR100881065B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/351,714 US6307247B1 (en) 1999-07-12 1999-07-12 Monolithic low dielectric constant platform for passive components and method
US09/351,714 1999-07-12

Publications (2)

Publication Number Publication Date
KR20020019474A KR20020019474A (ko) 2002-03-12
KR100881065B1 true KR100881065B1 (ko) 2009-01-30

Family

ID=23382054

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020017016826A Expired - Fee Related KR100881065B1 (ko) 1999-07-12 2000-07-11 수동 소자용 모노리식 저 유전율 플랫폼 및 그 제조방법

Country Status (6)

Country Link
US (4) US6307247B1 (enExample)
EP (1) EP1198837A4 (enExample)
JP (1) JP2003504875A (enExample)
KR (1) KR100881065B1 (enExample)
AU (1) AU6092500A (enExample)
WO (1) WO2001004955A1 (enExample)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1043770B1 (en) * 1999-04-09 2006-03-01 STMicroelectronics S.r.l. Formation of buried cavities in a monocrystalline semiconductor wafer and a wafer
US6307247B1 (en) 1999-07-12 2001-10-23 Robert Bruce Davies Monolithic low dielectric constant platform for passive components and method
EP1130631A1 (en) * 2000-02-29 2001-09-05 STMicroelectronics S.r.l. Process for forming a buried cavity in a semiconductor material wafer
US7294536B2 (en) * 2000-07-25 2007-11-13 Stmicroelectronics S.R.L. Process for manufacturing an SOI wafer by annealing and oxidation of buried channels
DE10041691A1 (de) * 2000-08-24 2002-03-14 Infineon Technologies Ag Halbleiteranordnung
FR2823377B1 (fr) 2001-04-06 2004-07-16 St Microelectronics Sa Ligne conductrice haute frequence sur un circuit integre
FR2826179A1 (fr) * 2001-06-14 2002-12-20 St Microelectronics Sa Tranchee d'isolement profonde et procede de realisation
DE10144847A1 (de) * 2001-09-12 2003-03-27 Infineon Technologies Ag Verfahren zur Herstellung einer Membran
US6621136B2 (en) 2001-09-28 2003-09-16 Semiconductor Components Industries Llc Semiconductor device having regions of low substrate capacitance
FR2830670A1 (fr) * 2001-10-10 2003-04-11 St Microelectronics Sa Inductance et son procede de fabrication
US6498069B1 (en) 2001-10-17 2002-12-24 Semiconductor Components Industries Llc Semiconductor device and method of integrating trench structures
US20030146490A1 (en) * 2002-02-07 2003-08-07 Semiconductor Components Industries, Llc. Semiconductor device and method of providing regions of low substrate capacitance
US6661068B2 (en) 2002-03-20 2003-12-09 Semiconductor Components Industries Llc Semiconductor device and method of providing regions of low substrate capacitance
DE10242661A1 (de) * 2002-09-13 2004-03-25 Conti Temic Microelectronic Gmbh Verfahren zum Herstellen von Isolationsstrukturen
JP4190931B2 (ja) 2003-03-28 2008-12-03 三菱電機株式会社 半導体装置
US6835631B1 (en) 2003-11-20 2004-12-28 Chartered Semiconductor Manufacturing Ltd Method to enhance inductor Q factor by forming air gaps below inductors
KR100538810B1 (ko) * 2003-12-29 2005-12-23 주식회사 하이닉스반도체 반도체소자의 소자분리 방법
US20070057289A1 (en) 2004-01-10 2007-03-15 Davies Robert B Power semiconductor device and method therefor
US7087925B2 (en) * 2004-02-09 2006-08-08 Semiconductor Components Industries, L.L.C. Semiconductor device having reduced capacitance to substrate and method
US7339253B2 (en) * 2004-08-16 2008-03-04 Taiwan Semiconductor Manufacturing Company Retrograde trench isolation structures
US7396732B2 (en) * 2004-12-17 2008-07-08 Interuniversitair Microelektronica Centrum Vzw (Imec) Formation of deep trench airgaps and related applications
US8530963B2 (en) 2005-01-06 2013-09-10 Estivation Properties Llc Power semiconductor device and method therefor
US7425485B2 (en) * 2005-09-30 2008-09-16 Freescale Semiconductor, Inc. Method for forming microelectronic assembly
DE102006001386A1 (de) * 2005-12-20 2007-06-21 Robert Bosch Gmbh Verfahren zum Herstellen einer Membran auf einem Halbleitersubstrat und mikromechanisches Bauelement mit einer solchen Membran
US7656003B2 (en) * 2006-08-25 2010-02-02 Hvvi Semiconductors, Inc Electrical stress protection apparatus and method of manufacture
JP5403862B2 (ja) * 2006-11-28 2014-01-29 チェイル インダストリーズ インコーポレイテッド 微細金属パターンの製造方法
US7888746B2 (en) * 2006-12-15 2011-02-15 Hvvi Semiconductors, Inc. Semiconductor structure and method of manufacture
US8120094B2 (en) * 2007-08-14 2012-02-21 Taiwan Semiconductor Manufacturing Co., Ltd. Shallow trench isolation with improved structure and method of forming
US20100230776A1 (en) * 2007-12-11 2010-09-16 Bishnu Prasanna Gogoi Semiconductor structure and method of manufacture
US20090146249A1 (en) * 2007-12-11 2009-06-11 Gogoi Bishnu P Semiconductor structure and method of manufacture
US7811896B2 (en) * 2007-12-11 2010-10-12 Hvvi Semiconductors, Inc. Semiconductor structure and method of manufacture
DE102010000888B4 (de) 2010-01-14 2019-03-28 Robert Bosch Gmbh Verfahren zum Ausbilden von Aussparungen in einem Halbleiterbauelement und mit dem Verfahren hergestelltes Bauelement
US8524548B2 (en) * 2011-04-26 2013-09-03 National Semiconductor Corporation DMOS Transistor with a cavity that lies below the drift region
CN102815662A (zh) * 2011-06-08 2012-12-12 无锡华润上华半导体有限公司 一种在半导体衬底中制备腔体的方法
CN102320560A (zh) * 2011-09-14 2012-01-18 上海先进半导体制造股份有限公司 Mems器件的薄膜制造方法
US9355972B2 (en) * 2014-03-04 2016-05-31 International Business Machines Corporation Method for making a dielectric region in a bulk silicon substrate providing a high-Q passive resonator
CN106477513B (zh) * 2015-08-28 2017-12-05 中国科学院上海微系统与信息技术研究所 单晶硅压力敏感膜片结构及其制作方法
DE102016115334B4 (de) * 2016-08-18 2023-11-09 Infineon Technologies Ag SOI-Insel in einem Leistungshalbleiterbauelement und ein Verfahren zu dessen Herstellung
US10283249B2 (en) 2016-09-30 2019-05-07 International Business Machines Corporation Method for fabricating a magnetic material stack
US20180102315A1 (en) * 2016-10-11 2018-04-12 Globalfoundries Inc. Surface area-dependent semiconductor device with increased surface area
US10461152B2 (en) 2017-07-10 2019-10-29 Globalfoundries Inc. Radio frequency switches with air gap structures
US10446643B2 (en) 2018-01-22 2019-10-15 Globalfoundries Inc. Sealed cavity structures with a planar surface
US11410872B2 (en) * 2018-11-30 2022-08-09 Globalfoundries U.S. Inc. Oxidized cavity structures within and under semiconductor devices
US10923577B2 (en) 2019-01-07 2021-02-16 Globalfoundries U.S. Inc. Cavity structures under shallow trench isolation regions
US11127816B2 (en) 2020-02-14 2021-09-21 Globalfoundries U.S. Inc. Heterojunction bipolar transistors with one or more sealed airgap

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5519250A (en) * 1994-05-31 1996-05-21 Numata; Ken Reliability of metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4169000A (en) * 1976-09-02 1979-09-25 International Business Machines Corporation Method of forming an integrated circuit structure with fully-enclosed air isolation
JPS59172246A (ja) * 1983-03-18 1984-09-28 Seiko Instr & Electronics Ltd 凹部分離半導体装置とその製造方法
GB2156149A (en) 1984-03-14 1985-10-02 Philips Electronic Associated Dielectrically-isolated integrated circuit manufacture
JPS61135151A (ja) * 1984-12-05 1986-06-23 Mitsubishi Electric Corp 半導体記憶装置
US4888300A (en) * 1985-11-07 1989-12-19 Fairchild Camera And Instrument Corporation Submerged wall isolation of silicon islands
JPS6430724A (en) 1987-07-27 1989-02-01 Kokusan Kinzoku Kogyo Kk Mold assembly of resin
JPH01315161A (ja) * 1988-06-15 1989-12-20 Fujitsu Ltd 半導体装置の製造方法
JPH0821619B2 (ja) * 1989-10-13 1996-03-04 株式会社東芝 半導体装置
JPH0697400A (ja) 1990-11-29 1994-04-08 Texas Instr Inc <Ti> Soiウェーハ及びその製造方法
US5207866A (en) 1991-01-17 1993-05-04 Motorola, Inc. Anisotropic single crystal silicon etching solution and method
US5254491A (en) 1991-09-23 1993-10-19 Motorola, Inc. Method of making a semiconductor device having improved frequency response
US5208167A (en) 1991-09-30 1993-05-04 Rohm Co., Ltd. Method for producing SOI substrate
JP3153632B2 (ja) 1992-06-11 2001-04-09 ローム株式会社 Soi構造の製造方法
WO1994017558A1 (en) 1993-01-29 1994-08-04 The Regents Of The University Of California Monolithic passive component
ATE269588T1 (de) * 1993-02-04 2004-07-15 Cornell Res Foundation Inc Mikrostrukturen und einzelmask, einkristall- herstellungsverfahren
US5426070A (en) * 1993-05-26 1995-06-20 Cornell Research Foundation, Inc. Microstructures and high temperature isolation process for fabrication thereof
US5308786A (en) * 1993-09-27 1994-05-03 United Microelectronics Corporation Trench isolation for both large and small areas by means of silicon nodules after metal etching
US5516720A (en) * 1994-02-14 1996-05-14 United Microelectronics Corporation Stress relaxation in dielectric before metallization
US5478773A (en) 1994-04-28 1995-12-26 Motorola, Inc. Method of making an electronic device having an integrated inductor
US5444007A (en) * 1994-08-03 1995-08-22 Kabushiki Kaisha Toshiba Formation of trenches having different profiles
US6207494B1 (en) * 1994-12-29 2001-03-27 Infineon Technologies Corporation Isolation collar nitride liner for DRAM process improvement
KR0159075B1 (ko) * 1995-11-11 1998-12-01 김광호 트렌치 dmos장치 및 그의 제조방법
US5869880A (en) * 1995-12-29 1999-02-09 International Business Machines Corporation Structure and fabrication method for stackable, air-gap-containing low epsilon dielectric layers
US5792706A (en) * 1996-06-05 1998-08-11 Advanced Micro Devices, Inc. Interlevel dielectric with air gaps to reduce permitivity
KR100234408B1 (ko) * 1997-02-17 1999-12-15 윤종용 반도체장치의 소자분리방법
TW396460B (en) * 1998-01-09 2000-07-01 United Microelectronics Corp Metal oxide semiconductor transistor structure and its manufacturing method
US6265741B1 (en) * 1998-04-06 2001-07-24 Siemens Aktiengesellschaft Trench capacitor with epi buried layer
US6232171B1 (en) * 1999-01-11 2001-05-15 Promos Technology, Inc. Technique of bottle-shaped deep trench formation
US6180995B1 (en) 1999-05-06 2001-01-30 Spectrian Corporation Integrated passive devices with reduced parasitic substrate capacitance
US6307247B1 (en) 1999-07-12 2001-10-23 Robert Bruce Davies Monolithic low dielectric constant platform for passive components and method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5519250A (en) * 1994-05-31 1996-05-21 Numata; Ken Reliability of metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers

Also Published As

Publication number Publication date
US20020137349A1 (en) 2002-09-26
JP2003504875A (ja) 2003-02-04
US6307247B1 (en) 2001-10-23
KR20020019474A (ko) 2002-03-12
US20020017698A1 (en) 2002-02-14
USRE41581E1 (en) 2010-08-24
WO2001004955A1 (en) 2001-01-18
AU6092500A (en) 2001-01-30
EP1198837A4 (en) 2007-08-01
EP1198837A1 (en) 2002-04-24
US6617252B2 (en) 2003-09-09
US6512283B2 (en) 2003-01-28

Similar Documents

Publication Publication Date Title
KR100881065B1 (ko) 수동 소자용 모노리식 저 유전율 플랫폼 및 그 제조방법
US6274920B1 (en) Integrated inductor device and method for fabricating the same
KR100232319B1 (ko) 캐패시터 형성 방법 및 에스오아이 회로용 캐패시터
EP1595268B1 (en) Capacitor, semiconductor device with a capacitor and method of manufacturing thereof
US6844241B2 (en) Fabrication of semiconductor structures having multiple conductive layers in an opening
US5472900A (en) Capacitor fabricated on a substrate containing electronic circuitry
JP4801356B2 (ja) 深溝エアギャップの形成とその関連応用
US6759746B1 (en) Die attachment and method
US9818688B2 (en) Dielectric region in a bulk silicon substrate providing a high-Q passive resonator
US10923577B2 (en) Cavity structures under shallow trench isolation regions
US6285069B1 (en) Semiconductor device having improved parasitic capacitance and mechanical strength
US7276425B2 (en) Semiconductor device and method of providing regions of low substrate capacitance
JP4135564B2 (ja) 半導体基板およびその製造方法
US6551902B1 (en) Process for fabricating a buried, laterally insulated zone of increased conductivity in a semiconductor substrate
JP2001223331A (ja) 半導体装置及びその製造方法
US5773353A (en) Method of fabricating a semiconductor substrate
KR100304360B1 (ko) 기판내에공기가채워진트렌치를구비하는집적소자및그제조방법
WO1996024161A1 (en) Electronic device and process for making same
GB2346259A (en) Via connections in wafer bonded structures

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20120123

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20120123

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000