KR100738699B1 - 도핑에 독립적인 폴리실리콘용 자기세정 에칭 방법 - Google Patents

도핑에 독립적인 폴리실리콘용 자기세정 에칭 방법 Download PDF

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Publication number
KR100738699B1
KR100738699B1 KR1020017000684A KR20017000684A KR100738699B1 KR 100738699 B1 KR100738699 B1 KR 100738699B1 KR 1020017000684 A KR1020017000684 A KR 1020017000684A KR 20017000684 A KR20017000684 A KR 20017000684A KR 100738699 B1 KR100738699 B1 KR 100738699B1
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South Korea
Prior art keywords
gas
etching
process chamber
substrate
etch
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Expired - Fee Related
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KR1020017000684A
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English (en)
Korean (ko)
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KR20010053548A (ko
Inventor
파드마파니 날란
제프리 친
스티븐 유엔
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어플라이드 머티어리얼스, 인코포레이티드
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Publication of KR20010053548A publication Critical patent/KR20010053548A/ko
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/08—Etching
    • C30B33/12—Etching in gas atmosphere or plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/905—Cleaning of reaction chamber

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
KR1020017000684A 1998-07-16 1999-06-30 도핑에 독립적인 폴리실리콘용 자기세정 에칭 방법 Expired - Fee Related KR100738699B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/116,621 1998-07-16
US09/116,621 US6322714B1 (en) 1997-11-12 1998-07-16 Process for etching silicon-containing material on substrates

Publications (2)

Publication Number Publication Date
KR20010053548A KR20010053548A (ko) 2001-06-25
KR100738699B1 true KR100738699B1 (ko) 2007-07-12

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KR1020017000684A Expired - Fee Related KR100738699B1 (ko) 1998-07-16 1999-06-30 도핑에 독립적인 폴리실리콘용 자기세정 에칭 방법

Country Status (6)

Country Link
US (1) US6322714B1 (enExample)
EP (1) EP1109955A1 (enExample)
JP (1) JP2002520872A (enExample)
KR (1) KR100738699B1 (enExample)
TW (1) TW449822B (enExample)
WO (1) WO2000004213A1 (enExample)

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US20040009667A1 (en) * 2002-02-07 2004-01-15 Etsuo Iijima Etching method
US6451647B1 (en) 2002-03-18 2002-09-17 Advanced Micro Devices, Inc. Integrated plasma etch of gate and gate dielectric and low power plasma post gate etch removal of high-K residual
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KR100838370B1 (ko) 2006-03-31 2008-06-13 주식회사 하이닉스반도체 하드마스크 형성 방법 및 그를 이용한 스토리지노드홀 형성방법
KR100842675B1 (ko) * 2006-12-27 2008-06-30 동부일렉트로닉스 주식회사 트랜지스터의 폴리 게이트에 대한 식각 방법
US8118946B2 (en) 2007-11-30 2012-02-21 Wesley George Lau Cleaning process residues from substrate processing chamber components
US8754530B2 (en) * 2008-08-18 2014-06-17 International Business Machines Corporation Self-aligned borderless contacts for high density electronic and memory device integration
KR20100069392A (ko) * 2008-12-16 2010-06-24 삼성전자주식회사 증착, 식각 혹은 클리닝 공정에서 증착, 식각 혹은 클리닝 종료 시점을 결정하기 위하여 수정 결정 미소저울을 이용하는 반도체 소자의 제조장치 및 이를 이용한 제조방법
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DE102017210450A1 (de) * 2017-06-21 2018-12-27 Siltronic Ag Verfahren, Steuerungssystem und Anlage zum Bearbeiten einer Halbleiterscheibe sowie Halbleiterscheibe
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Also Published As

Publication number Publication date
TW449822B (en) 2001-08-11
EP1109955A1 (en) 2001-06-27
WO2000004213A1 (en) 2000-01-27
US6322714B1 (en) 2001-11-27
KR20010053548A (ko) 2001-06-25
JP2002520872A (ja) 2002-07-09

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