KR100685160B1 - 반도체 디바이스에 몰딩 화합물의 접착을 강화하기 위한코팅 - Google Patents
반도체 디바이스에 몰딩 화합물의 접착을 강화하기 위한코팅 Download PDFInfo
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- KR100685160B1 KR100685160B1 KR1020050126947A KR20050126947A KR100685160B1 KR 100685160 B1 KR100685160 B1 KR 100685160B1 KR 1020050126947 A KR1020050126947 A KR 1020050126947A KR 20050126947 A KR20050126947 A KR 20050126947A KR 100685160 B1 KR100685160 B1 KR 100685160B1
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- polymer
- semiconductor device
- coating
- primer
- lead frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
Abstract
Description
샘플 | 프라이머 농도 | 베이킹 조건 | 랩-전단 강도 | 표준편차 |
% | ℃×min | MPa | ||
순수 구리 | 없음 | 없음 | 2.0 | 0.5 |
프라이머를 가진 구리 | 0.02 | 180×10 | 2.4 | 0.6 |
0.1 | 180×10 | 4.1 | 1.0 | |
0.4 | 180×10 | 5.8 | 0.4 | |
2.0 | 180×10 | 10.5 | 0.9 | |
5.0 | 180×3 | 10.5 | 1.0 | |
10.0 | 180×10 | 10.2 | 0.7 | |
Pd 마무리 구리 | 5.0 | 180×3 | 6.4 | 0.2 |
Au 마무리 구리 | 5.0 | 180×3 | 6.5 | 0.7 |
샘플 | 프라이머 농도 | 베이킹 조건 | 버튼 전단 부하 | 표준편차 |
% | ℃×분 | N | ||
순수 구리 | 없음 | 없음 | 82.0 | 30 |
코팅된 구리 I | 10 | 180×3 | 213.8 | 40 |
코팅된 구리 II | 10 | 200×10 | 281.7 | 10 |
샘플 | 프라이머 농도 | 베이킹 조건 | 버튼 전단 부하 | 표준편차 |
% | ℃×분 | N | ||
순수 구리 | 없음 | 없음 | 82.0 | 30 |
Ni 도금된 구리 | 10 | 180×5 | 228.0 | 23 |
Ag 도금된 구리 | 10 | 180×5 | 254.1 | 13 |
Claims (21)
- 반도체 디바이스를 몰딩하기 전에 캐리어 상에 부착된 반도체 칩을 포함하는 반도체 디바이스 및 몰딩 화합물 사이의 접착을 강화하기 위한 방법에 있어서,상기 반도체 디바이스를 중합체 프라이머로 코팅하는 단계를 포함하는 접착강화방법.
- 제 1항에 있어서, 상기 반도체 디바이스는 상기 반도체 칩 및 상기 캐리어 사이에 형성된 도전성 와이어 접속부들을 포함하며;상기 코팅 단계는 몰딩전에 상기 와이어 접속부들을 상기 중합체 프라이머로 코팅하는 단계를 포함하는 접착강화방법.
- 제 1항에 있어서, 상기 중합체 프라이머는 질소함유 중합체 화합물을 포함하는 접착강화방법.
- 제 3항에 있어서, 상기 질소함유 중합체 화합물은 멜라민 변형 페놀 수지, 아크릴 공중합체 및 벤지미다졸 공중합체(benzimidazole copolymer)로 이루어진 그룹으로부터 선택되는 접착강화방법.
- 제 4항에 있어서, 상기 페놀 수지는 알데히드와 다기능 페놀의 반응을 통해 생성되는 접착강화방법.
- 제 5항에 있어서, 상기 다기능 페놀은 페놀, 크레졸(cresol), 비스페놀 A, 비스페놀 F, 비스페놀 S 및 지방족 사슬(aliphatic chain) 페놀로 이루어진 그룹으로부터 선택되는 접착강화방법.
- 제 1항에 있어서, 상기 중합체 프라이머는 용매로 용해된 하나 이상의 중합체들에 의하여 구성된 용액을 포함하는 접착강화방법.
- 제 7항에 있어서, 상기 용액은 0.01 중량 % 내지 50 중량 % 중합체를 포함하는 접착강화방법.
- 제 8항에 있어서, 상기 용액은 1.0 중량 % 내지 10 중량 % 중합체를 포함하는 접착강화방법.
- 제 7항에 있어서, 상기 중합체는 멜라민 변형 페놀 수지를 포함하며, 상기 용매는 물 및 알콜을 포함하는 접착강화방법.
- 제 10항에 있어서, 상기 알콜은 메탄올, 에탄올, 프로판올 및 부탄올로 이루어진 그룹으로부터 선택되는 접착강화방법.
- 제 7항에 있어서, 상기 중합체는 아크릴 공중합체를 포함하며, 상기 용매는 알콜, 에테르, 에스테르, 케톤, 알칸, 및 사이클로알칸(cycloalkane)으로 이루어진 그룹으로부터 선택되는 접착강화방법.
- 제 7항에 있어서, 상기 중합체는 벤지미다졸 공중합체를 포함하며, 상기 용매는 디메틸 포름아미드 및/또는 N-메틸 피롤리돈(N-methyl pyrrolidone)을 포함하는 접착강화방법.
- 제 1항에 있어서, 상기 중합체 프라이머는 중합성 라텍스를 포함하는 접착강화방법.
- 제 1항에 있어서, 상기 반도체 디바이스를 중합체 프라이머로 코팅하기 전에 상기 반도체 디바이스를 플라즈마로 세정하는 단계를 추가로 포함하는 접착강화방법.
- 제 1항에 있어서, 상기 반도체 디바이스를 상기 중합체 프라이머로 코팅하는 단계 이후에 1분 내지 30분동안 60℃ 내지 260℃로 상기 반도체 디바이스를 베이킹(baking) 단계를 추가로 포함하는 접착강화방법.
- 제 16항에 있어서, 상기 반도체 디바이스는 160℃ 내지 210℃로 베이킹되는(baked) 접착강화방법.
- 제 16항에 있어서, 상기 반도체 디바이스는 3분 내지 5분동안 베이킹되는 접착강화방법.
- 제 1항에 있어서, 상기 중합체 코팅의 두께는 10nm 내지 0.1mm인 접착강화방법.
- 제 1항에 있어서, 상기 중합체 코팅의 두께는 300nm 내지 30μm인 접착강화방법.
- 제 1항에 따른 방법에 따라 처리된 반도체 패키지.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/019,421 | 2004-12-22 | ||
US11/019,421 US7329617B2 (en) | 2004-12-22 | 2004-12-22 | Coating for enhancing adhesion of molding compound to semiconductor devices |
Publications (2)
Publication Number | Publication Date |
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KR20060072068A KR20060072068A (ko) | 2006-06-27 |
KR100685160B1 true KR100685160B1 (ko) | 2007-02-22 |
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KR1020050126947A KR100685160B1 (ko) | 2004-12-22 | 2005-12-21 | 반도체 디바이스에 몰딩 화합물의 접착을 강화하기 위한코팅 |
Country Status (8)
Country | Link |
---|---|
US (1) | US7329617B2 (ko) |
EP (1) | EP1675172A1 (ko) |
JP (1) | JP4402649B2 (ko) |
KR (1) | KR100685160B1 (ko) |
CN (1) | CN100383941C (ko) |
MY (1) | MY151621A (ko) |
SG (1) | SG123736A1 (ko) |
TW (1) | TWI295091B (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101180497B1 (ko) * | 2002-11-29 | 2012-09-06 | 안드레아스 야콥 | 중간층 및 지지층을 갖는 웨이퍼 및 웨이퍼를 처리하기위한 방법 및 장치 |
DE102005010272A1 (de) * | 2005-03-03 | 2006-09-14 | Infineon Technologies Ag | Halbleiterbauelement sowie Verfahren zum Herstellen eines Halbleiterbauelements |
JP5182915B2 (ja) * | 2007-09-18 | 2013-04-17 | 株式会社ブリヂストン | 導電性エンドレスベルト |
US8432036B2 (en) * | 2009-01-22 | 2013-04-30 | Aculon, Inc. | Lead frames with improved adhesion to plastic encapsulant |
US9313897B2 (en) * | 2012-09-14 | 2016-04-12 | Infineon Technologies Ag | Method for electrophoretically depositing a film on an electronic assembly |
US9303327B2 (en) | 2013-01-10 | 2016-04-05 | Infineon Technologies Ag | Electric component with an electrophoretically deposited film |
US9214440B1 (en) * | 2014-12-17 | 2015-12-15 | Texas Instruments Incorporated | Method for preventing die pad delamination |
WO2017198654A1 (en) * | 2016-05-18 | 2017-11-23 | Lumileds Holding B.V. | Lighting assembly and method for manufacturing a lighting assembly |
TWI623049B (zh) * | 2016-11-04 | 2018-05-01 | 英屬開曼群島商鳳凰先驅股份有限公司 | 封裝基板及其製作方法 |
JP6787285B2 (ja) * | 2017-09-20 | 2020-11-18 | トヨタ自動車株式会社 | 半導体装置 |
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US3911475A (en) * | 1972-04-19 | 1975-10-07 | Westinghouse Electric Corp | Encapsulated solid state electronic devices having a sealed lead-encapsulant interface |
US4428987A (en) * | 1982-04-28 | 1984-01-31 | Shell Oil Company | Process for improving copper-epoxy adhesion |
JPS59197154A (ja) * | 1983-04-22 | 1984-11-08 | Hitachi Ltd | 半導体装置およびその製造法 |
US4862246A (en) | 1984-09-26 | 1989-08-29 | Hitachi, Ltd. | Semiconductor device lead frame with etched through holes |
JP2594142B2 (ja) * | 1988-11-30 | 1997-03-26 | 東芝シリコーン株式会社 | 電子部品の製造方法 |
US5164816A (en) * | 1988-12-29 | 1992-11-17 | Hitachi Chemical Co., Ltd. | Integrated circuit device produced with a resin layer produced from a heat-resistant resin paste |
US4946518A (en) * | 1989-03-14 | 1990-08-07 | Motorola, Inc. | Method for improving the adhesion of a plastic encapsulant to copper containing leadframes |
US5122858A (en) * | 1990-09-10 | 1992-06-16 | Olin Corporation | Lead frame having polymer coated surface portions |
US5153385A (en) * | 1991-03-18 | 1992-10-06 | Motorola, Inc. | Transfer molded semiconductor package with improved adhesion |
US5516874A (en) | 1994-06-30 | 1996-05-14 | Ibm Corporation | Poly(aryl ether benzimidazoles) |
JP3876944B2 (ja) * | 1997-12-24 | 2007-02-07 | 北興化学工業株式会社 | 半導体封止用エポキシ樹脂組成物及び半導体装置 |
US6369452B1 (en) | 1999-07-27 | 2002-04-09 | International Business Machines Corporation | Cap attach surface modification for improved adhesion |
TWI332024B (en) * | 2000-03-31 | 2010-10-21 | Hitachi Chemical Co Ltd | Method for making a semiconductor device |
US6501158B1 (en) | 2000-06-22 | 2002-12-31 | Skyworks Solutions, Inc. | Structure and method for securing a molding compound to a leadframe paddle |
US7057264B2 (en) * | 2002-10-18 | 2006-06-06 | National Starch And Chemical Investment Holding Corporation | Curable compounds containing reactive groups: triazine/isocyanurates, cyanate esters and blocked isocyanates |
-
2004
- 2004-12-22 US US11/019,421 patent/US7329617B2/en active Active
-
2005
- 2005-12-16 SG SG200508171A patent/SG123736A1/en unknown
- 2005-12-19 TW TW094144979A patent/TWI295091B/zh active
- 2005-12-20 EP EP05077942A patent/EP1675172A1/en not_active Withdrawn
- 2005-12-20 JP JP2005367030A patent/JP4402649B2/ja active Active
- 2005-12-21 MY MYPI20056082 patent/MY151621A/en unknown
- 2005-12-21 KR KR1020050126947A patent/KR100685160B1/ko active IP Right Grant
- 2005-12-22 CN CNB2005101319655A patent/CN100383941C/zh active Active
Also Published As
Publication number | Publication date |
---|---|
EP1675172A1 (en) | 2006-06-28 |
TWI295091B (en) | 2008-03-21 |
JP4402649B2 (ja) | 2010-01-20 |
CN1812064A (zh) | 2006-08-02 |
SG123736A1 (en) | 2006-07-26 |
JP2006179918A (ja) | 2006-07-06 |
CN100383941C (zh) | 2008-04-23 |
KR20060072068A (ko) | 2006-06-27 |
US7329617B2 (en) | 2008-02-12 |
TW200629494A (en) | 2006-08-16 |
US20060131720A1 (en) | 2006-06-22 |
MY151621A (en) | 2014-06-30 |
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