KR100658894B1 - 리드프레임의 몰딩 방법 - Google Patents
리드프레임의 몰딩 방법 Download PDFInfo
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- KR100658894B1 KR100658894B1 KR1020010010457A KR20010010457A KR100658894B1 KR 100658894 B1 KR100658894 B1 KR 100658894B1 KR 1020010010457 A KR1020010010457 A KR 1020010010457A KR 20010010457 A KR20010010457 A KR 20010010457A KR 100658894 B1 KR100658894 B1 KR 100658894B1
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- Prior art keywords
- lead frame
- mold
- cavity
- molding
- inverted
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
Claims (5)
- 상부에 일정 체적의 캐비티를 갖는 바텀몰드가 형성되고, 상기 바텀몰드의 상면에는 하부를 향하여 상기 바텀몰드의 캐비티보다 작은 체적의 캐비티를 갖는 탑몰드가 형성된 몰드를 제공하는 단계와;스탠다드 리드프레임의 경우에는 상기 몰드에 상기 스탠다드 리드프레임을 그대로 투입하여 몰딩을 수행하고,인버티드 리드프레임의 경우에는 상기 인버티드 리드프레임의 투입전 상기 몰드를 대략 180°회전시킨 상태에서 상기 인버티드 리드프레임을 투입하여 몰딩하는 단계로 이루어진 리드프레임의 몰딩 방법.
- 칩탑재판 상면에 반도체칩이 접착되고, 그 외주연에는 다수의 내부리드가 형성되어 상기 반도체칩과 도전성와이어로 상호 연결되며, 상기 칩탑재판 하면에는 히트싱크가 접착된 리드프레임을 제공하는 단계와;상부에 일정 체적의 캐비티를 갖는 바텀몰드와, 상기 바텀몰드의 상면에 위치하며, 하부에 일정 체적의 캐비티를 갖는 탑몰드로 이루어진 몰드에 상기 리드프레임을 투입하는 단계와;상기 몰드를 대략 180°회전 시켜 도전성와이어가 하부를 향하도록 한 후 몰딩하는 단계를 포함하여 이루어진 리드프레임의 몰딩 방법.
- 제2항에 있어서, 상기 리드프레임은 스탠다드 리드프레임 또는 인버티드 리드프레임중 어느 하나 인 것을 특징으로 하는 리드프레임의 몰딩 방법.
- 제3항에 있어서, 상기 리드프레임이 스탠다드 리드프레임인 경우 상기 바텀몰드의 캐비티 체적이 상기 탑몰드의 캐비티 체적보다 크게 형성됨을 특징으로 하는 리드프레임의 몰딩 방법.
- 제3항에 있어서, 상기 리드프레임이 인버티드 리드프레임인 경우 상기 탑몰드의 캐비티 체적이 상기 바텀몰드의 캐비티 체적보다 작게 형성됨을 특징으로 하는 리드프레임의 몰딩 방법.
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KR1020010010457A KR100658894B1 (ko) | 2001-02-28 | 2001-02-28 | 리드프레임의 몰딩 방법 |
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KR1020010010457A KR100658894B1 (ko) | 2001-02-28 | 2001-02-28 | 리드프레임의 몰딩 방법 |
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KR20020070551A KR20020070551A (ko) | 2002-09-10 |
KR100658894B1 true KR100658894B1 (ko) | 2006-12-15 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09187835A (ja) * | 1996-01-11 | 1997-07-22 | Sony Corp | 自動モールド装置 |
KR970053760A (ko) * | 1995-12-29 | 1997-07-31 | 황인길 | 반도체패키지 제조용 자동몰딩프레스의 디컬링(deculling) 장치 |
KR19980025405A (ko) * | 1996-10-01 | 1998-07-15 | 문정환 | 리드프레임 공급장치 |
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2001
- 2001-02-28 KR KR1020010010457A patent/KR100658894B1/ko active IP Right Grant
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR970053760A (ko) * | 1995-12-29 | 1997-07-31 | 황인길 | 반도체패키지 제조용 자동몰딩프레스의 디컬링(deculling) 장치 |
JPH09187835A (ja) * | 1996-01-11 | 1997-07-22 | Sony Corp | 自動モールド装置 |
KR19980025405A (ko) * | 1996-10-01 | 1998-07-15 | 문정환 | 리드프레임 공급장치 |
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