KR100633819B1 - 반도체 집적 회로 장치 - Google Patents
반도체 집적 회로 장치 Download PDFInfo
- Publication number
- KR100633819B1 KR100633819B1 KR1020040076422A KR20040076422A KR100633819B1 KR 100633819 B1 KR100633819 B1 KR 100633819B1 KR 1020040076422 A KR1020040076422 A KR 1020040076422A KR 20040076422 A KR20040076422 A KR 20040076422A KR 100633819 B1 KR100633819 B1 KR 100633819B1
- Authority
- KR
- South Korea
- Prior art keywords
- power supply
- circuit
- voltage
- diode
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Read Only Memory (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003337549A JP2005109659A (ja) | 2003-09-29 | 2003-09-29 | 半導体集積回路装置 |
| JPJP-P-2003-00337549 | 2003-09-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20050031399A KR20050031399A (ko) | 2005-04-06 |
| KR100633819B1 true KR100633819B1 (ko) | 2006-10-16 |
Family
ID=34509660
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020040076422A Expired - Fee Related KR100633819B1 (ko) | 2003-09-29 | 2004-09-23 | 반도체 집적 회로 장치 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US7042787B2 (enExample) |
| JP (1) | JP2005109659A (enExample) |
| KR (1) | KR100633819B1 (enExample) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7660181B2 (en) * | 2002-12-19 | 2010-02-09 | Sandisk 3D Llc | Method of making non-volatile memory cell with embedded antifuse |
| US7800932B2 (en) | 2005-09-28 | 2010-09-21 | Sandisk 3D Llc | Memory cell comprising switchable semiconductor memory element with trimmable resistance |
| US7800933B2 (en) * | 2005-09-28 | 2010-09-21 | Sandisk 3D Llc | Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance |
| US20070164388A1 (en) * | 2002-12-19 | 2007-07-19 | Sandisk 3D Llc | Memory cell comprising a diode fabricated in a low resistivity, programmed state |
| US8008700B2 (en) * | 2002-12-19 | 2011-08-30 | Sandisk 3D Llc | Non-volatile memory cell with embedded antifuse |
| US7618850B2 (en) * | 2002-12-19 | 2009-11-17 | Sandisk 3D Llc | Method of making a diode read/write memory cell in a programmed state |
| US7339410B1 (en) * | 2003-12-15 | 2008-03-04 | National Semiconductor Corporation | Method and system for providing startup delay |
| KR101044796B1 (ko) * | 2004-01-13 | 2011-06-29 | 삼성전자주식회사 | 휴대용 데이터 저장 장치 |
| JPWO2006070663A1 (ja) * | 2004-12-28 | 2008-06-12 | ローム株式会社 | 半導体装置および電子機器 |
| US8102842B2 (en) * | 2006-08-04 | 2012-01-24 | Broadcom Corporation | Integrated switch |
| US8165133B2 (en) * | 2006-12-22 | 2012-04-24 | Broadcom Corporation | Physical layer device with integrated switch |
| KR100930830B1 (ko) * | 2007-06-29 | 2009-12-10 | 삼성전자주식회사 | 전력관리 회로, 이를 포함하는 전력관리 시스템, 및전력관리 방법 |
| KR20090030078A (ko) | 2007-09-19 | 2009-03-24 | 삼성전자주식회사 | 부트 로딩 동작을 안전하게 수행하기 위한 반도체 메모리장치 및 그것의 부트 로딩 방법 |
| JP5300291B2 (ja) * | 2008-03-13 | 2013-09-25 | スパンション エルエルシー | 半導体システム及びその起動方法 |
| US7812335B2 (en) * | 2008-04-11 | 2010-10-12 | Sandisk 3D Llc | Sidewall structured switchable resistor cell |
| US7830698B2 (en) * | 2008-04-11 | 2010-11-09 | Sandisk 3D Llc | Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same |
| JP5283078B2 (ja) * | 2009-01-13 | 2013-09-04 | セイコーインスツル株式会社 | 検出回路及びセンサ装置 |
| TWI551978B (zh) * | 2011-05-26 | 2016-10-01 | 華碩電腦股份有限公司 | 電腦裝置及其電源產生器 |
| JP5562496B2 (ja) | 2012-01-13 | 2014-07-30 | 三菱電機株式会社 | Sramメモリカード及び電圧監視回路 |
| JP6046522B2 (ja) | 2013-03-05 | 2016-12-14 | ルネサスエレクトロニクス株式会社 | 半導体装置及び無線通信装置 |
| US20150042386A1 (en) * | 2013-08-06 | 2015-02-12 | Cirel Systems Private Limited | Highly accurate power-on reset circuit with least delay |
| KR20150124521A (ko) * | 2014-04-28 | 2015-11-06 | 에스케이하이닉스 주식회사 | 파워업 신호 생성회로 및 이를 포함하는 반도체 장치 |
| KR20170035734A (ko) | 2015-09-23 | 2017-03-31 | 에스케이하이닉스 주식회사 | 반도체장치 |
| US9806256B1 (en) | 2016-10-21 | 2017-10-31 | Sandisk Technologies Llc | Resistive memory device having sidewall spacer electrode and method of making thereof |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04252489A (ja) * | 1991-01-28 | 1992-09-08 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5929672A (en) * | 1995-06-16 | 1999-07-27 | Rohm Co., Ltd. | Power on reset circuit and one chip microcomputer using same |
| US5814995A (en) * | 1996-09-12 | 1998-09-29 | Telcom Semiconductor, Inc. | Voltage detector for battery operated device |
| JPH10228768A (ja) * | 1997-02-14 | 1998-08-25 | Mitsubishi Electric Corp | 半導体記憶装置 |
| TW419828B (en) * | 1997-02-26 | 2001-01-21 | Toshiba Corp | Semiconductor integrated circuit |
| US6204703B1 (en) * | 1998-12-21 | 2001-03-20 | Samsung Electronics Co., Ltd. | Power on reset circuit with power noise immunity |
| JP3816788B2 (ja) | 2001-11-22 | 2006-08-30 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| KR100463201B1 (ko) * | 2002-05-28 | 2004-12-23 | 삼성전자주식회사 | 파워 검출 회로, 이를 이용한 플래시 메모리 장치, 그 플래시 메모리 장치의 파워-온 독출 신호 발생 방법 및 플래시 메모리 장치의 안정적인 파워-온 독출 방법 |
-
2003
- 2003-09-29 JP JP2003337549A patent/JP2005109659A/ja active Pending
-
2004
- 2004-09-08 US US10/935,581 patent/US7042787B2/en not_active Expired - Fee Related
- 2004-09-23 KR KR1020040076422A patent/KR100633819B1/ko not_active Expired - Fee Related
-
2006
- 2006-03-27 US US11/389,048 patent/US7180815B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US7180815B2 (en) | 2007-02-20 |
| KR20050031399A (ko) | 2005-04-06 |
| US7042787B2 (en) | 2006-05-09 |
| US20050083751A1 (en) | 2005-04-21 |
| US20060176088A1 (en) | 2006-08-10 |
| JP2005109659A (ja) | 2005-04-21 |
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