KR100543928B1 - 반도체 웨이퍼의 세정 방법 및 장치 - Google Patents

반도체 웨이퍼의 세정 방법 및 장치 Download PDF

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Publication number
KR100543928B1
KR100543928B1 KR1020037005115A KR20037005115A KR100543928B1 KR 100543928 B1 KR100543928 B1 KR 100543928B1 KR 1020037005115 A KR1020037005115 A KR 1020037005115A KR 20037005115 A KR20037005115 A KR 20037005115A KR 100543928 B1 KR100543928 B1 KR 100543928B1
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KR
South Korea
Prior art keywords
cleaning
semiconductor wafer
polishing
chemical
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020037005115A
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English (en)
Korean (ko)
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KR20040004400A (ko
Inventor
그리트 본스도르프
볼프강 딕엔샤이드
Original Assignee
인피니언 테크놀로지스 아게
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Publication date
Application filed by 인피니언 테크놀로지스 아게 filed Critical 인피니언 테크놀로지스 아게
Publication of KR20040004400A publication Critical patent/KR20040004400A/ko
Application granted granted Critical
Publication of KR100543928B1 publication Critical patent/KR100543928B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0406—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/237—Cleaning during device manufacture during, before or after processing of insulating materials the processing being a planarisation of insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/27—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers
    • H10P70/277—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers the processing being a planarisation of conductive layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step

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  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
KR1020037005115A 2000-10-25 2001-10-08 반도체 웨이퍼의 세정 방법 및 장치 Expired - Fee Related KR100543928B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10052762A DE10052762A1 (de) 2000-10-25 2000-10-25 Verfahren und Vorrichtung zum Reinigen einer Halbleiterscheibe
DE10052762.0 2000-10-25
PCT/EP2001/011582 WO2002035598A1 (de) 2000-10-25 2001-10-08 Verfahren und vorrichtung zum reinigen einer halbleiterscheibe

Publications (2)

Publication Number Publication Date
KR20040004400A KR20040004400A (ko) 2004-01-13
KR100543928B1 true KR100543928B1 (ko) 2006-01-20

Family

ID=7660932

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020037005115A Expired - Fee Related KR100543928B1 (ko) 2000-10-25 2001-10-08 반도체 웨이퍼의 세정 방법 및 장치

Country Status (6)

Country Link
US (1) US6833324B2 (https=)
EP (1) EP1328968A1 (https=)
JP (1) JP2004512693A (https=)
KR (1) KR100543928B1 (https=)
DE (1) DE10052762A1 (https=)
WO (1) WO2002035598A1 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6881675B2 (en) * 2002-05-15 2005-04-19 Taiwan Semiconductor Manufacturing Co, Ltd. Method and system for reducing wafer edge tungsten residue utilizing a spin etch
KR100604051B1 (ko) * 2004-06-30 2006-07-24 동부일렉트로닉스 주식회사 게이트 산화막의 전세정방법
KR100644054B1 (ko) * 2004-12-29 2006-11-10 동부일렉트로닉스 주식회사 세정 장치 및 게이트 산화막의 전세정 방법
KR100829376B1 (ko) * 2006-12-20 2008-05-13 동부일렉트로닉스 주식회사 반도체 소자의 세정방법
US20080289660A1 (en) * 2007-05-23 2008-11-27 Air Products And Chemicals, Inc. Semiconductor Manufacture Employing Isopropanol Drying
CN101217108B (zh) * 2008-01-02 2010-06-09 株洲南车时代电气股份有限公司 一种芯片台面腐蚀装置
EP4152393A4 (en) * 2021-08-04 2024-01-03 Changxin Memory Technologies, Inc. SEMICONDUCTOR STRUCTURE AND ITS FORMATION METHOD

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT389959B (de) * 1987-11-09 1990-02-26 Sez Semiconduct Equip Zubehoer Vorrichtung zum aetzen von scheibenfoermigen gegenstaenden, insbesondere von siliziumscheiben
US5442828A (en) * 1992-11-30 1995-08-22 Ontrak Systems, Inc. Double-sided wafer scrubber with a wet submersing silicon wafer indexer
JP3326642B2 (ja) * 1993-11-09 2002-09-24 ソニー株式会社 基板の研磨後処理方法およびこれに用いる研磨装置
US5996594A (en) * 1994-11-30 1999-12-07 Texas Instruments Incorporated Post-chemical mechanical planarization clean-up process using post-polish scrubbing
TW386235B (en) * 1995-05-23 2000-04-01 Tokyo Electron Ltd Method for spin rinsing
JPH09270412A (ja) * 1996-04-01 1997-10-14 Canon Inc 洗浄装置及び洗浄方法
EP0805000A1 (en) * 1996-05-02 1997-11-05 MEMC Electronic Materials, Inc. Semiconductor wafer post-polish clean and dry method and apparatus
US5997653A (en) * 1996-10-07 1999-12-07 Tokyo Electron Limited Method for washing and drying substrates
US5922136A (en) * 1997-03-28 1999-07-13 Taiwan Semiconductor Manufacturing Company, Ltd. Post-CMP cleaner apparatus and method
US6017437A (en) * 1997-08-22 2000-01-25 Cutek Research, Inc. Process chamber and method for depositing and/or removing material on a substrate
DE69832567T2 (de) * 1997-09-24 2007-01-18 Interuniversitair Micro-Electronica Centrum Vzw Verfahren und Vorrichtung zum Entfernen von einer Flüssigkeit von der Oberfläche eines rotierenden Substrats
US5807439A (en) * 1997-09-29 1998-09-15 Siemens Aktiengesellschaft Apparatus and method for improved washing and drying of semiconductor wafers
DE19801360A1 (de) * 1998-01-16 1999-07-22 Sez Semiconduct Equip Zubehoer Verfahren und Vorrichtung zum Behandeln von Halbleiter-Oberflächen
DE19806406C1 (de) * 1998-02-17 1999-07-29 Sez Semiconduct Equip Zubehoer Verfahren zum Rauhätzen einer Halbleiter-Oberfläche
US6172848B1 (en) * 1998-04-10 2001-01-09 International Business Machines Corporation Write head with self aligned pedestal shaped pole tips that are separated by a zero throat height defining layer
US5964953A (en) * 1998-05-26 1999-10-12 Memc Electronics Materials, Inc. Post-etching alkaline treatment process
JP2000003897A (ja) 1998-06-16 2000-01-07 Sony Corp 基板洗浄方法及び基板洗浄装置
US6099662A (en) * 1999-02-11 2000-08-08 Taiwan Semiconductor Manufacturing Company Process for cleaning a semiconductor substrate after chemical-mechanical polishing

Also Published As

Publication number Publication date
DE10052762A1 (de) 2002-05-16
JP2004512693A (ja) 2004-04-22
KR20040004400A (ko) 2004-01-13
EP1328968A1 (de) 2003-07-23
WO2002035598A1 (de) 2002-05-02
US6833324B2 (en) 2004-12-21
US20030186553A1 (en) 2003-10-02

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