KR100525916B1 - 반도체 장치의 소자 분리막 형성방법 - Google Patents
반도체 장치의 소자 분리막 형성방법 Download PDFInfo
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- KR100525916B1 KR100525916B1 KR10-2003-0058008A KR20030058008A KR100525916B1 KR 100525916 B1 KR100525916 B1 KR 100525916B1 KR 20030058008 A KR20030058008 A KR 20030058008A KR 100525916 B1 KR100525916 B1 KR 100525916B1
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- Prior art keywords
- film
- oxide film
- silicon substrate
- trench
- device isolation
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- 238000000034 method Methods 0.000 title claims abstract description 74
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 238000000926 separation method Methods 0.000 title 1
- 238000002955 isolation Methods 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 41
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 38
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 38
- 239000010703 silicon Substances 0.000 claims abstract description 38
- 238000005530 etching Methods 0.000 claims abstract description 35
- 150000004767 nitrides Chemical class 0.000 claims abstract description 35
- 230000003647 oxidation Effects 0.000 claims abstract description 18
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 18
- 238000000151 deposition Methods 0.000 claims abstract description 8
- 239000011810 insulating material Substances 0.000 claims abstract description 6
- 238000000059 patterning Methods 0.000 claims abstract description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 229910021426 porous silicon Inorganic materials 0.000 claims description 2
- 239000002904 solvent Substances 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 238000005498 polishing Methods 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 239000007943 implant Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 238000005137 deposition process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 210000003323 beak Anatomy 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (9)
- 실리콘 기판 상에 순차적으로 증착되어 있는 제1산화막과 제1전도막과 제1질화막을 소정 형상으로 패터닝하여 상기 실리콘 기판에 트렌치를 형성하는 단계와;상기 제1질화막과 제1산화막의 패턴을 통해서 노출되는 상기 제1전도막의 일부와 상기 실리콘 기판의 상기 트렌치에 라이너 열산화 공정을 실시하여 열산화막을 형성하는 단계와;상기 트렌치가 매립될 수 있도록 상기 실리콘 기판의 전면에 절연물질을 증착시키는 단계와;상기 제1질화막이 노출되도록 평탄화공정을 수행하여 상기 트렌치를 매립하고 있는 소자 분리막을 형성하는 단계와; 그리고상기 소자 분리막과 상기 열산화막을 식각 마스크로 하는 식각 공정에 의해서 상기 제1산화막이 노출되도록 상기 제1질화막과 상기 제1전도막을 순차적으로 제거하는 단계를 포함하는 반도체 장치의 소자 분리막 형성방법.
- 제1항에 있어서,상기 제1전도막에 열산화막이 형성되는 라이너 열산화 공정에 의해서 상기 트렌치를 통해서 노출되는 상기 실리콘 기판에도 열산화막이 형성되는 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
- 제2항에 있어서,상기 실리콘 기판의 열산화막이 100~200Å의 두께로 성장할 때 상기 제1전도막의 열산화막은 200~500Å의 두께로 성장하는 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
- 제1항에 있어서,상기 제1질화막은 상기 소자 분리막을 식각 마스크로 하는 등방성 식각공정에 의해서 제거되는 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
- 제4항에 있어서,상기 제1전도막은 상기 소자 분리막과 상기 열산화막을 식각 마스크로 하는 이방성 식각공정에 의해서 제거되는 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
- 제1항에 있어서,상기 제1질화막과 제1전도막은 질화물질 제거용 H2SO4와 폴리 실리콘 제거용 HNO3를 용매로 하는 등방성 식각공정에 의해서 제거되는 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
- 제1항에 있어서,상기 제1전도막은 열산화 공정에 의해서 절연막으로 성질이 변화될 수 있는 폴리 실리콘, 비정질 실리콘, 다공성 실리콘 및 금속으로 이루어진 그룹으로부터 선택되는 적어도 하나의 물질로 이루어진 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
- 제1항에 있어서,상기 열산화막을 식각 마스크로 하여 상기 제1전도막을 제거한 후에 상기 실리콘 기판 상에 잔류하는 막을 전면적으로 열산화시키는 단계를 더 포함하는 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
- 제1항에 있어서,상기 소자 분리막과 열산화막의 식각특성이 상이한 경우에 반도체 소자의 게이트 산화막 증착 전세정공정 혹은 전세정 공정 이전에 상기 소자 분리막을 식각하는 단계를 더 포함하는 것을 특징으로 하는 반도체 장치의 소자 분리막 형성방법.
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KR10-2003-0058008A KR100525916B1 (ko) | 2003-08-21 | 2003-08-21 | 반도체 장치의 소자 분리막 형성방법 |
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KR10-2003-0058008A KR100525916B1 (ko) | 2003-08-21 | 2003-08-21 | 반도체 장치의 소자 분리막 형성방법 |
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KR20050020239A KR20050020239A (ko) | 2005-03-04 |
KR100525916B1 true KR100525916B1 (ko) | 2005-11-04 |
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