KR100425466B1 - 폴디드 차동 전압 샘플러를 이용하는 데이터 리시버 및데이터 수신 방법 - Google Patents
폴디드 차동 전압 샘플러를 이용하는 데이터 리시버 및데이터 수신 방법 Download PDFInfo
- Publication number
- KR100425466B1 KR100425466B1 KR10-2001-0060025A KR20010060025A KR100425466B1 KR 100425466 B1 KR100425466 B1 KR 100425466B1 KR 20010060025 A KR20010060025 A KR 20010060025A KR 100425466 B1 KR100425466 B1 KR 100425466B1
- Authority
- KR
- South Korea
- Prior art keywords
- node
- differential
- data
- signal
- signals
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/249—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors using clock signals
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Dc Digital Transmission (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2001-0060025A KR100425466B1 (ko) | 2001-09-27 | 2001-09-27 | 폴디드 차동 전압 샘플러를 이용하는 데이터 리시버 및데이터 수신 방법 |
US10/205,646 US7394872B2 (en) | 2001-09-27 | 2002-07-24 | Data receiver and method for receiving data using folded differential voltage sampler |
TW091119409A TW591917B (en) | 2001-09-27 | 2002-08-27 | Data receiver and method for receiving data using folded differential voltage sampler |
DE10245719A DE10245719B4 (de) | 2001-09-27 | 2002-09-23 | Datenempfänger und Datenempfangsverfahren |
JP2002281173A JP4204834B2 (ja) | 2001-09-27 | 2002-09-26 | データレシーバ及びデータ受信方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2001-0060025A KR100425466B1 (ko) | 2001-09-27 | 2001-09-27 | 폴디드 차동 전압 샘플러를 이용하는 데이터 리시버 및데이터 수신 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20030028087A KR20030028087A (ko) | 2003-04-08 |
KR100425466B1 true KR100425466B1 (ko) | 2004-03-30 |
Family
ID=19714741
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2001-0060025A KR100425466B1 (ko) | 2001-09-27 | 2001-09-27 | 폴디드 차동 전압 샘플러를 이용하는 데이터 리시버 및데이터 수신 방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7394872B2 (de) |
JP (1) | JP4204834B2 (de) |
KR (1) | KR100425466B1 (de) |
DE (1) | DE10245719B4 (de) |
TW (1) | TW591917B (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100532507B1 (ko) * | 2004-03-05 | 2005-11-30 | 삼성전자주식회사 | 안정된 출력 스윙 폭과 안정된 지연 시간을 가지는 증폭회로 |
TWI276888B (en) * | 2004-04-22 | 2007-03-21 | Novatek Microelectronics Corp | Data transferring method |
US7196552B2 (en) * | 2005-04-12 | 2007-03-27 | Hewlett-Packard Development Company, L.P. | Comparator circuit with offset cancellation |
US7525348B1 (en) * | 2005-04-19 | 2009-04-28 | National Semiconductor Corporation | Differential voltage comparator |
US7733815B2 (en) * | 2006-07-28 | 2010-06-08 | Qimonda Ag | Data sampler including a first stage and a second stage |
US8717065B2 (en) * | 2009-02-27 | 2014-05-06 | Yonghua Liu | Data tranmission driver, system and method |
US8350598B2 (en) * | 2011-04-20 | 2013-01-08 | Nanya Technology Corp. | Multi-stage receiver |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5355391A (en) * | 1992-03-06 | 1994-10-11 | Rambus, Inc. | High speed bus system |
US6480548B1 (en) * | 1997-11-17 | 2002-11-12 | Silicon Graphics, Inc. | Spacial derivative bus encoder and decoder |
US6052026A (en) * | 1997-12-08 | 2000-04-18 | Nortel Networks Corporation | Linear gain controlled amplifier |
US6160423A (en) * | 1998-03-16 | 2000-12-12 | Jazio, Inc. | High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines |
KR20000000522A (ko) | 1998-06-01 | 2000-01-15 | 박노완 | 네온관용 변압기 |
JP3502264B2 (ja) * | 1998-06-10 | 2004-03-02 | 株式会社沖コムテック | 受信装置 |
US6137306A (en) * | 1998-07-07 | 2000-10-24 | Matsushita Electric Industrial Co., Ltd. | Input buffer having adjustment function for suppressing skew |
US6396329B1 (en) * | 1999-10-19 | 2002-05-28 | Rambus, Inc | Method and apparatus for receiving high speed signals with low latency |
US6937664B1 (en) * | 2000-07-18 | 2005-08-30 | Integrated Memory Logic, Inc. | System and method for multi-symbol interfacing |
DE10043730C1 (de) * | 2000-09-05 | 2002-04-18 | Infineon Technologies Ag | Verfahren und Vorrichtung zur zeitlichen Korrektur eines Datensignals |
US6498530B1 (en) * | 2001-09-04 | 2002-12-24 | Analog Devices, Inc. | Auto-zeroed ping-pong amplifier with low transient switching |
-
2001
- 2001-09-27 KR KR10-2001-0060025A patent/KR100425466B1/ko not_active IP Right Cessation
-
2002
- 2002-07-24 US US10/205,646 patent/US7394872B2/en not_active Expired - Fee Related
- 2002-08-27 TW TW091119409A patent/TW591917B/zh not_active IP Right Cessation
- 2002-09-23 DE DE10245719A patent/DE10245719B4/de not_active Expired - Fee Related
- 2002-09-26 JP JP2002281173A patent/JP4204834B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP4204834B2 (ja) | 2009-01-07 |
DE10245719B4 (de) | 2007-09-06 |
US7394872B2 (en) | 2008-07-01 |
KR20030028087A (ko) | 2003-04-08 |
JP2003179653A (ja) | 2003-06-27 |
US20030058046A1 (en) | 2003-03-27 |
TW591917B (en) | 2004-06-11 |
DE10245719A1 (de) | 2003-07-03 |
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