KR100417727B1 - 전기적으로기록가능하고소거가능한판독전용메모리셀장치및그제조방법 - Google Patents

전기적으로기록가능하고소거가능한판독전용메모리셀장치및그제조방법 Download PDF

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Publication number
KR100417727B1
KR100417727B1 KR10-1998-0700127A KR19980700127A KR100417727B1 KR 100417727 B1 KR100417727 B1 KR 100417727B1 KR 19980700127 A KR19980700127 A KR 19980700127A KR 100417727 B1 KR100417727 B1 KR 100417727B1
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KR
South Korea
Prior art keywords
layer
region
doped
trench
longitudinal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-1998-0700127A
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English (en)
Korean (ko)
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KR19990028827A (ko
Inventor
볼프강 크라우트슈나이더
Original Assignee
지멘스 악티엔게젤샤프트
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Publication of KR19990028827A publication Critical patent/KR19990028827A/ko
Application granted granted Critical
Publication of KR100417727B1 publication Critical patent/KR100417727B1/ko
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Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
KR10-1998-0700127A 1995-07-10 1996-07-02 전기적으로기록가능하고소거가능한판독전용메모리셀장치및그제조방법 Expired - Fee Related KR100417727B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19525070A DE19525070C2 (de) 1995-07-10 1995-07-10 Elektrisch schreib- und löschbare Festwertspeicherzellenanordnung und Verfahren zu deren Herstellung
DE19525070.2 1995-07-10

Publications (2)

Publication Number Publication Date
KR19990028827A KR19990028827A (ko) 1999-04-15
KR100417727B1 true KR100417727B1 (ko) 2004-04-17

Family

ID=7766442

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-1998-0700127A Expired - Fee Related KR100417727B1 (ko) 1995-07-10 1996-07-02 전기적으로기록가능하고소거가능한판독전용메모리셀장치및그제조방법

Country Status (8)

Country Link
US (1) US5943572A (cg-RX-API-DMAC7.html)
EP (1) EP0838092B1 (cg-RX-API-DMAC7.html)
JP (1) JPH11509044A (cg-RX-API-DMAC7.html)
KR (1) KR100417727B1 (cg-RX-API-DMAC7.html)
AR (1) AR002790A1 (cg-RX-API-DMAC7.html)
DE (2) DE19525070C2 (cg-RX-API-DMAC7.html)
IN (1) IN189362B (cg-RX-API-DMAC7.html)
WO (1) WO1997003469A1 (cg-RX-API-DMAC7.html)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19603810C1 (de) * 1996-02-02 1997-08-28 Siemens Ag Speicherzellenanordnung und Verfahren zu deren Herstellung
US6576547B2 (en) * 1998-03-05 2003-06-10 Micron Technology, Inc. Residue-free contact openings and methods for fabricating same
DE19823733A1 (de) * 1998-05-27 1999-12-02 Siemens Ag Halbleiter-Speicherzellenanordnung und entsprechendes Herstellungsverfahren
DE19929233C1 (de) * 1999-06-25 2001-02-01 Siemens Ag Speicherzellenanordnung mit auf einer Grabenseitenwand angeordnetem Floating-Gate und Herstellungsverfahren
US6329687B1 (en) * 2000-01-27 2001-12-11 Advanced Micro Devices, Inc. Two bit flash cell with two floating gate regions
US6762092B2 (en) * 2001-08-08 2004-07-13 Sandisk Corporation Scalable self-aligned dual floating gate memory cell array and methods of forming the array
US6952033B2 (en) 2002-03-20 2005-10-04 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with buried bit-line and raised source line
US6917069B2 (en) * 2001-10-17 2005-07-12 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor
US6720611B2 (en) * 2002-01-28 2004-04-13 Winbond Electronics Corporation Fabrication method for flash memory
US7411246B2 (en) * 2002-04-01 2008-08-12 Silicon Storage Technology, Inc. Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby
US6952034B2 (en) 2002-04-05 2005-10-04 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with buried source line and floating gate
US6891220B2 (en) * 2002-04-05 2005-05-10 Silicon Storage Technology, Inc. Method of programming electrons onto a floating gate of a non-volatile memory cell
AU2003237515A1 (en) * 2002-06-19 2004-01-06 Sandisk Corporation Deep wordline trench to shield cross coupling between adjacent cells for scaled nand
US6894930B2 (en) 2002-06-19 2005-05-17 Sandisk Corporation Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND
US6906379B2 (en) * 2003-08-28 2005-06-14 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with buried floating gate
TWI241017B (en) * 2005-01-03 2005-10-01 Powerchip Semiconductor Corp Non-volatile memory device and manufacturing method and operating method thereof
US7745285B2 (en) * 2007-03-30 2010-06-29 Sandisk Corporation Methods of forming and operating NAND memory with side-tunneling
US8148768B2 (en) * 2008-11-26 2012-04-03 Silicon Storage Technology, Inc. Non-volatile memory cell with self aligned floating and erase gates, and method of making same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715953B2 (ja) * 1985-08-09 1995-02-22 株式会社リコー 書換え可能なメモリ装置とその製造方法
US5156989A (en) * 1988-11-08 1992-10-20 Siliconix, Incorporated Complementary, isolated DMOS IC technology
JPH05102436A (ja) * 1991-10-09 1993-04-23 Ricoh Co Ltd 半導体メモリ装置とその製造方法
JPH07254651A (ja) * 1994-03-16 1995-10-03 Toshiba Corp 半導体集積回路装置
US5376572A (en) * 1994-05-06 1994-12-27 United Microelectronics Corporation Method of making an electrically erasable programmable memory device with improved erase and write operation

Also Published As

Publication number Publication date
EP0838092B1 (de) 2001-11-07
KR19990028827A (ko) 1999-04-15
AR002790A1 (es) 1998-04-29
WO1997003469A1 (de) 1997-01-30
DE19525070C2 (de) 2001-12-06
US5943572A (en) 1999-08-24
JPH11509044A (ja) 1999-08-03
DE59608152D1 (de) 2001-12-13
EP0838092A1 (de) 1998-04-29
IN189362B (cg-RX-API-DMAC7.html) 2003-02-15
DE19525070A1 (de) 1997-01-16

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