KR100256870B1 - Method for manufacturing thin flim actuated mirror array - Google Patents

Abstract

PURPOSE: A thin-film micromirror array-actuated(TMA) manufacturing method prevents the permeation of a hydrogen fluoride(HF) vapor towards an active matrix through an etch passivation layer during the etching process of a sacrificial layer. CONSTITUTION: A protruded portion of convex shape is exposed in a portion(165) to be Iso-Cut among the first layer(124) by patterning the thick first layer(124). The Iso-Cut portion(165) for separating the respective pixels is formed in a bottom electrode(129). The first layer(124) under the Iso-Cut portion(165) is protruded thickly. Even when the portion of the first layer(124) is etched during the patterning of thin films of an actuator, the residual first layer(124) protects an etch passivation layer(115). Therefore, it is possible to prevent the permeation of a hydrogen fluoride(HF) vapor towards an active matrix through the etch passivation layer(115) during the etching process of a sacrificial layer(120).

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing AMA (Actuated Mirror Array), which is a thin film type optical path control device. More specifically, a support layer is formed thick and patterned to protrude a portion where Iso-Cut is to be formed, and then a lower electrode is laminated. By iso-cutting, the present invention relates to a method for manufacturing a thin film type optical path control apparatus capable of preventing the protective layer and the active matrix under the Iso-Cut region from being damaged due to a subsequent etching process.

Optical path control devices or spatial light modulators for projecting optical energy onto a screen may be applied to various fields such as optical communication, image processing, and information display devices. The image processing apparatus using the optical path adjusting device or the spatial light modulator typically has a direct-view image display device and a projection-type image device according to a method of displaying optical energy on a screen. display device).

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image display apparatuses include a liquid crystal display (LCD), a deformable mirror device (DMD), and an AMA. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited to a range of 1-2%, requiring dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the speed of light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a brighter and clearer image.

Each actuator of the AMA generates a deformation in accordance with the electric field generated by the applied electric picture signal and the bias signal. As the actuator deforms, each of the mirrors mounted thereon is tilted. Accordingly, the inclined mirrors reflect light incident from the light source at a predetermined angle to form an image on the screen. Piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ) or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as actuators for driving the respective mirrors. The actuator may also be configured as a warping material such as PMN (Pb (Mg, Nb) O ₃ ).

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path adjusting device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is embedded, and then processing by a sawing method and installing a mirror thereon. However, the bulk optical path control device requires very high precision in design and manufacture, and has a disadvantage in that the response of the deformable part is slow.

Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is disclosed in Patent Application No. 96-42197 (name of the invention: thin film type optical path control device which can control the stress of a membrane and a method of manufacturing the same) filed on September 24, 1996.

Figure 1 shows a cross-sectional view of the thin film type optical path control device previously applied by the applicant.

Referring to FIG. 1, the thin film type optical path adjusting device includes an active matrix 1 and an actuator 70 formed on the active matrix 1.

The active matrix 1 in which M x N (M, N is an integer) MOS transistors (not shown) is formed and a drain pad 5 extending from the drain of the transistor is formed. The protective layer 10 may be stacked on the drain pad 5, and the etch stop layer 15 may be stacked on the protective layer 10.

The actuator 70 has one side contacting a portion of the etch stop layer 15 in which the drain pad 5 is formed below and the other side of the actuator 70 horizontally formed through the air gap 60. ), The lower electrode 30 stacked on top of the lower electrode 30, the strained layer 35 stacked on top of the lower electrode 30, the upper electrode 40 stacked on the strained layer 35, and the strained layer 35. In one side of the via hole 45 formed through the strained layer 35, the lower electrode 30, the membrane 25, the etch stop layer 15, and the protective layer 10 to the drain pad 5. The lower electrode 30 and the drain pad 5 include a via contact 50 formed to be electrically connected to each other.

Hereinafter, the manufacturing method of the thin film type optical path control apparatus will be described with reference to FIGS.

Referring to FIG. 2A, an silicate is formed on an active matrix 1 in which M x N (M, N is an integer) embedded MOS transistors (not shown) and a drain pad 5 extending from the drain of the transistor are formed. A protective layer 10 made of glass PSG is formed. The protective layer 10 is formed to have a thickness of about 1.0 μm using a chemical vapor deposition (CVD) method. The protective layer 10 protects the active matrix 1 in which the MOS transistor is embedded during a subsequent process.

An etch stop layer 15 made of nitride is formed on the protective layer 10. The etch stop layer 15 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 15 prevents the protective layer 10 and the active matrix 1 from being etched and damaged during the subsequent etching process.

The sacrificial layer 20 is formed on the etch stop layer 15. The sacrificial layer 20 is formed of phosphorous silicate glass (PSG) having a high concentration of phosphorus (PG) to have a thickness of about 1.0 to 3.0 μm by using an atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 20 covers the upper portion of the active matrix 1 in which the transistor is embedded, the surface flatness is very poor. Accordingly, the surface of the sacrificial layer 20 is planarized by using spin on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the sacrificial layer 20 in which the drain pad 5 is formed is etched to expose a portion of the etch stop layer 15, thereby making a position where the supporting portion of the actuator 70 is to be formed.

Referring to FIG. 2B, the membrane 25 is formed on the exposed etch stop layer 15 and the sacrificial layer 20 to a thickness of about 0.1 μm to about 1.0 μm. Membrane 25 is formed using low pressure chemical vapor deposition (LPCVD). In this case, the stress in the membrane 25 is controlled by forming the membrane 25 while varying the ratio of the reaction gas in the reaction vessel of low pressure.

The lower electrode 30 formed of metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum is formed on the membrane 25. The lower electrode 30 is formed to have a thickness of about 0.1 μm to about 1.0 μm using a sputtering method. Subsequently, the lower electrode 30 is patterned to separate the lower electrode 30 for each pixel, thereby iso-cutting the lower electrode 30 so that a unique first signal (image signal) is applied to each pixel. The first signal is applied to the lower electrode 30 through the transistor, the drain pad 5, and the via contact 50 embedded in the active matrix 1 from the outside.

Referring to FIG. 2C, a strained layer 35 made of a piezoelectric material such as PZT or PLZT is formed on the lower electrode 30. The strained layer 35 is formed to have a thickness of about 0.1 μm to about 1.0 μm, preferably about 0.4 μm using a sol-gel method, and then the strained layer 35 using a rapid heat treatment (RTA) method. Phase change the piezoelectric material constituting the). The strained layer 35 is applied with a second signal (bias signal) to the upper electrode 40 and a first signal is applied to the lower electrode 30 so that the potential difference between the upper electrode 40 and the lower electrode 30 is reduced. Deformation is caused by the electric field generated.

The upper electrode 40 is formed on the strained layer 35. The upper electrode 40 is formed of a metal having excellent electrical conductivity and reflectivity, such as aluminum or platinum, to have a thickness of about 0.1 to 1.0 μm using a sputtering method. The second signal is applied to the upper electrode 40 through a common electrode line (not shown) from the outside. In addition, the upper electrode 40 also functions as a mirror that reflects light incident from a light source.

Referring to FIG. 2D, the upper electrode 40 is patterned into a predetermined pixel shape. In this case, the stripe 55 is patterned to form one side of the upper electrode 40. The stripe 55 makes the upper electrode 40 operate uniformly so that light incident from the light source is diffusely reflected at the boundary between the portion of the upper electrode 40 that is deformed and the portion that is not deformed due to the deformation of the strained layer 35. To prevent them. Subsequently, the strained layer 35 and the lower electrode 30 are patterned into a predetermined pixel shape.

Subsequently, the strained layer 35, the lower electrode 30, the membrane 25, the etch stop layer 15, and the protective layer 10 are sequentially formed from one side of the strained layer 35 to an upper portion of the drain pad 5. By etching, the via hole 45 is formed. Then, a metal such as tungsten, platinum or titanium is deposited inside the via hole 45 to form a via contact 50 that electrically connects the drain pad 5 and the lower electrode 30. Thus, the via contact 50 is formed vertically from the lower electrode 30 to the top of the drain pad 5 in the via hole 45. Therefore, the first signal applied from the outside is applied to the lower electrode 30 through the transistor, the drain pad 5, and the via contact 50 embedded in the active matrix 1.

Referring to FIG. 2E, an air gap 60 is formed at the position of the sacrificial layer 20 by etching the sacrificial layer 20 using 49% hydrogen fluoride (HF) vapor. Subsequently, the AMA device is completed by performing a cleaning and drying process to remove the remaining etching solution.

In the above-described thin film type optical path adjusting device, the first signal is applied from the outside to the lower electrode 30 through the MOS transistor, the drain pad 5, and the via contact 50 embedded in the active matrix 1. In addition, a second signal is applied to the upper electrode 40 from the outside through the common electrode line to generate an electric field between the upper electrode 40 and the lower electrode 30. Due to this electric field, the strained layer 35 stacked between the upper electrode 40 and the lower electrode 30 causes deformation. The strained layer 35 contracts in a direction perpendicular to the electric field, and the actuator 70 including the strained layer 35 is bent in a direction opposite to the direction in which the membrane 25 is formed. Therefore, the upper electrode 40 on the actuator 70 also inclines in the same direction. Light incident from the light source is reflected by the upper electrode 40 at a predetermined angle, and then is projected onto the screen to form an image.

However, in the thin film type optical path adjusting device described in the above application, the Iso of the lower electrode is subjected to the etching processes for patterning the thin films constituting the actuators such as the upper electrode, the deforming layer, the lower electrode, and the membrane into predetermined pixel shapes, respectively. The membrane and the etch stop layer under the cut are continuously damaged. This will be described in more detail with reference to the drawings.

3 is a plan view showing an enlarged Iso-Cut part in the above-described thin film type optical path control device. Referring to FIG. 3, the Iso-Cut region B is referred to when etching processes for patterning the upper electrode 40, the strain layer 35, the lower electrode 30, and the membrane 25 into predetermined pixel shapes, respectively. ) Is exposed without being covered with photoresist. In this case, an etching process needs to be sufficiently performed so that the upper electrode 40, the strained layer 35, the lower electrode 30, and the membrane 25 each have an accurate pixel shape. While the processes are performed, the membrane 25 and the etch stop layer 15 under the Iso-Cut region B which are not protected by the photoresist are excessively etched and damaged. As such, when the membrane 25 and the etch stop layer 15 are damaged, when the sacrificial layer 20 is removed using hydrogen fluoride (HF) vapor, the hydrogen fluoride vapor is etched into the membrane 25 and the etching. Penetrating through the damaged portion of the protective layer 15, there is a problem that the protective layer 10 and the active matrix (1) containing the transistor under the etch prevention layer 15 is damaged.

Accordingly, an object of the present invention is to form a thick support layer and pattern it to protrude a portion of the support layer in which the Iso-Cut is to be formed, thereby preventing damage to the protective layer and the active matrix under the Iso-Cut region during the subsequent etching process. It is to provide a method for producing a thin film type optical path control device that can be.

1 is a cross-sectional view of a thin film type optical path adjusting device described in the applicant's prior application.

2A to 2E are manufacturing process diagrams of the apparatus shown in FIG.

3 is an enlarged plan view of an iso-cut portion of the device described in the preceding application.

4 is a plan view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is a cross-sectional view taken along line B′B ′ of the apparatus shown in FIG. 4.

6A to 6F are manufacturing process diagrams of the apparatus shown in FIG.

<Explanation of symbols for main parts of drawing>

100: Active matrix 105: Drain pad

110: protective layer 115: etching prevention layer

120: victim layer 125: support layer

130: lower electrode 135: deformation layer

140: upper electrode 145: empty hole

150: free contact 160: air gap

165: Iso-Cut part 200: Actuator

In order to achieve the above object, the present invention provides a method comprising the steps of providing an active matrix having M x N (M, N is an integer) MOS transistor embedded therein and a drain pad extending from the drain of the transistor; Forming a protective layer and an etch stop layer on the active matrix; Forming a first layer on the etch stop layer; First patterning the first layer to form protrusions in the shape of 'iron' in the portion where the Iso-Cut portion is to be formed in the first layer; Forming a lower electrode layer on the first layer, and then removing the lower electrode layer on the protrusion to form an Iso-Cut region separating the lower electrode layer from each pixel on the lower electrode layer; Forming a second layer and an upper electrode layer on the lower electrode layer; Patterning the upper electrode layer and the second layer to form an upper electrode and a strain layer; Patterning the lower electrode layer to form a lower electrode; And forming a support layer by second patterning the first layer.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after forming the support layer thick and patterning it first to form a protrusion in the shape of 'iron' in the portion where the Iso-Cut will be formed later in the support layer The thickness of the lower electrode layer is reduced by forming a lower electrode layer thickly and removing the lower electrode layer on the protrusion to form an Iso-Cut region on the lower electrode layer. Therefore, since the portion formed under the Iso-Cut portion of the support layer protrudes thicker than the remaining portion, etching is performed to pattern the thin films constituting the actuators such as the upper electrode, the deformation layer, the lower electrode, and the support layer into predetermined pixel shapes. Even if some of the protruding support layer under the Iso-Cut region is damaged during the process, the remaining portion remains so that the etch stop layer under the Iso-Cut portion is not damaged. Therefore, when the sacrificial layer is etched using hydrogen fluoride vapor, it is possible to prevent hydrogen fluoride vapor from penetrating toward the active matrix and damaging the active matrix in which the protective layer and the transistor are embedded.

Hereinafter, a method of manufacturing a thin film type optical path control apparatus according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 is a plan view showing a thin film type optical path adjusting device according to the present invention, and FIG. 5 is a cross-sectional view taken along line B′B ′ of the device shown in FIG. 4.

4 and 5, the thin film type optical path adjusting device according to the present invention includes an active matrix 100 and an active matrix 100 in which M × N (M and N are integers) P-MOS transistors (not shown) are embedded. And an actuator 200 formed on the upper portion of the 100.

The active matrix 100 may include a drain pad 105 extending from the drain of the P-MOS transistor, a drain pad 105, a protective layer 110 formed on the active matrix 100, and a protective layer 110. It includes an etch stop layer 115 formed on the top.

The actuator 200 has a support layer 125 and a support layer 125 formed at one side thereof in contact with a portion of the etch stop layer 115 at which a drain pad 105 is formed and the other side of the actuator 200 formed horizontally through an air gap 160. ), A lower electrode 130 formed on the upper side, a strained layer 135 formed on the lower electrode 130, an upper electrode 140 formed on the strained layer 135, and one side of the strained layer 135. The lower electrode in the via hole 145 formed from the strained layer 135, the lower electrode 130, the support layer 125, the etch stop layer 115, and the protective layer 110 to an upper portion of the drain pad 105. And a via contact 150 formed to connect the 130 and the drain pad 105.

In addition, referring to Figure 5, the plane of the support layer 125, one side has a concave portion of the rectangular shape in the center, the concave portion is formed in a shape that is widened stepwise toward both edges, the other side is Corresponding to the concave portion has a quadrangular protrusion that narrows stepwise toward the center portion. Therefore, the protruding portion of the support layer of the actuator adjacent to the concave portion of the support layer 125 is fitted, and the rectangular projection is fitted into the concave portion of the support layer of the adjacent actuator. The support layer 125 functions as a membrane supporting the actuator of the thin film type optical path adjusting device described in the previous application.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.

6A to 6F show a manufacturing process diagram of the thin film type optical path control device shown in FIG. 6A to 6F, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 6A, a drain pad 105 is formed on an active matrix 100 having M × N P-MOS transistors (not shown). The drain pad 105 is formed using a metal such as tungsten or titanium. The drain pad 105 serves to transfer the first signal (image signal) transmitted from the outside through the MOS transistor embedded in the active matrix 100 to the lower electrode 130 through the via contact 150.

The protection layer 110 is formed on the drain pad 105 and the active matrix 100 to protect the active matrix 100 having the MOS transistors embedded therein. The protective layer 110 is formed of a silicate glass (PSG) to have a thickness of about 1.0 to 2.0 μm using a chemical vapor deposition (CVD) method.

An etch stop layer 115 is stacked on the passivation layer 110. The etch stop layer 115 is formed to have a thickness of about 1000 to 2000 GPa using nitride by low pressure chemical vapor deposition (LPCVD). The etch stop layer 115 prevents the active matrix 100 and the protective layer 110 having the transistor embedded therein from being etched due to a subsequent etching process.

The sacrificial layer 120 is formed on the etch stop layer 115. The sacrificial layer 120 is formed of phosphorus silicate glass (PSG) containing a high concentration of phosphorus (PG) to have a thickness of about 2.0 to 3.0㎛ by the atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 120 covers the upper portion of the active matrix 100 in which the transistor is embedded, the flatness of the surface thereof is very poor. Therefore, the surface of the sacrificial layer 120 is polished to have a thickness of about 1.1 μm by using spin on glass (SOG) or chemical mechanical polishing (CMP). Planarize. Subsequently, a portion of the sacrificial layer 120 in which the drain pad 105 is formed is etched to expose a portion of the etch stop layer 115 to form a position where the support of the actuator 200 is to be formed.

Referring to FIG. 6B, the first layer 124 is stacked on the exposed etch stop layer 115 and the sacrificial layer 120. The first layer 124 is formed to have a thick thickness of about 1.0 to 2.0 μm using a low pressure chemical vapor deposition (LPCVD) method such as nitride or metal. The first layer 124 is later patterned with a support layer 125 that supports the actuator 200.

Referring to FIG. 6C, the first layer 124 is first patterned to protrude a portion 165 in which the Iso-Cut is subsequently formed among the first layers 124. That is, by etching the portion of the first layer 124 except for the portion 165 in which the Iso-Cut is to be formed, 'iron' is formed on the portion 165 of the first layer 124 in which the Iso-Cut is to be formed. The protrusion is formed in the shape of a ruler.

Subsequently, the lower electrode layer 129 is formed on the upper portion of the first layer 124 protruding as described above using a metal such as platinum, tantalum, or platinum-tantalum having excellent electrical conductivity. The lower electrode layer 129 is deposited to have a thick thickness of about 1.0 to 2.0 μm using a sputtering method. Subsequently, after the photoresist 132 is coated and patterned on the lower electrode layer 129, the portion 165 of the lower electrode layer 129 on which Iso-Cut is to be formed is exposed using the mask as a mask.

Referring to FIG. 6D, after the photoresist 132 is removed, the lower electrode layer on the protrusion is removed to iso-cut the lower electrode layer 129, and the lower electrode layer 129 has a thickness of about 0.1 μm to about 1.0 μm. To have. As a result, an Iso-Cut region 165 that separates each pixel in order to apply an independent first signal to each pixel is formed in the lower electrode layer 129 so that the Iso-Cut region of the first layer 124 is formed. The protrusions are exposed in the shape of 'iron' to the portion where the 165 is to be formed. In the present invention, since the first layer 124 under the Iso-Cut region 165 is protruded as described above, when the thin films constituting the actuator 200 are subsequently patterned into predetermined pixel shapes, the Iso Even if a portion of the first layer 124 under the cut portion 165 is etched and damaged, the remaining portion remains to have a sufficient thickness to withstand the etching so that the etch protection layer 115 under the cut is not damaged. Accordingly, in the subsequent etching process of the sacrificial layer 120 using hydrogen fluoride (HF) vapor, the hydrogen fluoride vapor is passed through the etch protection layer 115 under the Iso-Cut region 165. It can be prevented from penetrating to the side. The lower electrode layer 129 is later patterned with a lower electrode 130 to which a first signal is applied.

Referring to FIG. 6E, a second layer 134 is stacked on the lower electrode layer 129. The second layer 134 is formed using a piezoelectric material such as PZT or PLZT so as to have a thickness of 0.1 to 1.0 mu m, preferably about 0.4 mu m. The second layer 134 is formed using a sol-gel method, a sputtering method, or a chemical vapor deposition (CVD) method. Preferably, the second layer 134 is formed of PZT using the sol-gel method. Subsequently, the piezoelectric material constituting the second layer 134 is heat-treated to undergo a phase change by using a rapid heat treatment (RTA) method. The second layer 134 is later patterned into a strained layer 135.

An upper electrode layer 139 is stacked on the second layer 134. The upper electrode layer 139 is formed of a metal having electrical conductivity and reflectivity, such as aluminum, silver, or platinum, to have a thickness of about 0.1 to 1.0 μm using a sputtering method. The upper electrode layer 139 is later patterned with the upper electrode 140 to which a second signal (bias signal) is applied.

Referring to FIG. 6F, the upper electrode layer 139 is patterned to form an upper electrode 140 having a predetermined pixel shape. At this time, when the actuator 200 causes deformation in a part of the upper electrode 140, the light incident from a light source (not shown) is deformed in the upper electrode 140 so that the upper electrode 140 is uniformly operated. Stripes (not shown) are formed to prevent diffuse reflection at the boundary between the portion to be deformed and the portion to be deformed. The second signal is applied to the upper electrode 140 through a common electrode line (not shown) from the outside. Subsequently, the second layer 134 is patterned to form a strain layer 135 having a larger pixel shape than the upper electrode 140, and then the lower electrode layer 129 is patterned to form the strain layer 135. The lower electrode 130 having a pixel shape having a larger area than) is formed. The first signal transmitted from the outside is applied to the lower electrode 130. Therefore, when the second signal is applied to the upper electrode 145 and the first signal is applied to the lower electrode 135, an electric field is generated according to the potential difference between the upper electrode 145 and the lower electrode 135. The deformation layer 140 causes deformation.

Subsequently, the strained layer 135, the lower electrode 130, the first layer 124, the etch stop layer 115, and the protective layer 110 are disposed from one side of the strained layer 135 to an upper portion of the drain pad 105. Etching is performed sequentially to form a via hole 145. Therefore, the via hole 145 is formed from one side of the strained layer 135 to the top of the drain pad 105. In addition, a via contact 150 is formed by depositing a metal having electrical conductivity such as tungsten (W), aluminum, or titanium (Ti) in the via hole 145 using a sputtering method. The via contact 150 electrically connects the drain pad 105 and the lower electrode 130. Therefore, the first signal applied from the outside is applied to the lower electrode 130 through the transistor, the drain pad 105, and the via contact 150 embedded in the active matrix 100. Subsequently, the first layer 124 is secondarily patterned to form a support layer 125 having a predetermined pixel shape having a larger area than the lower electrode 130.

In addition, the sacrificial layer 120 is etched using hydrogen fluoride (HF) vapor to form an air gap 160 at the position of the sacrificial layer 120, and then a rinse and dry process is performed. To complete the AMA device.

In the above-described thin film type optical path control device according to the present invention, the first signal transmitted from the outside to the lower electrode 130 through the transistor, the drain pad 105 and the via contact 150 embedded in the active matrix 100. Is approved. At the same time, a second signal is applied to the upper electrode 140 through the common electrode line to generate an electric field according to a potential difference between the upper electrode 140 and the lower electrode 130. Due to this electric field, the deformation layer 135 formed between the upper electrode 140 and the lower electrode 130 causes deformation. The strained layer 135 contracts in a direction orthogonal to the electric field, whereby the actuator 200 is bent upward at a predetermined angle. Since the upper electrode 140, which also functions as a mirror that reflects light, is formed on the actuator 200, the upper electrode 140 is inclined together with the actuator 200. Accordingly, the upper electrode 140 reflects the light incident from the light source at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after forming the support layer thick and patterning it first to form a protrusion in the shape of 'iron' in the portion where the Iso-Cut will be formed later in the support layer The thickness of the lower electrode layer is reduced by forming a lower electrode layer thickly and removing the lower electrode layer on the protrusion to form an Iso-Cut region on the lower electrode layer. Therefore, since the portion formed under the Iso-Cut portion of the support layer protrudes thicker than the remaining portion, etching is performed to pattern the thin films constituting the actuators such as the upper electrode, the deformation layer, the lower electrode, and the support layer into predetermined pixel shapes. Even if some of the protruding support layer under the Iso-Cut region is damaged during the process, the remaining portion remains so that the etch stop layer under the Iso-Cut portion is not damaged. Therefore, when the sacrificial layer is etched using hydrogen fluoride vapor, it is possible to prevent hydrogen fluoride vapor from penetrating toward the active matrix and damaging the active matrix in which the protective layer and the transistor are embedded.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art can understand that the present invention can be variously modified and changed without departing from the spirit and scope of the present invention. There will be.

Claims (1)

Providing an active matrix having M × N (M, N is an integer) embedded therein and having a drain pad extending from the drain of the transistor; Forming a protective layer and an etch stop layer on the active matrix; Forming a first layer on the etch stop layer; First patterning the first layer to form protrusions in the shape of 'iron' in the portion where the Iso-Cut portion is to be formed in the first layer; Forming a lower electrode layer on the first layer, and then removing the lower electrode layer on the protrusion to form an Iso-Cut region for separating the lower electrode layer into each pixel in the lower electrode layer; Forming a second layer and an upper electrode layer on the lower electrode layer; Patterning the upper electrode layer and the second layer to form an upper electrode and a strain layer; Patterning the lower electrode layer to form a lower electrode; And And patterning the first layer to form a support layer.

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